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-rw-r--r--arch/powerpc/kernel/pci_64.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c
index dd6c7a3bf72c..461c91625a80 100644
--- a/arch/powerpc/kernel/pci_64.c
+++ b/arch/powerpc/kernel/pci_64.c
@@ -420,6 +420,9 @@ int pcibios_unmap_io_space(struct pci_bus *bus)
420 * so flushing the hash table is the only sane way to make sure 420 * so flushing the hash table is the only sane way to make sure
421 * that no hash entries are covering that removed bridge area 421 * that no hash entries are covering that removed bridge area
422 * while still allowing other busses overlapping those pages 422 * while still allowing other busses overlapping those pages
423 *
424 * Note: If we ever support P2P hotplug on Book3E, we'll have
425 * to do an appropriate TLB flush here too
423 */ 426 */
424 if (bus->self) { 427 if (bus->self) {
425 struct resource *res = bus->resource[0]; 428 struct resource *res = bus->resource[0];
@@ -427,8 +430,10 @@ int pcibios_unmap_io_space(struct pci_bus *bus)
427 pr_debug("IO unmapping for PCI-PCI bridge %s\n", 430 pr_debug("IO unmapping for PCI-PCI bridge %s\n",
428 pci_name(bus->self)); 431 pci_name(bus->self));
429 432
433#ifdef CONFIG_PPC_STD_MMU_64
430 __flush_hash_table_range(&init_mm, res->start + _IO_BASE, 434 __flush_hash_table_range(&init_mm, res->start + _IO_BASE,
431 res->end + _IO_BASE + 1); 435 res->end + _IO_BASE + 1);
436#endif
432 return 0; 437 return 0;
433 } 438 }
434 439