diff options
Diffstat (limited to 'arch/powerpc/kernel/pci-common.c')
-rw-r--r-- | arch/powerpc/kernel/pci-common.c | 36 |
1 files changed, 32 insertions, 4 deletions
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c index 2aa04f29e1de..7f94f760dd0c 100644 --- a/arch/powerpc/kernel/pci-common.c +++ b/arch/powerpc/kernel/pci-common.c | |||
@@ -99,6 +99,26 @@ void pcibios_free_controller(struct pci_controller *phb) | |||
99 | kfree(phb); | 99 | kfree(phb); |
100 | } | 100 | } |
101 | 101 | ||
102 | /* | ||
103 | * The function is used to return the minimal alignment | ||
104 | * for memory or I/O windows of the associated P2P bridge. | ||
105 | * By default, 4KiB alignment for I/O windows and 1MiB for | ||
106 | * memory windows. | ||
107 | */ | ||
108 | resource_size_t pcibios_window_alignment(struct pci_bus *bus, | ||
109 | unsigned long type) | ||
110 | { | ||
111 | if (ppc_md.pcibios_window_alignment) | ||
112 | return ppc_md.pcibios_window_alignment(bus, type); | ||
113 | |||
114 | /* | ||
115 | * PCI core will figure out the default | ||
116 | * alignment: 4KiB for I/O and 1MiB for | ||
117 | * memory window. | ||
118 | */ | ||
119 | return 1; | ||
120 | } | ||
121 | |||
102 | static resource_size_t pcibios_io_size(const struct pci_controller *hose) | 122 | static resource_size_t pcibios_io_size(const struct pci_controller *hose) |
103 | { | 123 | { |
104 | #ifdef CONFIG_PPC64 | 124 | #ifdef CONFIG_PPC64 |
@@ -960,13 +980,14 @@ static void __devinit pcibios_fixup_bridge(struct pci_bus *bus) | |||
960 | if (i >= 3 && bus->self->transparent) | 980 | if (i >= 3 && bus->self->transparent) |
961 | continue; | 981 | continue; |
962 | 982 | ||
963 | /* If we are going to re-assign everything, mark the resource | 983 | /* If we're going to reassign everything, we can |
964 | * as unset and move it down to 0 | 984 | * shrink the P2P resource to have size as being |
985 | * of 0 in order to save space. | ||
965 | */ | 986 | */ |
966 | if (pci_has_flag(PCI_REASSIGN_ALL_RSRC)) { | 987 | if (pci_has_flag(PCI_REASSIGN_ALL_RSRC)) { |
967 | res->flags |= IORESOURCE_UNSET; | 988 | res->flags |= IORESOURCE_UNSET; |
968 | res->end -= res->start; | ||
969 | res->start = 0; | 989 | res->start = 0; |
990 | res->end = -1; | ||
970 | continue; | 991 | continue; |
971 | } | 992 | } |
972 | 993 | ||
@@ -1228,7 +1249,14 @@ void pcibios_allocate_bus_resources(struct pci_bus *bus) | |||
1228 | pr_warning("PCI: Cannot allocate resource region " | 1249 | pr_warning("PCI: Cannot allocate resource region " |
1229 | "%d of PCI bridge %d, will remap\n", i, bus->number); | 1250 | "%d of PCI bridge %d, will remap\n", i, bus->number); |
1230 | clear_resource: | 1251 | clear_resource: |
1231 | res->start = res->end = 0; | 1252 | /* The resource might be figured out when doing |
1253 | * reassignment based on the resources required | ||
1254 | * by the downstream PCI devices. Here we set | ||
1255 | * the size of the resource to be 0 in order to | ||
1256 | * save more space. | ||
1257 | */ | ||
1258 | res->start = 0; | ||
1259 | res->end = -1; | ||
1232 | res->flags = 0; | 1260 | res->flags = 0; |
1233 | } | 1261 | } |
1234 | 1262 | ||