diff options
Diffstat (limited to 'arch/powerpc/kernel/misc_64.S')
-rw-r--r-- | arch/powerpc/kernel/misc_64.S | 181 |
1 files changed, 4 insertions, 177 deletions
diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S index 6bf4a4637209..580891cb8ccb 100644 --- a/arch/powerpc/kernel/misc_64.S +++ b/arch/powerpc/kernel/misc_64.S | |||
@@ -1,14 +1,12 @@ | |||
1 | /* | 1 | /* |
2 | * arch/powerpc/kernel/misc64.S | ||
3 | * | ||
4 | * This file contains miscellaneous low-level functions. | 2 | * This file contains miscellaneous low-level functions. |
5 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | 3 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) |
6 | * | 4 | * |
7 | * Largely rewritten by Cort Dougan (cort@cs.nmt.edu) | 5 | * Largely rewritten by Cort Dougan (cort@cs.nmt.edu) |
8 | * and Paul Mackerras. | 6 | * and Paul Mackerras. |
9 | * Adapted for iSeries by Mike Corrigan (mikejc@us.ibm.com) | 7 | * Adapted for iSeries by Mike Corrigan (mikejc@us.ibm.com) |
10 | * PPC64 updates by Dave Engebretsen (engebret@us.ibm.com) | 8 | * PPC64 updates by Dave Engebretsen (engebret@us.ibm.com) |
11 | * | 9 | * |
12 | * This program is free software; you can redistribute it and/or | 10 | * This program is free software; you can redistribute it and/or |
13 | * modify it under the terms of the GNU General Public License | 11 | * modify it under the terms of the GNU General Public License |
14 | * as published by the Free Software Foundation; either version | 12 | * as published by the Free Software Foundation; either version |
@@ -30,41 +28,10 @@ | |||
30 | 28 | ||
31 | .text | 29 | .text |
32 | 30 | ||
33 | /* | ||
34 | * Returns (address we are running at) - (address we were linked at) | ||
35 | * for use before the text and data are mapped to KERNELBASE. | ||
36 | */ | ||
37 | |||
38 | _GLOBAL(reloc_offset) | ||
39 | mflr r0 | ||
40 | bl 1f | ||
41 | 1: mflr r3 | ||
42 | LOAD_REG_IMMEDIATE(r4,1b) | ||
43 | subf r3,r4,r3 | ||
44 | mtlr r0 | ||
45 | blr | ||
46 | |||
47 | /* | ||
48 | * add_reloc_offset(x) returns x + reloc_offset(). | ||
49 | */ | ||
50 | _GLOBAL(add_reloc_offset) | ||
51 | mflr r0 | ||
52 | bl 1f | ||
53 | 1: mflr r5 | ||
54 | LOAD_REG_IMMEDIATE(r4,1b) | ||
55 | subf r5,r4,r5 | ||
56 | add r3,r3,r5 | ||
57 | mtlr r0 | ||
58 | blr | ||
59 | |||
60 | _GLOBAL(get_msr) | 31 | _GLOBAL(get_msr) |
61 | mfmsr r3 | 32 | mfmsr r3 |
62 | blr | 33 | blr |
63 | 34 | ||
64 | _GLOBAL(get_dar) | ||
65 | mfdar r3 | ||
66 | blr | ||
67 | |||
68 | _GLOBAL(get_srr0) | 35 | _GLOBAL(get_srr0) |
69 | mfsrr0 r3 | 36 | mfsrr0 r3 |
70 | blr | 37 | blr |
@@ -72,10 +39,6 @@ _GLOBAL(get_srr0) | |||
72 | _GLOBAL(get_srr1) | 39 | _GLOBAL(get_srr1) |
73 | mfsrr1 r3 | 40 | mfsrr1 r3 |
74 | blr | 41 | blr |
75 | |||
76 | _GLOBAL(get_sp) | ||
77 | mr r3,r1 | ||
78 | blr | ||
79 | 42 | ||
80 | #ifdef CONFIG_IRQSTACKS | 43 | #ifdef CONFIG_IRQSTACKS |
81 | _GLOBAL(call_do_softirq) | 44 | _GLOBAL(call_do_softirq) |
@@ -281,144 +244,6 @@ _GLOBAL(__flush_dcache_icache) | |||
281 | bdnz 1b | 244 | bdnz 1b |
282 | isync | 245 | isync |
283 | blr | 246 | blr |
284 | |||
285 | /* | ||
286 | * I/O string operations | ||
287 | * | ||
288 | * insb(port, buf, len) | ||
289 | * outsb(port, buf, len) | ||
290 | * insw(port, buf, len) | ||
291 | * outsw(port, buf, len) | ||
292 | * insl(port, buf, len) | ||
293 | * outsl(port, buf, len) | ||
294 | * insw_ns(port, buf, len) | ||
295 | * outsw_ns(port, buf, len) | ||
296 | * insl_ns(port, buf, len) | ||
297 | * outsl_ns(port, buf, len) | ||
298 | * | ||
299 | * The *_ns versions don't do byte-swapping. | ||
300 | */ | ||
301 | _GLOBAL(_insb) | ||
302 | cmpwi 0,r5,0 | ||
303 | mtctr r5 | ||
304 | subi r4,r4,1 | ||
305 | blelr- | ||
306 | 00: lbz r5,0(r3) | ||
307 | eieio | ||
308 | stbu r5,1(r4) | ||
309 | bdnz 00b | ||
310 | twi 0,r5,0 | ||
311 | isync | ||
312 | blr | ||
313 | |||
314 | _GLOBAL(_outsb) | ||
315 | cmpwi 0,r5,0 | ||
316 | mtctr r5 | ||
317 | subi r4,r4,1 | ||
318 | blelr- | ||
319 | 00: lbzu r5,1(r4) | ||
320 | stb r5,0(r3) | ||
321 | bdnz 00b | ||
322 | sync | ||
323 | blr | ||
324 | |||
325 | _GLOBAL(_insw) | ||
326 | cmpwi 0,r5,0 | ||
327 | mtctr r5 | ||
328 | subi r4,r4,2 | ||
329 | blelr- | ||
330 | 00: lhbrx r5,0,r3 | ||
331 | eieio | ||
332 | sthu r5,2(r4) | ||
333 | bdnz 00b | ||
334 | twi 0,r5,0 | ||
335 | isync | ||
336 | blr | ||
337 | |||
338 | _GLOBAL(_outsw) | ||
339 | cmpwi 0,r5,0 | ||
340 | mtctr r5 | ||
341 | subi r4,r4,2 | ||
342 | blelr- | ||
343 | 00: lhzu r5,2(r4) | ||
344 | sthbrx r5,0,r3 | ||
345 | bdnz 00b | ||
346 | sync | ||
347 | blr | ||
348 | |||
349 | _GLOBAL(_insl) | ||
350 | cmpwi 0,r5,0 | ||
351 | mtctr r5 | ||
352 | subi r4,r4,4 | ||
353 | blelr- | ||
354 | 00: lwbrx r5,0,r3 | ||
355 | eieio | ||
356 | stwu r5,4(r4) | ||
357 | bdnz 00b | ||
358 | twi 0,r5,0 | ||
359 | isync | ||
360 | blr | ||
361 | |||
362 | _GLOBAL(_outsl) | ||
363 | cmpwi 0,r5,0 | ||
364 | mtctr r5 | ||
365 | subi r4,r4,4 | ||
366 | blelr- | ||
367 | 00: lwzu r5,4(r4) | ||
368 | stwbrx r5,0,r3 | ||
369 | bdnz 00b | ||
370 | sync | ||
371 | blr | ||
372 | |||
373 | /* _GLOBAL(ide_insw) now in drivers/ide/ide-iops.c */ | ||
374 | _GLOBAL(_insw_ns) | ||
375 | cmpwi 0,r5,0 | ||
376 | mtctr r5 | ||
377 | subi r4,r4,2 | ||
378 | blelr- | ||
379 | 00: lhz r5,0(r3) | ||
380 | eieio | ||
381 | sthu r5,2(r4) | ||
382 | bdnz 00b | ||
383 | twi 0,r5,0 | ||
384 | isync | ||
385 | blr | ||
386 | |||
387 | /* _GLOBAL(ide_outsw) now in drivers/ide/ide-iops.c */ | ||
388 | _GLOBAL(_outsw_ns) | ||
389 | cmpwi 0,r5,0 | ||
390 | mtctr r5 | ||
391 | subi r4,r4,2 | ||
392 | blelr- | ||
393 | 00: lhzu r5,2(r4) | ||
394 | sth r5,0(r3) | ||
395 | bdnz 00b | ||
396 | sync | ||
397 | blr | ||
398 | |||
399 | _GLOBAL(_insl_ns) | ||
400 | cmpwi 0,r5,0 | ||
401 | mtctr r5 | ||
402 | subi r4,r4,4 | ||
403 | blelr- | ||
404 | 00: lwz r5,0(r3) | ||
405 | eieio | ||
406 | stwu r5,4(r4) | ||
407 | bdnz 00b | ||
408 | twi 0,r5,0 | ||
409 | isync | ||
410 | blr | ||
411 | |||
412 | _GLOBAL(_outsl_ns) | ||
413 | cmpwi 0,r5,0 | ||
414 | mtctr r5 | ||
415 | subi r4,r4,4 | ||
416 | blelr- | ||
417 | 00: lwzu r5,4(r4) | ||
418 | stw r5,0(r3) | ||
419 | bdnz 00b | ||
420 | sync | ||
421 | blr | ||
422 | 247 | ||
423 | /* | 248 | /* |
424 | * identify_cpu and calls setup_cpu | 249 | * identify_cpu and calls setup_cpu |
@@ -563,6 +388,7 @@ _GLOBAL(real_writeb) | |||
563 | blr | 388 | blr |
564 | #endif /* defined(CONFIG_PPC_PMAC) || defined(CONFIG_PPC_MAPLE) */ | 389 | #endif /* defined(CONFIG_PPC_PMAC) || defined(CONFIG_PPC_MAPLE) */ |
565 | 390 | ||
391 | #ifdef CONFIG_CPU_FREQ_PMAC64 | ||
566 | /* | 392 | /* |
567 | * SCOM access functions for 970 (FX only for now) | 393 | * SCOM access functions for 970 (FX only for now) |
568 | * | 394 | * |
@@ -631,6 +457,7 @@ _GLOBAL(scom970_write) | |||
631 | /* restore interrupts */ | 457 | /* restore interrupts */ |
632 | mtmsrd r5,1 | 458 | mtmsrd r5,1 |
633 | blr | 459 | blr |
460 | #endif /* CONFIG_CPU_FREQ_PMAC64 */ | ||
634 | 461 | ||
635 | 462 | ||
636 | /* | 463 | /* |