diff options
Diffstat (limited to 'arch/powerpc/kernel/misc_32.S')
-rw-r--r-- | arch/powerpc/kernel/misc_32.S | 62 |
1 files changed, 59 insertions, 3 deletions
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S index 7a6dfbca7682..6a9b4bf0d173 100644 --- a/arch/powerpc/kernel/misc_32.S +++ b/arch/powerpc/kernel/misc_32.S | |||
@@ -274,6 +274,10 @@ _GLOBAL(real_writeb) | |||
274 | /* | 274 | /* |
275 | * Flush MMU TLB | 275 | * Flush MMU TLB |
276 | */ | 276 | */ |
277 | #ifndef CONFIG_FSL_BOOKE | ||
278 | _GLOBAL(_tlbil_all) | ||
279 | _GLOBAL(_tlbil_pid) | ||
280 | #endif | ||
277 | _GLOBAL(_tlbia) | 281 | _GLOBAL(_tlbia) |
278 | #if defined(CONFIG_40x) | 282 | #if defined(CONFIG_40x) |
279 | sync /* Flush to memory before changing mapping */ | 283 | sync /* Flush to memory before changing mapping */ |
@@ -344,6 +348,9 @@ _GLOBAL(_tlbia) | |||
344 | /* | 348 | /* |
345 | * Flush MMU TLB for a particular address | 349 | * Flush MMU TLB for a particular address |
346 | */ | 350 | */ |
351 | #ifndef CONFIG_FSL_BOOKE | ||
352 | _GLOBAL(_tlbil_va) | ||
353 | #endif | ||
347 | _GLOBAL(_tlbie) | 354 | _GLOBAL(_tlbie) |
348 | #if defined(CONFIG_40x) | 355 | #if defined(CONFIG_40x) |
349 | /* We run the search with interrupts disabled because we have to change | 356 | /* We run the search with interrupts disabled because we have to change |
@@ -436,6 +443,53 @@ _GLOBAL(_tlbie) | |||
436 | #endif /* ! CONFIG_40x */ | 443 | #endif /* ! CONFIG_40x */ |
437 | blr | 444 | blr |
438 | 445 | ||
446 | #if defined(CONFIG_FSL_BOOKE) | ||
447 | /* | ||
448 | * Flush MMU TLB, but only on the local processor (no broadcast) | ||
449 | */ | ||
450 | _GLOBAL(_tlbil_all) | ||
451 | #define MMUCSR0_TLBFI (MMUCSR0_TLB0FI | MMUCSR0_TLB1FI | \ | ||
452 | MMUCSR0_TLB2FI | MMUCSR0_TLB3FI) | ||
453 | li r3,(MMUCSR0_TLBFI)@l | ||
454 | mtspr SPRN_MMUCSR0, r3 | ||
455 | 1: | ||
456 | mfspr r3,SPRN_MMUCSR0 | ||
457 | andi. r3,r3,MMUCSR0_TLBFI@l | ||
458 | bne 1b | ||
459 | blr | ||
460 | |||
461 | /* | ||
462 | * Flush MMU TLB for a particular process id, but only on the local processor | ||
463 | * (no broadcast) | ||
464 | */ | ||
465 | _GLOBAL(_tlbil_pid) | ||
466 | /* we currently do an invalidate all since we don't have per pid invalidate */ | ||
467 | li r3,(MMUCSR0_TLBFI)@l | ||
468 | mtspr SPRN_MMUCSR0, r3 | ||
469 | 1: | ||
470 | mfspr r3,SPRN_MMUCSR0 | ||
471 | andi. r3,r3,MMUCSR0_TLBFI@l | ||
472 | bne 1b | ||
473 | blr | ||
474 | |||
475 | /* | ||
476 | * Flush MMU TLB for a particular address, but only on the local processor | ||
477 | * (no broadcast) | ||
478 | */ | ||
479 | _GLOBAL(_tlbil_va) | ||
480 | slwi r4,r4,16 | ||
481 | mtspr SPRN_MAS6,r4 /* assume AS=0 for now */ | ||
482 | tlbsx 0,r3 | ||
483 | mfspr r4,SPRN_MAS1 /* check valid */ | ||
484 | andis. r3,r4,MAS1_VALID@h | ||
485 | beqlr | ||
486 | rlwinm r4,r4,0,1,31 | ||
487 | mtspr SPRN_MAS1,r4 | ||
488 | tlbwe | ||
489 | blr | ||
490 | #endif /* CONFIG_FSL_BOOKE */ | ||
491 | |||
492 | |||
439 | /* | 493 | /* |
440 | * Flush instruction cache. | 494 | * Flush instruction cache. |
441 | * This is a no-op on the 601. | 495 | * This is a no-op on the 601. |
@@ -846,8 +900,10 @@ _GLOBAL(kernel_thread) | |||
846 | li r4,0 /* new sp (unused) */ | 900 | li r4,0 /* new sp (unused) */ |
847 | li r0,__NR_clone | 901 | li r0,__NR_clone |
848 | sc | 902 | sc |
849 | cmpwi 0,r3,0 /* parent or child? */ | 903 | bns+ 1f /* did system call indicate error? */ |
850 | bne 1f /* return if parent */ | 904 | neg r3,r3 /* if so, make return code negative */ |
905 | 1: cmpwi 0,r3,0 /* parent or child? */ | ||
906 | bne 2f /* return if parent */ | ||
851 | li r0,0 /* make top-level stack frame */ | 907 | li r0,0 /* make top-level stack frame */ |
852 | stwu r0,-16(r1) | 908 | stwu r0,-16(r1) |
853 | mtlr r30 /* fn addr in lr */ | 909 | mtlr r30 /* fn addr in lr */ |
@@ -857,7 +913,7 @@ _GLOBAL(kernel_thread) | |||
857 | li r0,__NR_exit /* exit if function returns */ | 913 | li r0,__NR_exit /* exit if function returns */ |
858 | li r3,0 | 914 | li r3,0 |
859 | sc | 915 | sc |
860 | 1: lwz r30,8(r1) | 916 | 2: lwz r30,8(r1) |
861 | lwz r31,12(r1) | 917 | lwz r31,12(r1) |
862 | addi r1,r1,16 | 918 | addi r1,r1,16 |
863 | blr | 919 | blr |