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Diffstat (limited to 'arch/powerpc/kernel/mce_power.c')
-rw-r--r--arch/powerpc/kernel/mce_power.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/powerpc/kernel/mce_power.c b/arch/powerpc/kernel/mce_power.c
index aa9aff3d6ad3..b6f123ab90ed 100644
--- a/arch/powerpc/kernel/mce_power.c
+++ b/arch/powerpc/kernel/mce_power.c
@@ -79,7 +79,7 @@ static long mce_handle_derror(uint64_t dsisr, uint64_t slb_error_bits)
79 } 79 }
80 if (dsisr & P7_DSISR_MC_TLB_MULTIHIT_MFTLB) { 80 if (dsisr & P7_DSISR_MC_TLB_MULTIHIT_MFTLB) {
81 if (cur_cpu_spec && cur_cpu_spec->flush_tlb) 81 if (cur_cpu_spec && cur_cpu_spec->flush_tlb)
82 cur_cpu_spec->flush_tlb(TLBIEL_INVAL_PAGE); 82 cur_cpu_spec->flush_tlb(TLBIEL_INVAL_SET);
83 /* reset error bits */ 83 /* reset error bits */
84 dsisr &= ~P7_DSISR_MC_TLB_MULTIHIT_MFTLB; 84 dsisr &= ~P7_DSISR_MC_TLB_MULTIHIT_MFTLB;
85 } 85 }
@@ -110,7 +110,7 @@ static long mce_handle_common_ierror(uint64_t srr1)
110 break; 110 break;
111 case P7_SRR1_MC_IFETCH_TLB_MULTIHIT: 111 case P7_SRR1_MC_IFETCH_TLB_MULTIHIT:
112 if (cur_cpu_spec && cur_cpu_spec->flush_tlb) { 112 if (cur_cpu_spec && cur_cpu_spec->flush_tlb) {
113 cur_cpu_spec->flush_tlb(TLBIEL_INVAL_PAGE); 113 cur_cpu_spec->flush_tlb(TLBIEL_INVAL_SET);
114 handled = 1; 114 handled = 1;
115 } 115 }
116 break; 116 break;