diff options
Diffstat (limited to 'arch/powerpc/kernel/head_64.S')
-rw-r--r-- | arch/powerpc/kernel/head_64.S | 111 |
1 files changed, 6 insertions, 105 deletions
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S index 7ebb73665e9d..2b21ec499285 100644 --- a/arch/powerpc/kernel/head_64.S +++ b/arch/powerpc/kernel/head_64.S | |||
@@ -137,7 +137,7 @@ _GLOBAL(__secondary_hold) | |||
137 | ori r24,r24,MSR_RI | 137 | ori r24,r24,MSR_RI |
138 | mtmsrd r24 /* RI on */ | 138 | mtmsrd r24 /* RI on */ |
139 | 139 | ||
140 | /* Grab our linux cpu number */ | 140 | /* Grab our physical cpu number */ |
141 | mr r24,r3 | 141 | mr r24,r3 |
142 | 142 | ||
143 | /* Tell the master cpu we're here */ | 143 | /* Tell the master cpu we're here */ |
@@ -151,12 +151,7 @@ _GLOBAL(__secondary_hold) | |||
151 | cmpdi 0,r4,1 | 151 | cmpdi 0,r4,1 |
152 | bne 100b | 152 | bne 100b |
153 | 153 | ||
154 | #ifdef CONFIG_HMT | 154 | #if defined(CONFIG_SMP) || defined(CONFIG_KEXEC) |
155 | SET_REG_IMMEDIATE(r4, .hmt_init) | ||
156 | mtctr r4 | ||
157 | bctr | ||
158 | #else | ||
159 | #ifdef CONFIG_SMP | ||
160 | LOAD_REG_IMMEDIATE(r4, .pSeries_secondary_smp_init) | 155 | LOAD_REG_IMMEDIATE(r4, .pSeries_secondary_smp_init) |
161 | mtctr r4 | 156 | mtctr r4 |
162 | mr r3,r24 | 157 | mr r3,r24 |
@@ -164,7 +159,6 @@ _GLOBAL(__secondary_hold) | |||
164 | #else | 159 | #else |
165 | BUG_OPCODE | 160 | BUG_OPCODE |
166 | #endif | 161 | #endif |
167 | #endif | ||
168 | 162 | ||
169 | /* This value is used to mark exception frames on the stack. */ | 163 | /* This value is used to mark exception frames on the stack. */ |
170 | .section ".toc","aw" | 164 | .section ".toc","aw" |
@@ -319,7 +313,6 @@ exception_marker: | |||
319 | label##_pSeries: \ | 313 | label##_pSeries: \ |
320 | HMT_MEDIUM; \ | 314 | HMT_MEDIUM; \ |
321 | mtspr SPRN_SPRG1,r13; /* save r13 */ \ | 315 | mtspr SPRN_SPRG1,r13; /* save r13 */ \ |
322 | RUNLATCH_ON(r13); \ | ||
323 | EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common) | 316 | EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common) |
324 | 317 | ||
325 | #define STD_EXCEPTION_ISERIES(n, label, area) \ | 318 | #define STD_EXCEPTION_ISERIES(n, label, area) \ |
@@ -327,7 +320,6 @@ label##_pSeries: \ | |||
327 | label##_iSeries: \ | 320 | label##_iSeries: \ |
328 | HMT_MEDIUM; \ | 321 | HMT_MEDIUM; \ |
329 | mtspr SPRN_SPRG1,r13; /* save r13 */ \ | 322 | mtspr SPRN_SPRG1,r13; /* save r13 */ \ |
330 | RUNLATCH_ON(r13); \ | ||
331 | EXCEPTION_PROLOG_ISERIES_1(area); \ | 323 | EXCEPTION_PROLOG_ISERIES_1(area); \ |
332 | EXCEPTION_PROLOG_ISERIES_2; \ | 324 | EXCEPTION_PROLOG_ISERIES_2; \ |
333 | b label##_common | 325 | b label##_common |
@@ -337,7 +329,6 @@ label##_iSeries: \ | |||
337 | label##_iSeries: \ | 329 | label##_iSeries: \ |
338 | HMT_MEDIUM; \ | 330 | HMT_MEDIUM; \ |
339 | mtspr SPRN_SPRG1,r13; /* save r13 */ \ | 331 | mtspr SPRN_SPRG1,r13; /* save r13 */ \ |
340 | RUNLATCH_ON(r13); \ | ||
341 | EXCEPTION_PROLOG_ISERIES_1(PACA_EXGEN); \ | 332 | EXCEPTION_PROLOG_ISERIES_1(PACA_EXGEN); \ |
342 | lbz r10,PACAPROCENABLED(r13); \ | 333 | lbz r10,PACAPROCENABLED(r13); \ |
343 | cmpwi 0,r10,0; \ | 334 | cmpwi 0,r10,0; \ |
@@ -390,6 +381,7 @@ label##_common: \ | |||
390 | label##_common: \ | 381 | label##_common: \ |
391 | EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \ | 382 | EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \ |
392 | DISABLE_INTS; \ | 383 | DISABLE_INTS; \ |
384 | bl .ppc64_runlatch_on; \ | ||
393 | addi r3,r1,STACK_FRAME_OVERHEAD; \ | 385 | addi r3,r1,STACK_FRAME_OVERHEAD; \ |
394 | bl hdlr; \ | 386 | bl hdlr; \ |
395 | b .ret_from_except_lite | 387 | b .ret_from_except_lite |
@@ -407,7 +399,6 @@ __start_interrupts: | |||
407 | _machine_check_pSeries: | 399 | _machine_check_pSeries: |
408 | HMT_MEDIUM | 400 | HMT_MEDIUM |
409 | mtspr SPRN_SPRG1,r13 /* save r13 */ | 401 | mtspr SPRN_SPRG1,r13 /* save r13 */ |
410 | RUNLATCH_ON(r13) | ||
411 | EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common) | 402 | EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common) |
412 | 403 | ||
413 | . = 0x300 | 404 | . = 0x300 |
@@ -434,7 +425,6 @@ END_FTR_SECTION_IFCLR(CPU_FTR_SLB) | |||
434 | data_access_slb_pSeries: | 425 | data_access_slb_pSeries: |
435 | HMT_MEDIUM | 426 | HMT_MEDIUM |
436 | mtspr SPRN_SPRG1,r13 | 427 | mtspr SPRN_SPRG1,r13 |
437 | RUNLATCH_ON(r13) | ||
438 | mfspr r13,SPRN_SPRG3 /* get paca address into r13 */ | 428 | mfspr r13,SPRN_SPRG3 /* get paca address into r13 */ |
439 | std r3,PACA_EXSLB+EX_R3(r13) | 429 | std r3,PACA_EXSLB+EX_R3(r13) |
440 | mfspr r3,SPRN_DAR | 430 | mfspr r3,SPRN_DAR |
@@ -460,7 +450,6 @@ data_access_slb_pSeries: | |||
460 | instruction_access_slb_pSeries: | 450 | instruction_access_slb_pSeries: |
461 | HMT_MEDIUM | 451 | HMT_MEDIUM |
462 | mtspr SPRN_SPRG1,r13 | 452 | mtspr SPRN_SPRG1,r13 |
463 | RUNLATCH_ON(r13) | ||
464 | mfspr r13,SPRN_SPRG3 /* get paca address into r13 */ | 453 | mfspr r13,SPRN_SPRG3 /* get paca address into r13 */ |
465 | std r3,PACA_EXSLB+EX_R3(r13) | 454 | std r3,PACA_EXSLB+EX_R3(r13) |
466 | mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */ | 455 | mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */ |
@@ -491,7 +480,6 @@ instruction_access_slb_pSeries: | |||
491 | .globl system_call_pSeries | 480 | .globl system_call_pSeries |
492 | system_call_pSeries: | 481 | system_call_pSeries: |
493 | HMT_MEDIUM | 482 | HMT_MEDIUM |
494 | RUNLATCH_ON(r9) | ||
495 | mr r9,r13 | 483 | mr r9,r13 |
496 | mfmsr r10 | 484 | mfmsr r10 |
497 | mfspr r13,SPRN_SPRG3 | 485 | mfspr r13,SPRN_SPRG3 |
@@ -575,7 +563,6 @@ slb_miss_user_pseries: | |||
575 | system_reset_fwnmi: | 563 | system_reset_fwnmi: |
576 | HMT_MEDIUM | 564 | HMT_MEDIUM |
577 | mtspr SPRN_SPRG1,r13 /* save r13 */ | 565 | mtspr SPRN_SPRG1,r13 /* save r13 */ |
578 | RUNLATCH_ON(r13) | ||
579 | EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common) | 566 | EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common) |
580 | 567 | ||
581 | .globl machine_check_fwnmi | 568 | .globl machine_check_fwnmi |
@@ -583,7 +570,6 @@ system_reset_fwnmi: | |||
583 | machine_check_fwnmi: | 570 | machine_check_fwnmi: |
584 | HMT_MEDIUM | 571 | HMT_MEDIUM |
585 | mtspr SPRN_SPRG1,r13 /* save r13 */ | 572 | mtspr SPRN_SPRG1,r13 /* save r13 */ |
586 | RUNLATCH_ON(r13) | ||
587 | EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common) | 573 | EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common) |
588 | 574 | ||
589 | #ifdef CONFIG_PPC_ISERIES | 575 | #ifdef CONFIG_PPC_ISERIES |
@@ -894,7 +880,6 @@ unrecov_fer: | |||
894 | .align 7 | 880 | .align 7 |
895 | .globl data_access_common | 881 | .globl data_access_common |
896 | data_access_common: | 882 | data_access_common: |
897 | RUNLATCH_ON(r10) /* It wont fit in the 0x300 handler */ | ||
898 | mfspr r10,SPRN_DAR | 883 | mfspr r10,SPRN_DAR |
899 | std r10,PACA_EXGEN+EX_DAR(r13) | 884 | std r10,PACA_EXGEN+EX_DAR(r13) |
900 | mfspr r10,SPRN_DSISR | 885 | mfspr r10,SPRN_DSISR |
@@ -1042,6 +1027,7 @@ hardware_interrupt_common: | |||
1042 | EXCEPTION_PROLOG_COMMON(0x500, PACA_EXGEN) | 1027 | EXCEPTION_PROLOG_COMMON(0x500, PACA_EXGEN) |
1043 | hardware_interrupt_entry: | 1028 | hardware_interrupt_entry: |
1044 | DISABLE_INTS | 1029 | DISABLE_INTS |
1030 | bl .ppc64_runlatch_on | ||
1045 | addi r3,r1,STACK_FRAME_OVERHEAD | 1031 | addi r3,r1,STACK_FRAME_OVERHEAD |
1046 | bl .do_IRQ | 1032 | bl .do_IRQ |
1047 | b .ret_from_except_lite | 1033 | b .ret_from_except_lite |
@@ -1816,22 +1802,6 @@ _STATIC(start_here_multiplatform) | |||
1816 | ori r6,r6,MSR_RI | 1802 | ori r6,r6,MSR_RI |
1817 | mtmsrd r6 /* RI on */ | 1803 | mtmsrd r6 /* RI on */ |
1818 | 1804 | ||
1819 | #ifdef CONFIG_HMT | ||
1820 | /* Start up the second thread on cpu 0 */ | ||
1821 | mfspr r3,SPRN_PVR | ||
1822 | srwi r3,r3,16 | ||
1823 | cmpwi r3,0x34 /* Pulsar */ | ||
1824 | beq 90f | ||
1825 | cmpwi r3,0x36 /* Icestar */ | ||
1826 | beq 90f | ||
1827 | cmpwi r3,0x37 /* SStar */ | ||
1828 | beq 90f | ||
1829 | b 91f /* HMT not supported */ | ||
1830 | 90: li r3,0 | ||
1831 | bl .hmt_start_secondary | ||
1832 | 91: | ||
1833 | #endif | ||
1834 | |||
1835 | /* The following gets the stack and TOC set up with the regs */ | 1805 | /* The following gets the stack and TOC set up with the regs */ |
1836 | /* pointing to the real addr of the kernel stack. This is */ | 1806 | /* pointing to the real addr of the kernel stack. This is */ |
1837 | /* all done to support the C function call below which sets */ | 1807 | /* all done to support the C function call below which sets */ |
@@ -1945,77 +1915,8 @@ _STATIC(start_here_common) | |||
1945 | 1915 | ||
1946 | bl .start_kernel | 1916 | bl .start_kernel |
1947 | 1917 | ||
1948 | _GLOBAL(hmt_init) | 1918 | /* Not reached */ |
1949 | #ifdef CONFIG_HMT | 1919 | BUG_OPCODE |
1950 | LOAD_REG_IMMEDIATE(r5, hmt_thread_data) | ||
1951 | mfspr r7,SPRN_PVR | ||
1952 | srwi r7,r7,16 | ||
1953 | cmpwi r7,0x34 /* Pulsar */ | ||
1954 | beq 90f | ||
1955 | cmpwi r7,0x36 /* Icestar */ | ||
1956 | beq 91f | ||
1957 | cmpwi r7,0x37 /* SStar */ | ||
1958 | beq 91f | ||
1959 | b 101f | ||
1960 | 90: mfspr r6,SPRN_PIR | ||
1961 | andi. r6,r6,0x1f | ||
1962 | b 92f | ||
1963 | 91: mfspr r6,SPRN_PIR | ||
1964 | andi. r6,r6,0x3ff | ||
1965 | 92: sldi r4,r24,3 | ||
1966 | stwx r6,r5,r4 | ||
1967 | bl .hmt_start_secondary | ||
1968 | b 101f | ||
1969 | |||
1970 | __hmt_secondary_hold: | ||
1971 | LOAD_REG_IMMEDIATE(r5, hmt_thread_data) | ||
1972 | clrldi r5,r5,4 | ||
1973 | li r7,0 | ||
1974 | mfspr r6,SPRN_PIR | ||
1975 | mfspr r8,SPRN_PVR | ||
1976 | srwi r8,r8,16 | ||
1977 | cmpwi r8,0x34 | ||
1978 | bne 93f | ||
1979 | andi. r6,r6,0x1f | ||
1980 | b 103f | ||
1981 | 93: andi. r6,r6,0x3f | ||
1982 | |||
1983 | 103: lwzx r8,r5,r7 | ||
1984 | cmpw r8,r6 | ||
1985 | beq 104f | ||
1986 | addi r7,r7,8 | ||
1987 | b 103b | ||
1988 | |||
1989 | 104: addi r7,r7,4 | ||
1990 | lwzx r9,r5,r7 | ||
1991 | mr r24,r9 | ||
1992 | 101: | ||
1993 | #endif | ||
1994 | mr r3,r24 | ||
1995 | b .pSeries_secondary_smp_init | ||
1996 | |||
1997 | #ifdef CONFIG_HMT | ||
1998 | _GLOBAL(hmt_start_secondary) | ||
1999 | LOAD_REG_IMMEDIATE(r4,__hmt_secondary_hold) | ||
2000 | clrldi r4,r4,4 | ||
2001 | mtspr SPRN_NIADORM, r4 | ||
2002 | mfspr r4, SPRN_MSRDORM | ||
2003 | li r5, -65 | ||
2004 | and r4, r4, r5 | ||
2005 | mtspr SPRN_MSRDORM, r4 | ||
2006 | lis r4,0xffef | ||
2007 | ori r4,r4,0x7403 | ||
2008 | mtspr SPRN_TSC, r4 | ||
2009 | li r4,0x1f4 | ||
2010 | mtspr SPRN_TST, r4 | ||
2011 | mfspr r4, SPRN_HID0 | ||
2012 | ori r4, r4, 0x1 | ||
2013 | mtspr SPRN_HID0, r4 | ||
2014 | mfspr r4, SPRN_CTRLF | ||
2015 | oris r4, r4, 0x40 | ||
2016 | mtspr SPRN_CTRLT, r4 | ||
2017 | blr | ||
2018 | #endif | ||
2019 | 1920 | ||
2020 | /* | 1921 | /* |
2021 | * We put a few things here that have to be page-aligned. | 1922 | * We put a few things here that have to be page-aligned. |