1 files changed, 12 insertions, 51 deletions

diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S
index 831acbdf2592..e16eb2a33173 100644
--- a/arch/powerpc/kernel/head_64.S
+++ b/arch/powerpc/kernel/head_64.S
@@ -21,7 +21,6 @@
  *  2 of the License, or (at your option) any later version.
  */
 
-#include <linux/config.h>
 #include <linux/threads.h>
 #include <asm/reg.h>
 #include <asm/page.h>
@@ -85,34 +84,6 @@ END_FTR_SECTION(0, 1)
         /* Catch branch to 0 in real mode */
         trap
 
-#ifdef CONFIG_PPC_ISERIES
-        /*
-         * At offset 0x20, there is a pointer to iSeries LPAR data.
-         * This is required by the hypervisor
-         */
-        . = 0x20
-        .llong hvReleaseData-KERNELBASE
-
-        /*
-         * At offset 0x28 and 0x30 are offsets to the mschunks_map
-         * array (used by the iSeries LPAR debugger to do translation
-         * between physical addresses and absolute addresses) and
-         * to the pidhash table (also used by the debugger)
-         */
-        .llong mschunks_map-KERNELBASE
-        .llong 0        /* pidhash-KERNELBASE SFRXXX */
-
-        /* Offset 0x38 - Pointer to start of embedded System.map */
-        .globl  embedded_sysmap_start
-embedded_sysmap_start:
-        .llong  0
-        /* Offset 0x40 - Pointer to end of embedded System.map */
-        .globl  embedded_sysmap_end
-embedded_sysmap_end:
-        .llong  0
-
-#endif /* CONFIG_PPC_ISERIES */
-
         /* Secondary processors spin on this value until it goes to 1. */
         .globl  __secondary_hold_spinloop
 __secondary_hold_spinloop:
@@ -124,6 +95,15 @@ __secondary_hold_spinloop:
 __secondary_hold_acknowledge:
         .llong  0x0
 
+#ifdef CONFIG_PPC_ISERIES
+        /*
+         * At offset 0x20, there is a pointer to iSeries LPAR data.
+         * This is required by the hypervisor
+         */
+        . = 0x20
+        .llong hvReleaseData-KERNELBASE
+#endif /* CONFIG_PPC_ISERIES */
+
         . = 0x60
 /*
  * The following code is used on pSeries to hold secondary processors
@@ -1602,9 +1582,6 @@ _GLOBAL(__start_initialization_multiplatform)
         /* Setup some critical 970 SPRs before switching MMU off */
         bl      .__970_cpu_preinit
 
-        /* cpu # */
-        li      r24,0
-
         /* Switch off MMU if not already */
         LOAD_REG_IMMEDIATE(r4, .__after_prom_start - KERNELBASE)
         add     r4,r4,r30
@@ -1683,6 +1660,9 @@ _STATIC(__after_prom_start)
                                         /*   i.e. where we are running   */
                                         /*      the source addr          */
 
+        cmpdi   r4,0                    /* In some cases the loader may  */
+        beq     .start_here_multiplatform /* have already put us at zero */
+                                        /* so we can skip the copy.      */
         LOAD_REG_IMMEDIATE(r5,copy_to_here) /* # bytes of memory to copy */
         sub     r5,r5,r27
 
@@ -1962,14 +1942,6 @@ _STATIC(start_here_common)
         li      r3,0
         bl      .do_cpu_ftr_fixups
 
-        LOAD_REG_IMMEDIATE(r26, boot_cpuid)
-        lwz     r26,0(r26)
-
-        LOAD_REG_IMMEDIATE(r24, paca)   /* Get base vaddr of paca array  */
-        mulli   r13,r26,PACA_SIZE       /* Calculate vaddr of right paca */
-        add     r13,r13,r24             /* for this processor.           */
-        mtspr   SPRN_SPRG3,r13
-
         /* ptr to current */
         LOAD_REG_IMMEDIATE(r4, init_task)
         std     r4,PACACURRENT(r13)
@@ -1995,17 +1967,6 @@ _STATIC(start_here_common)
         /* Not reached */
         BUG_OPCODE
 
-/* Put the paca pointer into r13 and SPRG3 */
-_GLOBAL(setup_boot_paca)
-        LOAD_REG_IMMEDIATE(r3, boot_cpuid)
-        lwz     r3,0(r3)
-        LOAD_REG_IMMEDIATE(r4, paca)    /* Get base vaddr of paca array  */
-        mulli   r3,r3,PACA_SIZE         /* Calculate vaddr of right paca */
-        add     r13,r3,r4               /* for this processor.           */
-        mtspr   SPRN_SPRG3,r13
-
-        blr
-
 /*
  * We put a few things here that have to be page-aligned.
  * This stuff goes at the beginning of the bss, which is page-aligned.