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-rw-r--r--arch/powerpc/kernel/head_32.S5
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S
index c16d1354b19d..785af9b56591 100644
--- a/arch/powerpc/kernel/head_32.S
+++ b/arch/powerpc/kernel/head_32.S
@@ -30,6 +30,7 @@
30#include <asm/thread_info.h> 30#include <asm/thread_info.h>
31#include <asm/ppc_asm.h> 31#include <asm/ppc_asm.h>
32#include <asm/asm-offsets.h> 32#include <asm/asm-offsets.h>
33#include <asm/ptrace.h>
33 34
34/* 601 only have IBAT; cr0.eq is set on 601 when using this macro */ 35/* 601 only have IBAT; cr0.eq is set on 601 when using this macro */
35#define LOAD_BAT(n, reg, RA, RB) \ 36#define LOAD_BAT(n, reg, RA, RB) \
@@ -268,8 +269,8 @@ __secondary_hold_acknowledge:
268 li r10,MSR_KERNEL & ~(MSR_IR|MSR_DR); /* can take exceptions */ \ 269 li r10,MSR_KERNEL & ~(MSR_IR|MSR_DR); /* can take exceptions */ \
269 MTMSRD(r10); /* (except for mach check in rtas) */ \ 270 MTMSRD(r10); /* (except for mach check in rtas) */ \
270 stw r0,GPR0(r11); \ 271 stw r0,GPR0(r11); \
271 lis r10,0x7265; /* put exception frame marker */ \ 272 lis r10,STACK_FRAME_REGS_MARKER@ha; /* exception frame marker */ \
272 addi r10,r10,0x6773; \ 273 addi r10,r10,STACK_FRAME_REGS_MARKER@l; \
273 stw r10,8(r11); \ 274 stw r10,8(r11); \
274 SAVE_4GPRS(3, r11); \ 275 SAVE_4GPRS(3, r11); \
275 SAVE_2GPRS(7, r11) 276 SAVE_2GPRS(7, r11)