diff options
Diffstat (limited to 'arch/powerpc/kernel/head_32.S')
-rw-r--r-- | arch/powerpc/kernel/head_32.S | 15 |
1 files changed, 12 insertions, 3 deletions
diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S index a1c4cfd25ded..d794a637e421 100644 --- a/arch/powerpc/kernel/head_32.S +++ b/arch/powerpc/kernel/head_32.S | |||
@@ -511,8 +511,11 @@ InstructionTLBMiss: | |||
511 | and r1,r1,r2 /* writable if _RW and _DIRTY */ | 511 | and r1,r1,r2 /* writable if _RW and _DIRTY */ |
512 | rlwimi r3,r3,32-1,30,30 /* _PAGE_USER -> PP msb */ | 512 | rlwimi r3,r3,32-1,30,30 /* _PAGE_USER -> PP msb */ |
513 | rlwimi r3,r3,32-1,31,31 /* _PAGE_USER -> PP lsb */ | 513 | rlwimi r3,r3,32-1,31,31 /* _PAGE_USER -> PP lsb */ |
514 | ori r1,r1,0xe14 /* clear out reserved bits and M */ | 514 | ori r1,r1,0xe04 /* clear out reserved bits */ |
515 | andc r1,r3,r1 /* PP = user? (rw&dirty? 2: 3): 0 */ | 515 | andc r1,r3,r1 /* PP = user? (rw&dirty? 2: 3): 0 */ |
516 | BEGIN_FTR_SECTION | ||
517 | rlwinm r1,r1,0,~_PAGE_COHERENT /* clear M (coherence not required) */ | ||
518 | END_FTR_SECTION_IFCLR(CPU_FTR_NEED_COHERENT) | ||
516 | mtspr SPRN_RPA,r1 | 519 | mtspr SPRN_RPA,r1 |
517 | mfspr r3,SPRN_IMISS | 520 | mfspr r3,SPRN_IMISS |
518 | tlbli r3 | 521 | tlbli r3 |
@@ -585,8 +588,11 @@ DataLoadTLBMiss: | |||
585 | and r1,r1,r2 /* writable if _RW and _DIRTY */ | 588 | and r1,r1,r2 /* writable if _RW and _DIRTY */ |
586 | rlwimi r3,r3,32-1,30,30 /* _PAGE_USER -> PP msb */ | 589 | rlwimi r3,r3,32-1,30,30 /* _PAGE_USER -> PP msb */ |
587 | rlwimi r3,r3,32-1,31,31 /* _PAGE_USER -> PP lsb */ | 590 | rlwimi r3,r3,32-1,31,31 /* _PAGE_USER -> PP lsb */ |
588 | ori r1,r1,0xe14 /* clear out reserved bits and M */ | 591 | ori r1,r1,0xe04 /* clear out reserved bits */ |
589 | andc r1,r3,r1 /* PP = user? (rw&dirty? 2: 3): 0 */ | 592 | andc r1,r3,r1 /* PP = user? (rw&dirty? 2: 3): 0 */ |
593 | BEGIN_FTR_SECTION | ||
594 | rlwinm r1,r1,0,~_PAGE_COHERENT /* clear M (coherence not required) */ | ||
595 | END_FTR_SECTION_IFCLR(CPU_FTR_NEED_COHERENT) | ||
590 | mtspr SPRN_RPA,r1 | 596 | mtspr SPRN_RPA,r1 |
591 | mfspr r3,SPRN_DMISS | 597 | mfspr r3,SPRN_DMISS |
592 | tlbld r3 | 598 | tlbld r3 |
@@ -653,8 +659,11 @@ DataStoreTLBMiss: | |||
653 | stw r3,0(r2) /* update PTE (accessed/dirty bits) */ | 659 | stw r3,0(r2) /* update PTE (accessed/dirty bits) */ |
654 | /* Convert linux-style PTE to low word of PPC-style PTE */ | 660 | /* Convert linux-style PTE to low word of PPC-style PTE */ |
655 | rlwimi r3,r3,32-1,30,30 /* _PAGE_USER -> PP msb */ | 661 | rlwimi r3,r3,32-1,30,30 /* _PAGE_USER -> PP msb */ |
656 | li r1,0xe15 /* clear out reserved bits and M */ | 662 | li r1,0xe05 /* clear out reserved bits & PP lsb */ |
657 | andc r1,r3,r1 /* PP = user? 2: 0 */ | 663 | andc r1,r3,r1 /* PP = user? 2: 0 */ |
664 | BEGIN_FTR_SECTION | ||
665 | rlwinm r1,r1,0,~_PAGE_COHERENT /* clear M (coherence not required) */ | ||
666 | END_FTR_SECTION_IFCLR(CPU_FTR_NEED_COHERENT) | ||
658 | mtspr SPRN_RPA,r1 | 667 | mtspr SPRN_RPA,r1 |
659 | mfspr r3,SPRN_DMISS | 668 | mfspr r3,SPRN_DMISS |
660 | tlbld r3 | 669 | tlbld r3 |