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-rw-r--r--arch/powerpc/kernel/head_32.S17
1 files changed, 10 insertions, 7 deletions
diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S
index 48469463f89e..fc2132942754 100644
--- a/arch/powerpc/kernel/head_32.S
+++ b/arch/powerpc/kernel/head_32.S
@@ -1124,9 +1124,8 @@ mmu_off:
1124 RFI 1124 RFI
1125 1125
1126/* 1126/*
1127 * Use the first pair of BAT registers to map the 1st 16MB 1127 * On 601, we use 3 BATs to map up to 24M of RAM at _PAGE_OFFSET
1128 * of RAM to PAGE_OFFSET. From this point on we can't safely 1128 * (we keep one for debugging) and on others, we use one 256M BAT.
1129 * call OF any more.
1130 */ 1129 */
1131initial_bats: 1130initial_bats:
1132 lis r11,PAGE_OFFSET@h 1131 lis r11,PAGE_OFFSET@h
@@ -1136,12 +1135,16 @@ initial_bats:
1136 bne 4f 1135 bne 4f
1137 ori r11,r11,4 /* set up BAT registers for 601 */ 1136 ori r11,r11,4 /* set up BAT registers for 601 */
1138 li r8,0x7f /* valid, block length = 8MB */ 1137 li r8,0x7f /* valid, block length = 8MB */
1139 oris r9,r11,0x800000@h /* set up BAT reg for 2nd 8M */
1140 oris r10,r8,0x800000@h /* set up BAT reg for 2nd 8M */
1141 mtspr SPRN_IBAT0U,r11 /* N.B. 601 has valid bit in */ 1138 mtspr SPRN_IBAT0U,r11 /* N.B. 601 has valid bit in */
1142 mtspr SPRN_IBAT0L,r8 /* lower BAT register */ 1139 mtspr SPRN_IBAT0L,r8 /* lower BAT register */
1143 mtspr SPRN_IBAT1U,r9 1140 addis r11,r11,0x800000@h
1144 mtspr SPRN_IBAT1L,r10 1141 addis r8,r8,0x800000@h
1142 mtspr SPRN_IBAT1U,r11
1143 mtspr SPRN_IBAT1L,r8
1144 addis r11,r11,0x800000@h
1145 addis r8,r8,0x800000@h
1146 mtspr SPRN_IBAT2U,r11
1147 mtspr SPRN_IBAT2L,r8
1145 isync 1148 isync
1146 blr 1149 blr
1147 1150