diff options
Diffstat (limited to 'arch/powerpc/kernel/exceptions-64s.S')
-rw-r--r-- | arch/powerpc/kernel/exceptions-64s.S | 44 |
1 files changed, 16 insertions, 28 deletions
diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S index 72644cf22cac..4e9640cc0563 100644 --- a/arch/powerpc/kernel/exceptions-64s.S +++ b/arch/powerpc/kernel/exceptions-64s.S | |||
@@ -24,18 +24,6 @@ | |||
24 | * 0x8000 - : Early init and support code | 24 | * 0x8000 - : Early init and support code |
25 | */ | 25 | */ |
26 | 26 | ||
27 | |||
28 | /* | ||
29 | * SPRG Usage | ||
30 | * | ||
31 | * Register Definition | ||
32 | * | ||
33 | * SPRG0 reserved for hypervisor | ||
34 | * SPRG1 temp - used to save gpr | ||
35 | * SPRG2 temp - used to save gpr | ||
36 | * SPRG3 virt addr of paca | ||
37 | */ | ||
38 | |||
39 | /* | 27 | /* |
40 | * This is the start of the interrupt handlers for pSeries | 28 | * This is the start of the interrupt handlers for pSeries |
41 | * This code runs with relocation off. | 29 | * This code runs with relocation off. |
@@ -53,16 +41,16 @@ __start_interrupts: | |||
53 | . = 0x200 | 41 | . = 0x200 |
54 | _machine_check_pSeries: | 42 | _machine_check_pSeries: |
55 | HMT_MEDIUM | 43 | HMT_MEDIUM |
56 | mtspr SPRN_SPRG1,r13 /* save r13 */ | 44 | mtspr SPRN_SPRG_SCRATCH0,r13 /* save r13 */ |
57 | EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common) | 45 | EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common) |
58 | 46 | ||
59 | . = 0x300 | 47 | . = 0x300 |
60 | .globl data_access_pSeries | 48 | .globl data_access_pSeries |
61 | data_access_pSeries: | 49 | data_access_pSeries: |
62 | HMT_MEDIUM | 50 | HMT_MEDIUM |
63 | mtspr SPRN_SPRG1,r13 | 51 | mtspr SPRN_SPRG_SCRATCH0,r13 |
64 | BEGIN_FTR_SECTION | 52 | BEGIN_FTR_SECTION |
65 | mtspr SPRN_SPRG2,r12 | 53 | mtspr SPRN_SPRG_SCRATCH1,r12 |
66 | mfspr r13,SPRN_DAR | 54 | mfspr r13,SPRN_DAR |
67 | mfspr r12,SPRN_DSISR | 55 | mfspr r12,SPRN_DSISR |
68 | srdi r13,r13,60 | 56 | srdi r13,r13,60 |
@@ -71,7 +59,7 @@ BEGIN_FTR_SECTION | |||
71 | cmpwi r13,0x2c | 59 | cmpwi r13,0x2c |
72 | beq do_stab_bolted_pSeries | 60 | beq do_stab_bolted_pSeries |
73 | mtcrf 0x80,r12 | 61 | mtcrf 0x80,r12 |
74 | mfspr r12,SPRN_SPRG2 | 62 | mfspr r12,SPRN_SPRG_SCRATCH1 |
75 | END_FTR_SECTION_IFCLR(CPU_FTR_SLB) | 63 | END_FTR_SECTION_IFCLR(CPU_FTR_SLB) |
76 | EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, data_access_common) | 64 | EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, data_access_common) |
77 | 65 | ||
@@ -79,8 +67,8 @@ END_FTR_SECTION_IFCLR(CPU_FTR_SLB) | |||
79 | .globl data_access_slb_pSeries | 67 | .globl data_access_slb_pSeries |
80 | data_access_slb_pSeries: | 68 | data_access_slb_pSeries: |
81 | HMT_MEDIUM | 69 | HMT_MEDIUM |
82 | mtspr SPRN_SPRG1,r13 | 70 | mtspr SPRN_SPRG_SCRATCH0,r13 |
83 | mfspr r13,SPRN_SPRG3 /* get paca address into r13 */ | 71 | mfspr r13,SPRN_SPRG_PACA /* get paca address into r13 */ |
84 | std r3,PACA_EXSLB+EX_R3(r13) | 72 | std r3,PACA_EXSLB+EX_R3(r13) |
85 | mfspr r3,SPRN_DAR | 73 | mfspr r3,SPRN_DAR |
86 | std r9,PACA_EXSLB+EX_R9(r13) /* save r9 - r12 */ | 74 | std r9,PACA_EXSLB+EX_R9(r13) /* save r9 - r12 */ |
@@ -93,7 +81,7 @@ data_access_slb_pSeries: | |||
93 | std r10,PACA_EXSLB+EX_R10(r13) | 81 | std r10,PACA_EXSLB+EX_R10(r13) |
94 | std r11,PACA_EXSLB+EX_R11(r13) | 82 | std r11,PACA_EXSLB+EX_R11(r13) |
95 | std r12,PACA_EXSLB+EX_R12(r13) | 83 | std r12,PACA_EXSLB+EX_R12(r13) |
96 | mfspr r10,SPRN_SPRG1 | 84 | mfspr r10,SPRN_SPRG_SCRATCH0 |
97 | std r10,PACA_EXSLB+EX_R13(r13) | 85 | std r10,PACA_EXSLB+EX_R13(r13) |
98 | mfspr r12,SPRN_SRR1 /* and SRR1 */ | 86 | mfspr r12,SPRN_SRR1 /* and SRR1 */ |
99 | #ifndef CONFIG_RELOCATABLE | 87 | #ifndef CONFIG_RELOCATABLE |
@@ -117,8 +105,8 @@ data_access_slb_pSeries: | |||
117 | .globl instruction_access_slb_pSeries | 105 | .globl instruction_access_slb_pSeries |
118 | instruction_access_slb_pSeries: | 106 | instruction_access_slb_pSeries: |
119 | HMT_MEDIUM | 107 | HMT_MEDIUM |
120 | mtspr SPRN_SPRG1,r13 | 108 | mtspr SPRN_SPRG_SCRATCH0,r13 |
121 | mfspr r13,SPRN_SPRG3 /* get paca address into r13 */ | 109 | mfspr r13,SPRN_SPRG_PACA /* get paca address into r13 */ |
122 | std r3,PACA_EXSLB+EX_R3(r13) | 110 | std r3,PACA_EXSLB+EX_R3(r13) |
123 | mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */ | 111 | mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */ |
124 | std r9,PACA_EXSLB+EX_R9(r13) /* save r9 - r12 */ | 112 | std r9,PACA_EXSLB+EX_R9(r13) /* save r9 - r12 */ |
@@ -131,7 +119,7 @@ instruction_access_slb_pSeries: | |||
131 | std r10,PACA_EXSLB+EX_R10(r13) | 119 | std r10,PACA_EXSLB+EX_R10(r13) |
132 | std r11,PACA_EXSLB+EX_R11(r13) | 120 | std r11,PACA_EXSLB+EX_R11(r13) |
133 | std r12,PACA_EXSLB+EX_R12(r13) | 121 | std r12,PACA_EXSLB+EX_R12(r13) |
134 | mfspr r10,SPRN_SPRG1 | 122 | mfspr r10,SPRN_SPRG_SCRATCH0 |
135 | std r10,PACA_EXSLB+EX_R13(r13) | 123 | std r10,PACA_EXSLB+EX_R13(r13) |
136 | mfspr r12,SPRN_SRR1 /* and SRR1 */ | 124 | mfspr r12,SPRN_SRR1 /* and SRR1 */ |
137 | #ifndef CONFIG_RELOCATABLE | 125 | #ifndef CONFIG_RELOCATABLE |
@@ -161,7 +149,7 @@ BEGIN_FTR_SECTION | |||
161 | beq- 1f | 149 | beq- 1f |
162 | END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE) | 150 | END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE) |
163 | mr r9,r13 | 151 | mr r9,r13 |
164 | mfspr r13,SPRN_SPRG3 | 152 | mfspr r13,SPRN_SPRG_PACA |
165 | mfspr r11,SPRN_SRR0 | 153 | mfspr r11,SPRN_SRR0 |
166 | ld r12,PACAKBASE(r13) | 154 | ld r12,PACAKBASE(r13) |
167 | ld r10,PACAKMSR(r13) | 155 | ld r10,PACAKMSR(r13) |
@@ -230,14 +218,14 @@ masked_interrupt: | |||
230 | rotldi r10,r10,16 | 218 | rotldi r10,r10,16 |
231 | mtspr SPRN_SRR1,r10 | 219 | mtspr SPRN_SRR1,r10 |
232 | ld r10,PACA_EXGEN+EX_R10(r13) | 220 | ld r10,PACA_EXGEN+EX_R10(r13) |
233 | mfspr r13,SPRN_SPRG1 | 221 | mfspr r13,SPRN_SPRG_SCRATCH0 |
234 | rfid | 222 | rfid |
235 | b . | 223 | b . |
236 | 224 | ||
237 | .align 7 | 225 | .align 7 |
238 | do_stab_bolted_pSeries: | 226 | do_stab_bolted_pSeries: |
239 | mtcrf 0x80,r12 | 227 | mtcrf 0x80,r12 |
240 | mfspr r12,SPRN_SPRG2 | 228 | mfspr r12,SPRN_SPRG_SCRATCH1 |
241 | EXCEPTION_PROLOG_PSERIES(PACA_EXSLB, .do_stab_bolted) | 229 | EXCEPTION_PROLOG_PSERIES(PACA_EXSLB, .do_stab_bolted) |
242 | 230 | ||
243 | #ifdef CONFIG_PPC_PSERIES | 231 | #ifdef CONFIG_PPC_PSERIES |
@@ -248,14 +236,14 @@ do_stab_bolted_pSeries: | |||
248 | .align 7 | 236 | .align 7 |
249 | system_reset_fwnmi: | 237 | system_reset_fwnmi: |
250 | HMT_MEDIUM | 238 | HMT_MEDIUM |
251 | mtspr SPRN_SPRG1,r13 /* save r13 */ | 239 | mtspr SPRN_SPRG_SCRATCH0,r13 /* save r13 */ |
252 | EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common) | 240 | EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common) |
253 | 241 | ||
254 | .globl machine_check_fwnmi | 242 | .globl machine_check_fwnmi |
255 | .align 7 | 243 | .align 7 |
256 | machine_check_fwnmi: | 244 | machine_check_fwnmi: |
257 | HMT_MEDIUM | 245 | HMT_MEDIUM |
258 | mtspr SPRN_SPRG1,r13 /* save r13 */ | 246 | mtspr SPRN_SPRG_SCRATCH0,r13 /* save r13 */ |
259 | EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common) | 247 | EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common) |
260 | 248 | ||
261 | #endif /* CONFIG_PPC_PSERIES */ | 249 | #endif /* CONFIG_PPC_PSERIES */ |
@@ -270,7 +258,7 @@ slb_miss_user_pseries: | |||
270 | std r10,PACA_EXGEN+EX_R10(r13) | 258 | std r10,PACA_EXGEN+EX_R10(r13) |
271 | std r11,PACA_EXGEN+EX_R11(r13) | 259 | std r11,PACA_EXGEN+EX_R11(r13) |
272 | std r12,PACA_EXGEN+EX_R12(r13) | 260 | std r12,PACA_EXGEN+EX_R12(r13) |
273 | mfspr r10,SPRG1 | 261 | mfspr r10,SPRG_SCRATCH0 |
274 | ld r11,PACA_EXSLB+EX_R9(r13) | 262 | ld r11,PACA_EXSLB+EX_R9(r13) |
275 | ld r12,PACA_EXSLB+EX_R3(r13) | 263 | ld r12,PACA_EXSLB+EX_R3(r13) |
276 | std r10,PACA_EXGEN+EX_R13(r13) | 264 | std r10,PACA_EXGEN+EX_R13(r13) |