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-rw-r--r--arch/powerpc/kernel/exceptions-64e.S17
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/powerpc/kernel/exceptions-64e.S b/arch/powerpc/kernel/exceptions-64e.S
index c98e9d260621..4d0abb4930a1 100644
--- a/arch/powerpc/kernel/exceptions-64e.S
+++ b/arch/powerpc/kernel/exceptions-64e.S
@@ -17,6 +17,7 @@
17#include <asm/cputable.h> 17#include <asm/cputable.h>
18#include <asm/setup.h> 18#include <asm/setup.h>
19#include <asm/thread_info.h> 19#include <asm/thread_info.h>
20#include <asm/reg_a2.h>
20#include <asm/exception-64e.h> 21#include <asm/exception-64e.h>
21#include <asm/bug.h> 22#include <asm/bug.h>
22#include <asm/irqflags.h> 23#include <asm/irqflags.h>
@@ -951,6 +952,22 @@ a2_tlbinit_after_linear_map:
951 .globl a2_tlbinit_after_iprot_flush 952 .globl a2_tlbinit_after_iprot_flush
952a2_tlbinit_after_iprot_flush: 953a2_tlbinit_after_iprot_flush:
953 954
955#ifdef CONFIG_PPC_EARLY_DEBUG_WSP
956 /* Now establish early debug mappings if applicable */
957 /* Restore the MAS0 we used for linear mapping load */
958 mtspr SPRN_MAS0,r11
959
960 lis r3,(MAS1_VALID | MAS1_IPROT)@h
961 ori r3,r3,(BOOK3E_PAGESZ_4K << MAS1_TSIZE_SHIFT)
962 mtspr SPRN_MAS1,r3
963 LOAD_REG_IMMEDIATE(r3, WSP_UART_VIRT | MAS2_I | MAS2_G)
964 mtspr SPRN_MAS2,r3
965 LOAD_REG_IMMEDIATE(r3, WSP_UART_PHYS | MAS3_SR | MAS3_SW)
966 mtspr SPRN_MAS7_MAS3,r3
967 /* re-use the MAS8 value from the linear mapping */
968 tlbwe
969#endif /* CONFIG_PPC_EARLY_DEBUG_WSP */
970
954 PPC_TLBILX(0,0,0) 971 PPC_TLBILX(0,0,0)
955 sync 972 sync
956 isync 973 isync