diff options
Diffstat (limited to 'arch/powerpc/kernel/entry_64.S')
-rw-r--r-- | arch/powerpc/kernel/entry_64.S | 58 |
1 files changed, 26 insertions, 32 deletions
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S index 246b11c4fe7e..ab15b8d057ad 100644 --- a/arch/powerpc/kernel/entry_64.S +++ b/arch/powerpc/kernel/entry_64.S | |||
@@ -465,20 +465,6 @@ BEGIN_FTR_SECTION | |||
465 | std r0, THREAD_EBBHR(r3) | 465 | std r0, THREAD_EBBHR(r3) |
466 | mfspr r0, SPRN_EBBRR | 466 | mfspr r0, SPRN_EBBRR |
467 | std r0, THREAD_EBBRR(r3) | 467 | std r0, THREAD_EBBRR(r3) |
468 | |||
469 | /* PMU registers made user read/(write) by EBB */ | ||
470 | mfspr r0, SPRN_SIAR | ||
471 | std r0, THREAD_SIAR(r3) | ||
472 | mfspr r0, SPRN_SDAR | ||
473 | std r0, THREAD_SDAR(r3) | ||
474 | mfspr r0, SPRN_SIER | ||
475 | std r0, THREAD_SIER(r3) | ||
476 | mfspr r0, SPRN_MMCR0 | ||
477 | std r0, THREAD_MMCR0(r3) | ||
478 | mfspr r0, SPRN_MMCR2 | ||
479 | std r0, THREAD_MMCR2(r3) | ||
480 | mfspr r0, SPRN_MMCRA | ||
481 | std r0, THREAD_MMCRA(r3) | ||
482 | END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S) | 468 | END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S) |
483 | #endif | 469 | #endif |
484 | 470 | ||
@@ -581,20 +567,6 @@ BEGIN_FTR_SECTION | |||
581 | ld r0, THREAD_EBBRR(r4) | 567 | ld r0, THREAD_EBBRR(r4) |
582 | mtspr SPRN_EBBRR, r0 | 568 | mtspr SPRN_EBBRR, r0 |
583 | 569 | ||
584 | /* PMU registers made user read/(write) by EBB */ | ||
585 | ld r0, THREAD_SIAR(r4) | ||
586 | mtspr SPRN_SIAR, r0 | ||
587 | ld r0, THREAD_SDAR(r4) | ||
588 | mtspr SPRN_SDAR, r0 | ||
589 | ld r0, THREAD_SIER(r4) | ||
590 | mtspr SPRN_SIER, r0 | ||
591 | ld r0, THREAD_MMCR0(r4) | ||
592 | mtspr SPRN_MMCR0, r0 | ||
593 | ld r0, THREAD_MMCR2(r4) | ||
594 | mtspr SPRN_MMCR2, r0 | ||
595 | ld r0, THREAD_MMCRA(r4) | ||
596 | mtspr SPRN_MMCRA, r0 | ||
597 | |||
598 | ld r0,THREAD_TAR(r4) | 570 | ld r0,THREAD_TAR(r4) |
599 | mtspr SPRN_TAR,r0 | 571 | mtspr SPRN_TAR,r0 |
600 | END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S) | 572 | END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S) |
@@ -657,21 +629,43 @@ _GLOBAL(ret_from_except_lite) | |||
657 | 629 | ||
658 | CURRENT_THREAD_INFO(r9, r1) | 630 | CURRENT_THREAD_INFO(r9, r1) |
659 | ld r3,_MSR(r1) | 631 | ld r3,_MSR(r1) |
632 | #ifdef CONFIG_PPC_BOOK3E | ||
633 | ld r10,PACACURRENT(r13) | ||
634 | #endif /* CONFIG_PPC_BOOK3E */ | ||
660 | ld r4,TI_FLAGS(r9) | 635 | ld r4,TI_FLAGS(r9) |
661 | andi. r3,r3,MSR_PR | 636 | andi. r3,r3,MSR_PR |
662 | beq resume_kernel | 637 | beq resume_kernel |
638 | #ifdef CONFIG_PPC_BOOK3E | ||
639 | lwz r3,(THREAD+THREAD_DBCR0)(r10) | ||
640 | #endif /* CONFIG_PPC_BOOK3E */ | ||
663 | 641 | ||
664 | /* Check current_thread_info()->flags */ | 642 | /* Check current_thread_info()->flags */ |
665 | andi. r0,r4,_TIF_USER_WORK_MASK | 643 | andi. r0,r4,_TIF_USER_WORK_MASK |
644 | #ifdef CONFIG_PPC_BOOK3E | ||
645 | bne 1f | ||
646 | /* | ||
647 | * Check to see if the dbcr0 register is set up to debug. | ||
648 | * Use the internal debug mode bit to do this. | ||
649 | */ | ||
650 | andis. r0,r3,DBCR0_IDM@h | ||
666 | beq restore | 651 | beq restore |
667 | 652 | mfmsr r0 | |
668 | andi. r0,r4,_TIF_NEED_RESCHED | 653 | rlwinm r0,r0,0,~MSR_DE /* Clear MSR.DE */ |
669 | beq 1f | 654 | mtmsr r0 |
655 | mtspr SPRN_DBCR0,r3 | ||
656 | li r10, -1 | ||
657 | mtspr SPRN_DBSR,r10 | ||
658 | b restore | ||
659 | #else | ||
660 | beq restore | ||
661 | #endif | ||
662 | 1: andi. r0,r4,_TIF_NEED_RESCHED | ||
663 | beq 2f | ||
670 | bl .restore_interrupts | 664 | bl .restore_interrupts |
671 | SCHEDULE_USER | 665 | SCHEDULE_USER |
672 | b .ret_from_except_lite | 666 | b .ret_from_except_lite |
673 | 667 | ||
674 | 1: bl .save_nvgprs | 668 | 2: bl .save_nvgprs |
675 | bl .restore_interrupts | 669 | bl .restore_interrupts |
676 | addi r3,r1,STACK_FRAME_OVERHEAD | 670 | addi r3,r1,STACK_FRAME_OVERHEAD |
677 | bl .do_notify_resume | 671 | bl .do_notify_resume |