1 files changed, 13 insertions, 1 deletions

diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index fbbd3f6f0064..0ec134034899 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -373,8 +373,16 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
 
         ld      r8,KSP(r4)      /* new stack pointer */
 BEGIN_FTR_SECTION
+        b       2f
+END_FTR_SECTION_IFCLR(CPU_FTR_SLB)
+BEGIN_FTR_SECTION
         clrrdi  r6,r8,28        /* get its ESID */
         clrrdi  r9,r1,28        /* get current sp ESID */
+END_FTR_SECTION_IFCLR(CPU_FTR_1T_SEGMENT)
+BEGIN_FTR_SECTION
+        clrrdi  r6,r8,40        /* get its 1T ESID */
+        clrrdi  r9,r1,40        /* get current sp 1T ESID */
+END_FTR_SECTION_IFSET(CPU_FTR_1T_SEGMENT)
         clrldi. r0,r6,2         /* is new ESID c00000000? */
         cmpd    cr1,r6,r9       /* or is new ESID the same as current ESID? */
         cror    eq,4*cr1+eq,eq
@@ -384,6 +392,11 @@ BEGIN_FTR_SECTION
         ld      r7,KSP_VSID(r4) /* Get new stack's VSID */
         oris    r0,r6,(SLB_ESID_V)@h
         ori     r0,r0,(SLB_NUM_BOLTED-1)@l
+BEGIN_FTR_SECTION
+        li      r9,MMU_SEGSIZE_1T       /* insert B field */
+        oris    r6,r6,(MMU_SEGSIZE_1T << SLBIE_SSIZE_SHIFT)@h
+        rldimi  r7,r9,SLB_VSID_SSIZE_SHIFT,0
+END_FTR_SECTION_IFSET(CPU_FTR_1T_SEGMENT)
 
         /* Update the last bolted SLB.  No write barriers are needed
          * here, provided we only update the current CPU's SLB shadow
@@ -401,7 +414,6 @@ BEGIN_FTR_SECTION
         isync
 
 2:
-END_FTR_SECTION_IFSET(CPU_FTR_SLB)
         clrrdi  r7,r8,THREAD_SHIFT      /* base of new stack */
         /* Note: this uses SWITCH_FRAME_SIZE rather than INT_FRAME_SIZE
            because we don't need to leave the 288-byte ABI gap at the