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-rw-r--r--arch/powerpc/kernel/cputable.c106
1 files changed, 53 insertions, 53 deletions
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 1d85cedbbb7b..43c74a6b07b1 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -78,10 +78,8 @@ struct cpu_spec cpu_specs[] = {
78 .dcache_bsize = 128, 78 .dcache_bsize = 128,
79 .num_pmcs = 8, 79 .num_pmcs = 8,
80 .cpu_setup = __setup_cpu_power3, 80 .cpu_setup = __setup_cpu_power3,
81#ifdef CONFIG_OPROFILE
82 .oprofile_cpu_type = "ppc64/power3", 81 .oprofile_cpu_type = "ppc64/power3",
83 .oprofile_model = &op_model_rs64, 82 .oprofile_type = RS64,
84#endif
85 }, 83 },
86 { /* Power3+ */ 84 { /* Power3+ */
87 .pvr_mask = 0xffff0000, 85 .pvr_mask = 0xffff0000,
@@ -93,10 +91,8 @@ struct cpu_spec cpu_specs[] = {
93 .dcache_bsize = 128, 91 .dcache_bsize = 128,
94 .num_pmcs = 8, 92 .num_pmcs = 8,
95 .cpu_setup = __setup_cpu_power3, 93 .cpu_setup = __setup_cpu_power3,
96#ifdef CONFIG_OPROFILE
97 .oprofile_cpu_type = "ppc64/power3", 94 .oprofile_cpu_type = "ppc64/power3",
98 .oprofile_model = &op_model_rs64, 95 .oprofile_type = RS64,
99#endif
100 }, 96 },
101 { /* Northstar */ 97 { /* Northstar */
102 .pvr_mask = 0xffff0000, 98 .pvr_mask = 0xffff0000,
@@ -108,10 +104,8 @@ struct cpu_spec cpu_specs[] = {
108 .dcache_bsize = 128, 104 .dcache_bsize = 128,
109 .num_pmcs = 8, 105 .num_pmcs = 8,
110 .cpu_setup = __setup_cpu_power3, 106 .cpu_setup = __setup_cpu_power3,
111#ifdef CONFIG_OPROFILE
112 .oprofile_cpu_type = "ppc64/rs64", 107 .oprofile_cpu_type = "ppc64/rs64",
113 .oprofile_model = &op_model_rs64, 108 .oprofile_type = RS64,
114#endif
115 }, 109 },
116 { /* Pulsar */ 110 { /* Pulsar */
117 .pvr_mask = 0xffff0000, 111 .pvr_mask = 0xffff0000,
@@ -123,10 +117,8 @@ struct cpu_spec cpu_specs[] = {
123 .dcache_bsize = 128, 117 .dcache_bsize = 128,
124 .num_pmcs = 8, 118 .num_pmcs = 8,
125 .cpu_setup = __setup_cpu_power3, 119 .cpu_setup = __setup_cpu_power3,
126#ifdef CONFIG_OPROFILE
127 .oprofile_cpu_type = "ppc64/rs64", 120 .oprofile_cpu_type = "ppc64/rs64",
128 .oprofile_model = &op_model_rs64, 121 .oprofile_type = RS64,
129#endif
130 }, 122 },
131 { /* I-star */ 123 { /* I-star */
132 .pvr_mask = 0xffff0000, 124 .pvr_mask = 0xffff0000,
@@ -138,10 +130,8 @@ struct cpu_spec cpu_specs[] = {
138 .dcache_bsize = 128, 130 .dcache_bsize = 128,
139 .num_pmcs = 8, 131 .num_pmcs = 8,
140 .cpu_setup = __setup_cpu_power3, 132 .cpu_setup = __setup_cpu_power3,
141#ifdef CONFIG_OPROFILE
142 .oprofile_cpu_type = "ppc64/rs64", 133 .oprofile_cpu_type = "ppc64/rs64",
143 .oprofile_model = &op_model_rs64, 134 .oprofile_type = RS64,
144#endif
145 }, 135 },
146 { /* S-star */ 136 { /* S-star */
147 .pvr_mask = 0xffff0000, 137 .pvr_mask = 0xffff0000,
@@ -153,10 +143,8 @@ struct cpu_spec cpu_specs[] = {
153 .dcache_bsize = 128, 143 .dcache_bsize = 128,
154 .num_pmcs = 8, 144 .num_pmcs = 8,
155 .cpu_setup = __setup_cpu_power3, 145 .cpu_setup = __setup_cpu_power3,
156#ifdef CONFIG_OPROFILE
157 .oprofile_cpu_type = "ppc64/rs64", 146 .oprofile_cpu_type = "ppc64/rs64",
158 .oprofile_model = &op_model_rs64, 147 .oprofile_type = RS64,
159#endif
160 }, 148 },
161 { /* Power4 */ 149 { /* Power4 */
162 .pvr_mask = 0xffff0000, 150 .pvr_mask = 0xffff0000,
@@ -168,10 +156,8 @@ struct cpu_spec cpu_specs[] = {
168 .dcache_bsize = 128, 156 .dcache_bsize = 128,
169 .num_pmcs = 8, 157 .num_pmcs = 8,
170 .cpu_setup = __setup_cpu_power4, 158 .cpu_setup = __setup_cpu_power4,
171#ifdef CONFIG_OPROFILE
172 .oprofile_cpu_type = "ppc64/power4", 159 .oprofile_cpu_type = "ppc64/power4",
173 .oprofile_model = &op_model_rs64, 160 .oprofile_type = POWER4,
174#endif
175 }, 161 },
176 { /* Power4+ */ 162 { /* Power4+ */
177 .pvr_mask = 0xffff0000, 163 .pvr_mask = 0xffff0000,
@@ -183,10 +169,8 @@ struct cpu_spec cpu_specs[] = {
183 .dcache_bsize = 128, 169 .dcache_bsize = 128,
184 .num_pmcs = 8, 170 .num_pmcs = 8,
185 .cpu_setup = __setup_cpu_power4, 171 .cpu_setup = __setup_cpu_power4,
186#ifdef CONFIG_OPROFILE
187 .oprofile_cpu_type = "ppc64/power4", 172 .oprofile_cpu_type = "ppc64/power4",
188 .oprofile_model = &op_model_power4, 173 .oprofile_type = POWER4,
189#endif
190 }, 174 },
191 { /* PPC970 */ 175 { /* PPC970 */
192 .pvr_mask = 0xffff0000, 176 .pvr_mask = 0xffff0000,
@@ -199,10 +183,8 @@ struct cpu_spec cpu_specs[] = {
199 .dcache_bsize = 128, 183 .dcache_bsize = 128,
200 .num_pmcs = 8, 184 .num_pmcs = 8,
201 .cpu_setup = __setup_cpu_ppc970, 185 .cpu_setup = __setup_cpu_ppc970,
202#ifdef CONFIG_OPROFILE
203 .oprofile_cpu_type = "ppc64/970", 186 .oprofile_cpu_type = "ppc64/970",
204 .oprofile_model = &op_model_power4, 187 .oprofile_type = POWER4,
205#endif
206 }, 188 },
207#endif /* CONFIG_PPC64 */ 189#endif /* CONFIG_PPC64 */
208#if defined(CONFIG_PPC64) || defined(CONFIG_POWER4) 190#if defined(CONFIG_PPC64) || defined(CONFIG_POWER4)
@@ -221,10 +203,8 @@ struct cpu_spec cpu_specs[] = {
221 .dcache_bsize = 128, 203 .dcache_bsize = 128,
222 .num_pmcs = 8, 204 .num_pmcs = 8,
223 .cpu_setup = __setup_cpu_ppc970, 205 .cpu_setup = __setup_cpu_ppc970,
224#ifdef CONFIG_OPROFILE
225 .oprofile_cpu_type = "ppc64/970", 206 .oprofile_cpu_type = "ppc64/970",
226 .oprofile_model = &op_model_power4, 207 .oprofile_type = POWER4,
227#endif
228 }, 208 },
229#endif /* defined(CONFIG_PPC64) || defined(CONFIG_POWER4) */ 209#endif /* defined(CONFIG_PPC64) || defined(CONFIG_POWER4) */
230#ifdef CONFIG_PPC64 210#ifdef CONFIG_PPC64
@@ -238,10 +218,8 @@ struct cpu_spec cpu_specs[] = {
238 .icache_bsize = 128, 218 .icache_bsize = 128,
239 .dcache_bsize = 128, 219 .dcache_bsize = 128,
240 .cpu_setup = __setup_cpu_ppc970, 220 .cpu_setup = __setup_cpu_ppc970,
241#ifdef CONFIG_OPROFILE
242 .oprofile_cpu_type = "ppc64/970", 221 .oprofile_cpu_type = "ppc64/970",
243 .oprofile_model = &op_model_power4, 222 .oprofile_type = POWER4,
244#endif
245 }, 223 },
246 { /* Power5 GR */ 224 { /* Power5 GR */
247 .pvr_mask = 0xffff0000, 225 .pvr_mask = 0xffff0000,
@@ -253,27 +231,23 @@ struct cpu_spec cpu_specs[] = {
253 .dcache_bsize = 128, 231 .dcache_bsize = 128,
254 .num_pmcs = 6, 232 .num_pmcs = 6,
255 .cpu_setup = __setup_cpu_power4, 233 .cpu_setup = __setup_cpu_power4,
256#ifdef CONFIG_OPROFILE
257 .oprofile_cpu_type = "ppc64/power5", 234 .oprofile_cpu_type = "ppc64/power5",
258 .oprofile_model = &op_model_power4, 235 .oprofile_type = POWER4,
259#endif
260 }, 236 },
261 { /* Power5 GS */ 237 { /* Power5 GS */
262 .pvr_mask = 0xffff0000, 238 .pvr_mask = 0xffff0000,
263 .pvr_value = 0x003b0000, 239 .pvr_value = 0x003b0000,
264 .cpu_name = "POWER5 (gs)", 240 .cpu_name = "POWER5+ (gs)",
265 .cpu_features = CPU_FTRS_POWER5, 241 .cpu_features = CPU_FTRS_POWER5,
266 .cpu_user_features = COMMON_USER_POWER5_PLUS, 242 .cpu_user_features = COMMON_USER_POWER5_PLUS,
267 .icache_bsize = 128, 243 .icache_bsize = 128,
268 .dcache_bsize = 128, 244 .dcache_bsize = 128,
269 .num_pmcs = 6, 245 .num_pmcs = 6,
270 .cpu_setup = __setup_cpu_power4, 246 .cpu_setup = __setup_cpu_power4,
271#ifdef CONFIG_OPROFILE 247 .oprofile_cpu_type = "ppc64/power5+",
272 .oprofile_cpu_type = "ppc64/power5", 248 .oprofile_type = POWER4,
273 .oprofile_model = &op_model_power4,
274#endif
275 }, 249 },
276 { /* BE DD1.x */ 250 { /* Cell Broadband Engine */
277 .pvr_mask = 0xffff0000, 251 .pvr_mask = 0xffff0000,
278 .pvr_value = 0x00700000, 252 .pvr_value = 0x00700000,
279 .cpu_name = "Cell Broadband Engine", 253 .cpu_name = "Cell Broadband Engine",
@@ -545,7 +519,9 @@ struct cpu_spec cpu_specs[] = {
545 .icache_bsize = 32, 519 .icache_bsize = 32,
546 .dcache_bsize = 32, 520 .dcache_bsize = 32,
547 .num_pmcs = 6, 521 .num_pmcs = 6,
548 .cpu_setup = __setup_cpu_745x 522 .cpu_setup = __setup_cpu_745x,
523 .oprofile_cpu_type = "ppc/7450",
524 .oprofile_type = G4,
549 }, 525 },
550 { /* 7450 2.1 */ 526 { /* 7450 2.1 */
551 .pvr_mask = 0xffffffff, 527 .pvr_mask = 0xffffffff,
@@ -556,7 +532,9 @@ struct cpu_spec cpu_specs[] = {
556 .icache_bsize = 32, 532 .icache_bsize = 32,
557 .dcache_bsize = 32, 533 .dcache_bsize = 32,
558 .num_pmcs = 6, 534 .num_pmcs = 6,
559 .cpu_setup = __setup_cpu_745x 535 .cpu_setup = __setup_cpu_745x,
536 .oprofile_cpu_type = "ppc/7450",
537 .oprofile_type = G4,
560 }, 538 },
561 { /* 7450 2.3 and newer */ 539 { /* 7450 2.3 and newer */
562 .pvr_mask = 0xffff0000, 540 .pvr_mask = 0xffff0000,
@@ -567,7 +545,9 @@ struct cpu_spec cpu_specs[] = {
567 .icache_bsize = 32, 545 .icache_bsize = 32,
568 .dcache_bsize = 32, 546 .dcache_bsize = 32,
569 .num_pmcs = 6, 547 .num_pmcs = 6,
570 .cpu_setup = __setup_cpu_745x 548 .cpu_setup = __setup_cpu_745x,
549 .oprofile_cpu_type = "ppc/7450",
550 .oprofile_type = G4,
571 }, 551 },
572 { /* 7455 rev 1.x */ 552 { /* 7455 rev 1.x */
573 .pvr_mask = 0xffffff00, 553 .pvr_mask = 0xffffff00,
@@ -578,7 +558,9 @@ struct cpu_spec cpu_specs[] = {
578 .icache_bsize = 32, 558 .icache_bsize = 32,
579 .dcache_bsize = 32, 559 .dcache_bsize = 32,
580 .num_pmcs = 6, 560 .num_pmcs = 6,
581 .cpu_setup = __setup_cpu_745x 561 .cpu_setup = __setup_cpu_745x,
562 .oprofile_cpu_type = "ppc/7450",
563 .oprofile_type = G4,
582 }, 564 },
583 { /* 7455 rev 2.0 */ 565 { /* 7455 rev 2.0 */
584 .pvr_mask = 0xffffffff, 566 .pvr_mask = 0xffffffff,
@@ -589,7 +571,9 @@ struct cpu_spec cpu_specs[] = {
589 .icache_bsize = 32, 571 .icache_bsize = 32,
590 .dcache_bsize = 32, 572 .dcache_bsize = 32,
591 .num_pmcs = 6, 573 .num_pmcs = 6,
592 .cpu_setup = __setup_cpu_745x 574 .cpu_setup = __setup_cpu_745x,
575 .oprofile_cpu_type = "ppc/7450",
576 .oprofile_type = G4,
593 }, 577 },
594 { /* 7455 others */ 578 { /* 7455 others */
595 .pvr_mask = 0xffff0000, 579 .pvr_mask = 0xffff0000,
@@ -600,7 +584,9 @@ struct cpu_spec cpu_specs[] = {
600 .icache_bsize = 32, 584 .icache_bsize = 32,
601 .dcache_bsize = 32, 585 .dcache_bsize = 32,
602 .num_pmcs = 6, 586 .num_pmcs = 6,
603 .cpu_setup = __setup_cpu_745x 587 .cpu_setup = __setup_cpu_745x,
588 .oprofile_cpu_type = "ppc/7450",
589 .oprofile_type = G4,
604 }, 590 },
605 { /* 7447/7457 Rev 1.0 */ 591 { /* 7447/7457 Rev 1.0 */
606 .pvr_mask = 0xffffffff, 592 .pvr_mask = 0xffffffff,
@@ -611,7 +597,9 @@ struct cpu_spec cpu_specs[] = {
611 .icache_bsize = 32, 597 .icache_bsize = 32,
612 .dcache_bsize = 32, 598 .dcache_bsize = 32,
613 .num_pmcs = 6, 599 .num_pmcs = 6,
614 .cpu_setup = __setup_cpu_745x 600 .cpu_setup = __setup_cpu_745x,
601 .oprofile_cpu_type = "ppc/7450",
602 .oprofile_type = G4,
615 }, 603 },
616 { /* 7447/7457 Rev 1.1 */ 604 { /* 7447/7457 Rev 1.1 */
617 .pvr_mask = 0xffffffff, 605 .pvr_mask = 0xffffffff,
@@ -622,7 +610,9 @@ struct cpu_spec cpu_specs[] = {
622 .icache_bsize = 32, 610 .icache_bsize = 32,
623 .dcache_bsize = 32, 611 .dcache_bsize = 32,
624 .num_pmcs = 6, 612 .num_pmcs = 6,
625 .cpu_setup = __setup_cpu_745x 613 .cpu_setup = __setup_cpu_745x,
614 .oprofile_cpu_type = "ppc/7450",
615 .oprofile_type = G4,
626 }, 616 },
627 { /* 7447/7457 Rev 1.2 and later */ 617 { /* 7447/7457 Rev 1.2 and later */
628 .pvr_mask = 0xffff0000, 618 .pvr_mask = 0xffff0000,
@@ -633,7 +623,9 @@ struct cpu_spec cpu_specs[] = {
633 .icache_bsize = 32, 623 .icache_bsize = 32,
634 .dcache_bsize = 32, 624 .dcache_bsize = 32,
635 .num_pmcs = 6, 625 .num_pmcs = 6,
636 .cpu_setup = __setup_cpu_745x 626 .cpu_setup = __setup_cpu_745x,
627 .oprofile_cpu_type = "ppc/7450",
628 .oprofile_type = G4,
637 }, 629 },
638 { /* 7447A */ 630 { /* 7447A */
639 .pvr_mask = 0xffff0000, 631 .pvr_mask = 0xffff0000,
@@ -644,7 +636,9 @@ struct cpu_spec cpu_specs[] = {
644 .icache_bsize = 32, 636 .icache_bsize = 32,
645 .dcache_bsize = 32, 637 .dcache_bsize = 32,
646 .num_pmcs = 6, 638 .num_pmcs = 6,
647 .cpu_setup = __setup_cpu_745x 639 .cpu_setup = __setup_cpu_745x,
640 .oprofile_cpu_type = "ppc/7450",
641 .oprofile_type = G4,
648 }, 642 },
649 { /* 7448 */ 643 { /* 7448 */
650 .pvr_mask = 0xffff0000, 644 .pvr_mask = 0xffff0000,
@@ -655,7 +649,9 @@ struct cpu_spec cpu_specs[] = {
655 .icache_bsize = 32, 649 .icache_bsize = 32,
656 .dcache_bsize = 32, 650 .dcache_bsize = 32,
657 .num_pmcs = 6, 651 .num_pmcs = 6,
658 .cpu_setup = __setup_cpu_745x 652 .cpu_setup = __setup_cpu_745x,
653 .oprofile_cpu_type = "ppc/7450",
654 .oprofile_type = G4,
659 }, 655 },
660 { /* 82xx (8240, 8245, 8260 are all 603e cores) */ 656 { /* 82xx (8240, 8245, 8260 are all 603e cores) */
661 .pvr_mask = 0x7fff0000, 657 .pvr_mask = 0x7fff0000,
@@ -979,6 +975,8 @@ struct cpu_spec cpu_specs[] = {
979 .icache_bsize = 32, 975 .icache_bsize = 32,
980 .dcache_bsize = 32, 976 .dcache_bsize = 32,
981 .num_pmcs = 4, 977 .num_pmcs = 4,
978 .oprofile_cpu_type = "ppc/e500",
979 .oprofile_type = BOOKE,
982 }, 980 },
983 { /* e500v2 */ 981 { /* e500v2 */
984 .pvr_mask = 0xffff0000, 982 .pvr_mask = 0xffff0000,
@@ -992,6 +990,8 @@ struct cpu_spec cpu_specs[] = {
992 .icache_bsize = 32, 990 .icache_bsize = 32,
993 .dcache_bsize = 32, 991 .dcache_bsize = 32,
994 .num_pmcs = 4, 992 .num_pmcs = 4,
993 .oprofile_cpu_type = "ppc/e500",
994 .oprofile_type = BOOKE,
995 }, 995 },
996#endif 996#endif
997#if !CLASSIC_PPC 997#if !CLASSIC_PPC
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-26 16:15:19 -0500