1 files changed, 136 insertions, 7 deletions

diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 47a613cdd775..b742013bb9da 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -18,6 +18,7 @@
 
 #include <asm/oprofile_impl.h>
 #include <asm/cputable.h>
+#include <asm/prom.h>           /* for PTRRELOC on ARCH=ppc */
 
 struct cpu_spec* cur_cpu_spec = NULL;
 EXPORT_SYMBOL(cur_cpu_spec);
@@ -41,6 +42,7 @@ extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
 #endif /* CONFIG_PPC32 */
 #ifdef CONFIG_PPC64
 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
+extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
 extern void __restore_cpu_ppc970(void);
 #endif /* CONFIG_PPC64 */
 
@@ -73,7 +75,7 @@ extern void __restore_cpu_ppc970(void);
 #define PPC_FEATURE_SPE_COMP    0
 #endif
 
-struct cpu_spec cpu_specs[] = {
+static struct cpu_spec cpu_specs[] = {
 #ifdef CONFIG_PPC64
         {       /* Power3 */
                 .pvr_mask               = 0xffff0000,
@@ -221,8 +223,23 @@ struct cpu_spec	cpu_specs[] = {
                 .icache_bsize           = 128,
                 .dcache_bsize           = 128,
                 .num_pmcs               = 8,
-                .cpu_setup              = __setup_cpu_ppc970,
+                .cpu_setup              = __setup_cpu_ppc970MP,
                 .cpu_restore            = __restore_cpu_ppc970,
+                .oprofile_cpu_type      = "ppc64/970MP",
+                .oprofile_type          = PPC_OPROFILE_POWER4,
+                .platform               = "ppc970",
+        },
+        {       /* PPC970GX */
+                .pvr_mask               = 0xffff0000,
+                .pvr_value              = 0x00450000,
+                .cpu_name               = "PPC970GX",
+                .cpu_features           = CPU_FTRS_PPC970,
+                .cpu_user_features      = COMMON_USER_POWER4 |
+                        PPC_FEATURE_HAS_ALTIVEC_COMP,
+                .icache_bsize           = 128,
+                .dcache_bsize           = 128,
+                .num_pmcs               = 8,
+                .cpu_setup              = __setup_cpu_ppc970,
                 .oprofile_cpu_type      = "ppc64/970",
                 .oprofile_type          = PPC_OPROFILE_POWER4,
                 .platform               = "ppc970",
@@ -260,15 +277,50 @@ struct cpu_spec	cpu_specs[] = {
                 .oprofile_mmcra_sipr    = MMCRA_SIPR,
                 .platform               = "power5+",
         },
+        {       /* POWER6 in P5+ mode; 2.04-compliant processor */
+                .pvr_mask               = 0xffffffff,
+                .pvr_value              = 0x0f000001,
+                .cpu_name               = "POWER5+",
+                .cpu_features           = CPU_FTRS_POWER5,
+                .cpu_user_features      = COMMON_USER_POWER5_PLUS,
+                .icache_bsize           = 128,
+                .dcache_bsize           = 128,
+                .num_pmcs               = 6,
+                .oprofile_cpu_type      = "ppc64/power6",
+                .oprofile_type          = PPC_OPROFILE_POWER4,
+                .oprofile_mmcra_sihv    = POWER6_MMCRA_SIHV,
+                .oprofile_mmcra_sipr    = POWER6_MMCRA_SIPR,
+                .oprofile_mmcra_clear   = POWER6_MMCRA_THRM |
+                        POWER6_MMCRA_OTHER,
+                .platform               = "power5+",
+        },
         {       /* Power6 */
                 .pvr_mask               = 0xffff0000,
                 .pvr_value              = 0x003e0000,
-                .cpu_name               = "POWER6",
+                .cpu_name               = "POWER6 (raw)",
+                .cpu_features           = CPU_FTRS_POWER6,
+                .cpu_user_features      = COMMON_USER_POWER6 |
+                        PPC_FEATURE_POWER6_EXT,
+                .icache_bsize           = 128,
+                .dcache_bsize           = 128,
+                .num_pmcs               = 6,
+                .oprofile_cpu_type      = "ppc64/power6",
+                .oprofile_type          = PPC_OPROFILE_POWER4,
+                .oprofile_mmcra_sihv    = POWER6_MMCRA_SIHV,
+                .oprofile_mmcra_sipr    = POWER6_MMCRA_SIPR,
+                .oprofile_mmcra_clear   = POWER6_MMCRA_THRM |
+                        POWER6_MMCRA_OTHER,
+                .platform               = "power6x",
+        },
+        {       /* 2.05-compliant processor, i.e. Power6 "architected" mode */
+                .pvr_mask               = 0xffffffff,
+                .pvr_value              = 0x0f000002,
+                .cpu_name               = "POWER6 (architected)",
                 .cpu_features           = CPU_FTRS_POWER6,
                 .cpu_user_features      = COMMON_USER_POWER6,
                 .icache_bsize           = 128,
                 .dcache_bsize           = 128,
-                .num_pmcs               = 8,
+                .num_pmcs               = 6,
                 .oprofile_cpu_type      = "ppc64/power6",
                 .oprofile_type          = PPC_OPROFILE_POWER4,
                 .oprofile_mmcra_sihv    = POWER6_MMCRA_SIHV,
@@ -287,6 +339,9 @@ struct cpu_spec	cpu_specs[] = {
                         PPC_FEATURE_SMT,
                 .icache_bsize           = 128,
                 .dcache_bsize           = 128,
+                .num_pmcs               = 4,
+                .oprofile_cpu_type      = "ppc64/cell-be",
+                .oprofile_type          = PPC_OPROFILE_CELL,
                 .platform               = "ppc-cell-be",
         },
         {       /* PA Semi PA6T */
@@ -778,13 +833,24 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0x7fff0000,
                 .pvr_value              = 0x00840000,
                 .cpu_name               = "e300c2",
-                .cpu_features           = CPU_FTRS_E300,
+                .cpu_features           = CPU_FTRS_E300C2,
                 .cpu_user_features      = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .cpu_setup              = __setup_cpu_603,
                 .platform               = "ppc603",
         },
+        {       /* e300c3 on 83xx  */
+                .pvr_mask               = 0x7fff0000,
+                .pvr_value              = 0x00850000,
+                .cpu_name               = "e300c3",
+                .cpu_features           = CPU_FTRS_E300,
+                .cpu_user_features      = COMMON_USER,
+                .icache_bsize           = 32,
+                .dcache_bsize           = 32,
+                .cpu_setup              = __setup_cpu_603,
+                .platform               = "ppc603",
+        },
         {       /* default match, we assume split I/D cache & TB (non-601)... */
                 .pvr_mask               = 0x00000000,
                 .pvr_value              = 0x00000000,
@@ -1070,8 +1136,7 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xff000fff,
                 .pvr_value              = 0x53000890,
                 .cpu_name               = "440SPe Rev. A",
-                .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
-                        CPU_FTR_USE_TB,
+                .cpu_features           = CPU_FTRS_44X,
                 .cpu_user_features      = COMMON_USER_BOOKE,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
@@ -1152,3 +1217,67 @@ struct cpu_spec	cpu_specs[] = {
 #endif /* !CLASSIC_PPC */
 #endif /* CONFIG_PPC32 */
 };
+
+struct cpu_spec *identify_cpu(unsigned long offset, unsigned int pvr)
+{
+        struct cpu_spec *s = cpu_specs;
+        struct cpu_spec **cur = &cur_cpu_spec;
+        int i;
+
+        s = PTRRELOC(s);
+        cur = PTRRELOC(cur);
+
+        for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++)
+                if ((pvr & s->pvr_mask) == s->pvr_value) {
+                        *cur = cpu_specs + i;
+#ifdef CONFIG_PPC64
+                        /* ppc64 expects identify_cpu to also call setup_cpu
+                         * for that processor. I will consolidate that at a
+                         * later time, for now, just use our friend #ifdef.
+                         * we also don't need to PTRRELOC the function pointer
+                         * on ppc64 as we are running at 0 in real mode.
+                         */
+                        if (s->cpu_setup) {
+                                s->cpu_setup(offset, s);
+                        }
+#endif /* CONFIG_PPC64 */
+                        return s;
+                }
+        BUG();
+        return NULL;
+}
+
+void do_feature_fixups(unsigned long value, void *fixup_start, void *fixup_end)
+{
+        struct fixup_entry {
+                unsigned long   mask;
+                unsigned long   value;
+                long            start_off;
+                long            end_off;
+        } *fcur, *fend;
+
+        fcur = fixup_start;
+        fend = fixup_end;
+
+        for (; fcur < fend; fcur++) {
+                unsigned int *pstart, *pend, *p;
+
+                if ((value & fcur->mask) == fcur->value)
+                        continue;
+
+                /* These PTRRELOCs will disappear once the new scheme for
+                 * modules and vdso is implemented
+                 */
+                pstart = ((unsigned int *)fcur) + (fcur->start_off / 4);
+                pend = ((unsigned int *)fcur) + (fcur->end_off / 4);
+
+                for (p = pstart; p < pend; p++) {
+                        *p = 0x60000000u;
+                        asm volatile ("dcbst 0, %0" : : "r" (p));
+                }
+                asm volatile ("sync" : : : "memory");
+                for (p = pstart; p < pend; p++)
+                        asm volatile ("icbi 0,%0" : : "r" (p));
+                asm volatile ("sync; isync" : : : "memory");
+        }
+}