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-rw-r--r--arch/powerpc/include/asm/cputable.h10
-rw-r--r--arch/powerpc/include/asm/dcr-regs.h7
-rw-r--r--arch/powerpc/include/asm/device.h3
-rw-r--r--arch/powerpc/include/asm/dma-mapping.h187
-rw-r--r--arch/powerpc/include/asm/exception.h42
-rw-r--r--arch/powerpc/include/asm/fsl_lbc.h48
-rw-r--r--arch/powerpc/include/asm/highmem.h2
-rw-r--r--arch/powerpc/include/asm/io.h2
-rw-r--r--arch/powerpc/include/asm/irq.h18
-rw-r--r--arch/powerpc/include/asm/machdep.h5
-rw-r--r--arch/powerpc/include/asm/mman.h2
-rw-r--r--arch/powerpc/include/asm/mmu-hash64.h2
-rw-r--r--arch/powerpc/include/asm/mpic.h4
-rw-r--r--arch/powerpc/include/asm/msi_bitmap.h35
-rw-r--r--arch/powerpc/include/asm/of_device.h3
-rw-r--r--arch/powerpc/include/asm/of_platform.h3
-rw-r--r--arch/powerpc/include/asm/paca.h2
-rw-r--r--arch/powerpc/include/asm/page.h14
-rw-r--r--arch/powerpc/include/asm/page_32.h8
-rw-r--r--arch/powerpc/include/asm/pci.h14
-rw-r--r--arch/powerpc/include/asm/pgtable-ppc32.h72
-rw-r--r--arch/powerpc/include/asm/pgtable-ppc64.h12
-rw-r--r--arch/powerpc/include/asm/ppc_asm.h2
-rw-r--r--arch/powerpc/include/asm/reg_booke.h7
-rw-r--r--arch/powerpc/include/asm/sections.h6
-rw-r--r--arch/powerpc/include/asm/sfp-machine.h353
-rw-r--r--arch/powerpc/include/asm/smp.h42
-rw-r--r--arch/powerpc/include/asm/systbl.h2
-rw-r--r--arch/powerpc/include/asm/tlbflush.h13
-rw-r--r--arch/powerpc/include/asm/types.h2
30 files changed, 640 insertions, 282 deletions
diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h
index ef8a248dfd55..1e94b07a020e 100644
--- a/arch/powerpc/include/asm/cputable.h
+++ b/arch/powerpc/include/asm/cputable.h
@@ -62,6 +62,7 @@ enum powerpc_pmc_type {
62 PPC_PMC_DEFAULT = 0, 62 PPC_PMC_DEFAULT = 0,
63 PPC_PMC_IBM = 1, 63 PPC_PMC_IBM = 1,
64 PPC_PMC_PA6T = 2, 64 PPC_PMC_PA6T = 2,
65 PPC_PMC_G4 = 3,
65}; 66};
66 67
67struct pt_regs; 68struct pt_regs;
@@ -192,6 +193,7 @@ extern const char *powerpc_base_platform;
192#define CPU_FTR_NO_SLBIE_B LONG_ASM_CONST(0x0008000000000000) 193#define CPU_FTR_NO_SLBIE_B LONG_ASM_CONST(0x0008000000000000)
193#define CPU_FTR_VSX LONG_ASM_CONST(0x0010000000000000) 194#define CPU_FTR_VSX LONG_ASM_CONST(0x0010000000000000)
194#define CPU_FTR_SAO LONG_ASM_CONST(0x0020000000000000) 195#define CPU_FTR_SAO LONG_ASM_CONST(0x0020000000000000)
196#define CPU_FTR_CP_USE_DCBTZ LONG_ASM_CONST(0x0040000000000000)
195 197
196#ifndef __ASSEMBLY__ 198#ifndef __ASSEMBLY__
197 199
@@ -387,10 +389,11 @@ extern const char *powerpc_base_platform;
387 CPU_FTR_MMCRA | CPU_FTR_CTRL) 389 CPU_FTR_MMCRA | CPU_FTR_CTRL)
388#define CPU_FTRS_POWER4 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ 390#define CPU_FTRS_POWER4 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
389 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ 391 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
390 CPU_FTR_MMCRA) 392 CPU_FTR_MMCRA | CPU_FTR_CP_USE_DCBTZ)
391#define CPU_FTRS_PPC970 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ 393#define CPU_FTRS_PPC970 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
392 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ 394 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
393 CPU_FTR_ALTIVEC_COMP | CPU_FTR_CAN_NAP | CPU_FTR_MMCRA) 395 CPU_FTR_ALTIVEC_COMP | CPU_FTR_CAN_NAP | CPU_FTR_MMCRA | \
396 CPU_FTR_CP_USE_DCBTZ)
394#define CPU_FTRS_POWER5 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ 397#define CPU_FTRS_POWER5 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
395 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ 398 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
396 CPU_FTR_MMCRA | CPU_FTR_SMT | \ 399 CPU_FTR_MMCRA | CPU_FTR_SMT | \
@@ -411,7 +414,8 @@ extern const char *powerpc_base_platform;
411#define CPU_FTRS_CELL (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ 414#define CPU_FTRS_CELL (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
412 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ 415 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
413 CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \ 416 CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \
414 CPU_FTR_PAUSE_ZERO | CPU_FTR_CI_LARGE_PAGE | CPU_FTR_CELL_TB_BUG) 417 CPU_FTR_PAUSE_ZERO | CPU_FTR_CI_LARGE_PAGE | \
418 CPU_FTR_CELL_TB_BUG | CPU_FTR_CP_USE_DCBTZ)
415#define CPU_FTRS_PA6T (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ 419#define CPU_FTRS_PA6T (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
416 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | \ 420 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | \
417 CPU_FTR_ALTIVEC_COMP | CPU_FTR_CI_LARGE_PAGE | \ 421 CPU_FTR_ALTIVEC_COMP | CPU_FTR_CI_LARGE_PAGE | \
diff --git a/arch/powerpc/include/asm/dcr-regs.h b/arch/powerpc/include/asm/dcr-regs.h
index f15296cf3598..828e3aa1f2fc 100644
--- a/arch/powerpc/include/asm/dcr-regs.h
+++ b/arch/powerpc/include/asm/dcr-regs.h
@@ -68,6 +68,13 @@
68#define SDR0_UART3 0x0123 68#define SDR0_UART3 0x0123
69#define SDR0_CUST0 0x4000 69#define SDR0_CUST0 0x4000
70 70
71/* SDR for 405EZ */
72#define DCRN_SDR_ICINTSTAT 0x4510
73#define ICINTSTAT_ICRX 0x80000000
74#define ICINTSTAT_ICTX0 0x40000000
75#define ICINTSTAT_ICTX1 0x20000000
76#define ICINTSTAT_ICTX 0x60000000
77
71/* SDRs (460EX/460GT) */ 78/* SDRs (460EX/460GT) */
72#define SDR0_ETH_CFG 0x4103 79#define SDR0_ETH_CFG 0x4103
73#define SDR0_ETH_CFG_ECS 0x00000100 /* EMAC int clk source */ 80#define SDR0_ETH_CFG_ECS 0x00000100 /* EMAC int clk source */
diff --git a/arch/powerpc/include/asm/device.h b/arch/powerpc/include/asm/device.h
index 228ab2a315b9..dfd504caccc1 100644
--- a/arch/powerpc/include/asm/device.h
+++ b/arch/powerpc/include/asm/device.h
@@ -16,9 +16,6 @@ struct dev_archdata {
16 /* DMA operations on that device */ 16 /* DMA operations on that device */
17 struct dma_mapping_ops *dma_ops; 17 struct dma_mapping_ops *dma_ops;
18 void *dma_data; 18 void *dma_data;
19
20 /* NUMA node if applicable */
21 int numa_node;
22}; 19};
23 20
24#endif /* _ASM_POWERPC_DEVICE_H */ 21#endif /* _ASM_POWERPC_DEVICE_H */
diff --git a/arch/powerpc/include/asm/dma-mapping.h b/arch/powerpc/include/asm/dma-mapping.h
index c7ca45f97dd2..fddb229bd74f 100644
--- a/arch/powerpc/include/asm/dma-mapping.h
+++ b/arch/powerpc/include/asm/dma-mapping.h
@@ -44,8 +44,6 @@ extern void __dma_sync_page(struct page *page, unsigned long offset,
44 44
45#endif /* ! CONFIG_NOT_COHERENT_CACHE */ 45#endif /* ! CONFIG_NOT_COHERENT_CACHE */
46 46
47#ifdef CONFIG_PPC64
48
49static inline unsigned long device_to_mask(struct device *dev) 47static inline unsigned long device_to_mask(struct device *dev)
50{ 48{
51 if (dev->dma_mask && *dev->dma_mask) 49 if (dev->dma_mask && *dev->dma_mask)
@@ -76,8 +74,24 @@ struct dma_mapping_ops {
76 struct dma_attrs *attrs); 74 struct dma_attrs *attrs);
77 int (*dma_supported)(struct device *dev, u64 mask); 75 int (*dma_supported)(struct device *dev, u64 mask);
78 int (*set_dma_mask)(struct device *dev, u64 dma_mask); 76 int (*set_dma_mask)(struct device *dev, u64 dma_mask);
77 dma_addr_t (*map_page)(struct device *dev, struct page *page,
78 unsigned long offset, size_t size,
79 enum dma_data_direction direction,
80 struct dma_attrs *attrs);
81 void (*unmap_page)(struct device *dev,
82 dma_addr_t dma_address, size_t size,
83 enum dma_data_direction direction,
84 struct dma_attrs *attrs);
79}; 85};
80 86
87/*
88 * Available generic sets of operations
89 */
90#ifdef CONFIG_PPC64
91extern struct dma_mapping_ops dma_iommu_ops;
92#endif
93extern struct dma_mapping_ops dma_direct_ops;
94
81static inline struct dma_mapping_ops *get_dma_ops(struct device *dev) 95static inline struct dma_mapping_ops *get_dma_ops(struct device *dev)
82{ 96{
83 /* We don't handle the NULL dev case for ISA for now. We could 97 /* We don't handle the NULL dev case for ISA for now. We could
@@ -85,8 +99,19 @@ static inline struct dma_mapping_ops *get_dma_ops(struct device *dev)
85 * only ISA DMA device we support is the floppy and we have a hack 99 * only ISA DMA device we support is the floppy and we have a hack
86 * in the floppy driver directly to get a device for us. 100 * in the floppy driver directly to get a device for us.
87 */ 101 */
88 if (unlikely(dev == NULL || dev->archdata.dma_ops == NULL)) 102
103 if (unlikely(dev == NULL) || dev->archdata.dma_ops == NULL) {
104#ifdef CONFIG_PPC64
89 return NULL; 105 return NULL;
106#else
107 /* Use default on 32-bit if dma_ops is not set up */
108 /* TODO: Long term, we should fix drivers so that dev and
109 * archdata dma_ops are set up for all buses.
110 */
111 return &dma_direct_ops;
112#endif
113 }
114
90 return dev->archdata.dma_ops; 115 return dev->archdata.dma_ops;
91} 116}
92 117
@@ -123,6 +148,12 @@ static inline int dma_set_mask(struct device *dev, u64 dma_mask)
123 return 0; 148 return 0;
124} 149}
125 150
151/*
152 * TODO: map_/unmap_single will ideally go away, to be completely
153 * replaced by map/unmap_page. Until then, we allow dma_ops to have
154 * one or the other, or both by checking to see if the specific
155 * function requested exists; and if not, falling back on the other set.
156 */
126static inline dma_addr_t dma_map_single_attrs(struct device *dev, 157static inline dma_addr_t dma_map_single_attrs(struct device *dev,
127 void *cpu_addr, 158 void *cpu_addr,
128 size_t size, 159 size_t size,
@@ -132,7 +163,14 @@ static inline dma_addr_t dma_map_single_attrs(struct device *dev,
132 struct dma_mapping_ops *dma_ops = get_dma_ops(dev); 163 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
133 164
134 BUG_ON(!dma_ops); 165 BUG_ON(!dma_ops);
135 return dma_ops->map_single(dev, cpu_addr, size, direction, attrs); 166
167 if (dma_ops->map_single)
168 return dma_ops->map_single(dev, cpu_addr, size, direction,
169 attrs);
170
171 return dma_ops->map_page(dev, virt_to_page(cpu_addr),
172 (unsigned long)cpu_addr % PAGE_SIZE, size,
173 direction, attrs);
136} 174}
137 175
138static inline void dma_unmap_single_attrs(struct device *dev, 176static inline void dma_unmap_single_attrs(struct device *dev,
@@ -144,7 +182,13 @@ static inline void dma_unmap_single_attrs(struct device *dev,
144 struct dma_mapping_ops *dma_ops = get_dma_ops(dev); 182 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
145 183
146 BUG_ON(!dma_ops); 184 BUG_ON(!dma_ops);
147 dma_ops->unmap_single(dev, dma_addr, size, direction, attrs); 185
186 if (dma_ops->unmap_single) {
187 dma_ops->unmap_single(dev, dma_addr, size, direction, attrs);
188 return;
189 }
190
191 dma_ops->unmap_page(dev, dma_addr, size, direction, attrs);
148} 192}
149 193
150static inline dma_addr_t dma_map_page_attrs(struct device *dev, 194static inline dma_addr_t dma_map_page_attrs(struct device *dev,
@@ -156,8 +200,13 @@ static inline dma_addr_t dma_map_page_attrs(struct device *dev,
156 struct dma_mapping_ops *dma_ops = get_dma_ops(dev); 200 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
157 201
158 BUG_ON(!dma_ops); 202 BUG_ON(!dma_ops);
203
204 if (dma_ops->map_page)
205 return dma_ops->map_page(dev, page, offset, size, direction,
206 attrs);
207
159 return dma_ops->map_single(dev, page_address(page) + offset, size, 208 return dma_ops->map_single(dev, page_address(page) + offset, size,
160 direction, attrs); 209 direction, attrs);
161} 210}
162 211
163static inline void dma_unmap_page_attrs(struct device *dev, 212static inline void dma_unmap_page_attrs(struct device *dev,
@@ -169,6 +218,12 @@ static inline void dma_unmap_page_attrs(struct device *dev,
169 struct dma_mapping_ops *dma_ops = get_dma_ops(dev); 218 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
170 219
171 BUG_ON(!dma_ops); 220 BUG_ON(!dma_ops);
221
222 if (dma_ops->unmap_page) {
223 dma_ops->unmap_page(dev, dma_address, size, direction, attrs);
224 return;
225 }
226
172 dma_ops->unmap_single(dev, dma_address, size, direction, attrs); 227 dma_ops->unmap_single(dev, dma_address, size, direction, attrs);
173} 228}
174 229
@@ -253,126 +308,6 @@ static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
253 dma_unmap_sg_attrs(dev, sg, nhwentries, direction, NULL); 308 dma_unmap_sg_attrs(dev, sg, nhwentries, direction, NULL);
254} 309}
255 310
256/*
257 * Available generic sets of operations
258 */
259extern struct dma_mapping_ops dma_iommu_ops;
260extern struct dma_mapping_ops dma_direct_ops;
261
262#else /* CONFIG_PPC64 */
263
264#define dma_supported(dev, mask) (1)
265
266static inline int dma_set_mask(struct device *dev, u64 dma_mask)
267{
268 if (!dev->dma_mask || !dma_supported(dev, mask))
269 return -EIO;
270
271 *dev->dma_mask = dma_mask;
272
273 return 0;
274}
275
276static inline void *dma_alloc_coherent(struct device *dev, size_t size,
277 dma_addr_t * dma_handle,
278 gfp_t gfp)
279{
280#ifdef CONFIG_NOT_COHERENT_CACHE
281 return __dma_alloc_coherent(size, dma_handle, gfp);
282#else
283 void *ret;
284 /* ignore region specifiers */
285 gfp &= ~(__GFP_DMA | __GFP_HIGHMEM);
286
287 if (dev == NULL || dev->coherent_dma_mask < 0xffffffff)
288 gfp |= GFP_DMA;
289
290 ret = (void *)__get_free_pages(gfp, get_order(size));
291
292 if (ret != NULL) {
293 memset(ret, 0, size);
294 *dma_handle = virt_to_bus(ret);
295 }
296
297 return ret;
298#endif
299}
300
301static inline void
302dma_free_coherent(struct device *dev, size_t size, void *vaddr,
303 dma_addr_t dma_handle)
304{
305#ifdef CONFIG_NOT_COHERENT_CACHE
306 __dma_free_coherent(size, vaddr);
307#else
308 free_pages((unsigned long)vaddr, get_order(size));
309#endif
310}
311
312static inline dma_addr_t
313dma_map_single(struct device *dev, void *ptr, size_t size,
314 enum dma_data_direction direction)
315{
316 BUG_ON(direction == DMA_NONE);
317
318 __dma_sync(ptr, size, direction);
319
320 return virt_to_bus(ptr);
321}
322
323static inline void dma_unmap_single(struct device *dev, dma_addr_t dma_addr,
324 size_t size,
325 enum dma_data_direction direction)
326{
327 /* We do nothing. */
328}
329
330static inline dma_addr_t
331dma_map_page(struct device *dev, struct page *page,
332 unsigned long offset, size_t size,
333 enum dma_data_direction direction)
334{
335 BUG_ON(direction == DMA_NONE);
336
337 __dma_sync_page(page, offset, size, direction);
338
339 return page_to_bus(page) + offset;
340}
341
342static inline void dma_unmap_page(struct device *dev, dma_addr_t dma_address,
343 size_t size,
344 enum dma_data_direction direction)
345{
346 /* We do nothing. */
347}
348
349static inline int
350dma_map_sg(struct device *dev, struct scatterlist *sgl, int nents,
351 enum dma_data_direction direction)
352{
353 struct scatterlist *sg;
354 int i;
355
356 BUG_ON(direction == DMA_NONE);
357
358 for_each_sg(sgl, sg, nents, i) {
359 BUG_ON(!sg_page(sg));
360 __dma_sync_page(sg_page(sg), sg->offset, sg->length, direction);
361 sg->dma_address = page_to_bus(sg_page(sg)) + sg->offset;
362 }
363
364 return nents;
365}
366
367static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
368 int nhwentries,
369 enum dma_data_direction direction)
370{
371 /* We don't do anything here. */
372}
373
374#endif /* CONFIG_PPC64 */
375
376static inline void dma_sync_single_for_cpu(struct device *dev, 311static inline void dma_sync_single_for_cpu(struct device *dev,
377 dma_addr_t dma_handle, size_t size, 312 dma_addr_t dma_handle, size_t size,
378 enum dma_data_direction direction) 313 enum dma_data_direction direction)
diff --git a/arch/powerpc/include/asm/exception.h b/arch/powerpc/include/asm/exception.h
index 329148b5acc6..d3d4534e3c74 100644
--- a/arch/powerpc/include/asm/exception.h
+++ b/arch/powerpc/include/asm/exception.h
@@ -53,14 +53,8 @@
53 * low halfword of the address, but for Kdump we need the whole low 53 * low halfword of the address, but for Kdump we need the whole low
54 * word. 54 * word.
55 */ 55 */
56#ifdef CONFIG_CRASH_DUMP
57#define LOAD_HANDLER(reg, label) \ 56#define LOAD_HANDLER(reg, label) \
58 oris reg,reg,(label)@h; /* virt addr of handler ... */ \ 57 addi reg,reg,(label)-_stext; /* virt addr of handler ... */
59 ori reg,reg,(label)@l; /* .. and the rest */
60#else
61#define LOAD_HANDLER(reg, label) \
62 ori reg,reg,(label)@l; /* virt addr of handler ... */
63#endif
64 58
65#define EXCEPTION_PROLOG_1(area) \ 59#define EXCEPTION_PROLOG_1(area) \
66 mfspr r13,SPRN_SPRG3; /* get paca address into r13 */ \ 60 mfspr r13,SPRN_SPRG3; /* get paca address into r13 */ \
@@ -72,37 +66,12 @@
72 std r9,area+EX_R13(r13); \ 66 std r9,area+EX_R13(r13); \
73 mfcr r9 67 mfcr r9
74 68
75/*
76 * Equal to EXCEPTION_PROLOG_PSERIES, except that it forces 64bit mode.
77 * The firmware calls the registered system_reset_fwnmi and
78 * machine_check_fwnmi handlers in 32bit mode if the cpu happens to run
79 * a 32bit application at the time of the event.
80 * This firmware bug is present on POWER4 and JS20.
81 */
82#define EXCEPTION_PROLOG_PSERIES_FORCE_64BIT(area, label) \
83 EXCEPTION_PROLOG_1(area); \
84 clrrdi r12,r13,32; /* get high part of &label */ \
85 mfmsr r10; \
86 /* force 64bit mode */ \
87 li r11,5; /* MSR_SF_LG|MSR_ISF_LG */ \
88 rldimi r10,r11,61,0; /* insert into top 3 bits */ \
89 /* done 64bit mode */ \
90 mfspr r11,SPRN_SRR0; /* save SRR0 */ \
91 LOAD_HANDLER(r12,label) \
92 ori r10,r10,MSR_IR|MSR_DR|MSR_RI; \
93 mtspr SPRN_SRR0,r12; \
94 mfspr r12,SPRN_SRR1; /* and SRR1 */ \
95 mtspr SPRN_SRR1,r10; \
96 rfid; \
97 b . /* prevent speculative execution */
98
99#define EXCEPTION_PROLOG_PSERIES(area, label) \ 69#define EXCEPTION_PROLOG_PSERIES(area, label) \
100 EXCEPTION_PROLOG_1(area); \ 70 EXCEPTION_PROLOG_1(area); \
101 clrrdi r12,r13,32; /* get high part of &label */ \ 71 ld r12,PACAKBASE(r13); /* get high part of &label */ \
102 mfmsr r10; \ 72 ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \
103 mfspr r11,SPRN_SRR0; /* save SRR0 */ \ 73 mfspr r11,SPRN_SRR0; /* save SRR0 */ \
104 LOAD_HANDLER(r12,label) \ 74 LOAD_HANDLER(r12,label) \
105 ori r10,r10,MSR_IR|MSR_DR|MSR_RI; \
106 mtspr SPRN_SRR0,r12; \ 75 mtspr SPRN_SRR0,r12; \
107 mfspr r12,SPRN_SRR1; /* and SRR1 */ \ 76 mfspr r12,SPRN_SRR1; /* and SRR1 */ \
108 mtspr SPRN_SRR1,r10; \ 77 mtspr SPRN_SRR1,r10; \
@@ -210,11 +179,10 @@ label##_pSeries: \
210 std r10,PACA_EXGEN+EX_R13(r13); \ 179 std r10,PACA_EXGEN+EX_R13(r13); \
211 std r11,PACA_EXGEN+EX_R11(r13); \ 180 std r11,PACA_EXGEN+EX_R11(r13); \
212 std r12,PACA_EXGEN+EX_R12(r13); \ 181 std r12,PACA_EXGEN+EX_R12(r13); \
213 clrrdi r12,r13,32; /* get high part of &label */ \ 182 ld r12,PACAKBASE(r13); /* get high part of &label */ \
214 mfmsr r10; \ 183 ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \
215 mfspr r11,SPRN_SRR0; /* save SRR0 */ \ 184 mfspr r11,SPRN_SRR0; /* save SRR0 */ \
216 LOAD_HANDLER(r12,label##_common) \ 185 LOAD_HANDLER(r12,label##_common) \
217 ori r10,r10,MSR_IR|MSR_DR|MSR_RI; \
218 mtspr SPRN_SRR0,r12; \ 186 mtspr SPRN_SRR0,r12; \
219 mfspr r12,SPRN_SRR1; /* and SRR1 */ \ 187 mfspr r12,SPRN_SRR1; /* and SRR1 */ \
220 mtspr SPRN_SRR1,r10; \ 188 mtspr SPRN_SRR1,r10; \
diff --git a/arch/powerpc/include/asm/fsl_lbc.h b/arch/powerpc/include/asm/fsl_lbc.h
index 303f5484c050..63a4f779f531 100644
--- a/arch/powerpc/include/asm/fsl_lbc.h
+++ b/arch/powerpc/include/asm/fsl_lbc.h
@@ -23,9 +23,9 @@
23#ifndef __ASM_FSL_LBC_H 23#ifndef __ASM_FSL_LBC_H
24#define __ASM_FSL_LBC_H 24#define __ASM_FSL_LBC_H
25 25
26#include <linux/compiler.h>
26#include <linux/types.h> 27#include <linux/types.h>
27#include <linux/spinlock.h> 28#include <linux/io.h>
28#include <asm/io.h>
29 29
30struct fsl_lbc_bank { 30struct fsl_lbc_bank {
31 __be32 br; /**< Base Register */ 31 __be32 br; /**< Base Register */
@@ -227,9 +227,6 @@ struct fsl_lbc_regs {
227 u8 res8[0xF00]; 227 u8 res8[0xF00];
228}; 228};
229 229
230extern struct fsl_lbc_regs __iomem *fsl_lbc_regs;
231extern spinlock_t fsl_lbc_lock;
232
233/* 230/*
234 * FSL UPM routines 231 * FSL UPM routines
235 */ 232 */
@@ -268,44 +265,7 @@ static inline void fsl_upm_end_pattern(struct fsl_upm *upm)
268 cpu_relax(); 265 cpu_relax();
269} 266}
270 267
271/** 268extern int fsl_upm_run_pattern(struct fsl_upm *upm, void __iomem *io_base,
272 * fsl_upm_run_pattern - actually run an UPM pattern 269 u32 mar);
273 * @upm: pointer to the fsl_upm structure obtained via fsl_upm_find
274 * @io_base: remapped pointer to where memory access should happen
275 * @mar: MAR register content during pattern execution
276 *
277 * This function triggers dummy write to the memory specified by the io_base,
278 * thus UPM pattern actually executed. Note that mar usage depends on the
279 * pre-programmed AMX bits in the UPM RAM.
280 */
281static inline int fsl_upm_run_pattern(struct fsl_upm *upm,
282 void __iomem *io_base, u32 mar)
283{
284 int ret = 0;
285 unsigned long flags;
286
287 spin_lock_irqsave(&fsl_lbc_lock, flags);
288
289 out_be32(&fsl_lbc_regs->mar, mar << (32 - upm->width));
290
291 switch (upm->width) {
292 case 8:
293 out_8(io_base, 0x0);
294 break;
295 case 16:
296 out_be16(io_base, 0x0);
297 break;
298 case 32:
299 out_be32(io_base, 0x0);
300 break;
301 default:
302 ret = -EINVAL;
303 break;
304 }
305
306 spin_unlock_irqrestore(&fsl_lbc_lock, flags);
307
308 return ret;
309}
310 270
311#endif /* __ASM_FSL_LBC_H */ 271#endif /* __ASM_FSL_LBC_H */
diff --git a/arch/powerpc/include/asm/highmem.h b/arch/powerpc/include/asm/highmem.h
index 5d99b6489d56..91c589520c0a 100644
--- a/arch/powerpc/include/asm/highmem.h
+++ b/arch/powerpc/include/asm/highmem.h
@@ -84,7 +84,7 @@ static inline void *kmap_atomic_prot(struct page *page, enum km_type type, pgpro
84#ifdef CONFIG_DEBUG_HIGHMEM 84#ifdef CONFIG_DEBUG_HIGHMEM
85 BUG_ON(!pte_none(*(kmap_pte-idx))); 85 BUG_ON(!pte_none(*(kmap_pte-idx)));
86#endif 86#endif
87 set_pte_at(&init_mm, vaddr, kmap_pte-idx, mk_pte(page, prot)); 87 __set_pte_at(&init_mm, vaddr, kmap_pte-idx, mk_pte(page, prot));
88 flush_tlb_page(NULL, vaddr); 88 flush_tlb_page(NULL, vaddr);
89 89
90 return (void*) vaddr; 90 return (void*) vaddr;
diff --git a/arch/powerpc/include/asm/io.h b/arch/powerpc/include/asm/io.h
index 77c7fa025e65..08266d2728b3 100644
--- a/arch/powerpc/include/asm/io.h
+++ b/arch/powerpc/include/asm/io.h
@@ -711,7 +711,7 @@ static inline void * phys_to_virt(unsigned long address)
711/* 711/*
712 * Change "struct page" to physical address. 712 * Change "struct page" to physical address.
713 */ 713 */
714#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT) 714#define page_to_phys(page) ((phys_addr_t)page_to_pfn(page) << PAGE_SHIFT)
715 715
716/* We do NOT want virtual merging, it would put too much pressure on 716/* We do NOT want virtual merging, it would put too much pressure on
717 * our iommu allocator. Instead, we want drivers to be smart enough 717 * our iommu allocator. Instead, we want drivers to be smart enough
diff --git a/arch/powerpc/include/asm/irq.h b/arch/powerpc/include/asm/irq.h
index a372f76836c2..0a5137676e1b 100644
--- a/arch/powerpc/include/asm/irq.h
+++ b/arch/powerpc/include/asm/irq.h
@@ -236,15 +236,27 @@ extern unsigned int irq_find_mapping(struct irq_host *host,
236extern unsigned int irq_create_direct_mapping(struct irq_host *host); 236extern unsigned int irq_create_direct_mapping(struct irq_host *host);
237 237
238/** 238/**
239 * irq_radix_revmap - Find a linux virq from a hw irq number. 239 * irq_radix_revmap_insert - Insert a hw irq to linux virq number mapping.
240 * @host: host owning this hardware interrupt
241 * @virq: linux irq number
242 * @hwirq: hardware irq number in that host space
243 *
244 * This is for use by irq controllers that use a radix tree reverse
245 * mapping for fast lookup.
246 */
247extern void irq_radix_revmap_insert(struct irq_host *host, unsigned int virq,
248 irq_hw_number_t hwirq);
249
250/**
251 * irq_radix_revmap_lookup - Find a linux virq from a hw irq number.
240 * @host: host owning this hardware interrupt 252 * @host: host owning this hardware interrupt
241 * @hwirq: hardware irq number in that host space 253 * @hwirq: hardware irq number in that host space
242 * 254 *
243 * This is a fast path, for use by irq controller code that uses radix tree 255 * This is a fast path, for use by irq controller code that uses radix tree
244 * revmaps 256 * revmaps
245 */ 257 */
246extern unsigned int irq_radix_revmap(struct irq_host *host, 258extern unsigned int irq_radix_revmap_lookup(struct irq_host *host,
247 irq_hw_number_t hwirq); 259 irq_hw_number_t hwirq);
248 260
249/** 261/**
250 * irq_linear_revmap - Find a linux virq from a hw irq number. 262 * irq_linear_revmap - Find a linux virq from a hw irq number.
diff --git a/arch/powerpc/include/asm/machdep.h b/arch/powerpc/include/asm/machdep.h
index 893aafd87fde..2740c44ff717 100644
--- a/arch/powerpc/include/asm/machdep.h
+++ b/arch/powerpc/include/asm/machdep.h
@@ -88,8 +88,6 @@ struct machdep_calls {
88 unsigned long (*tce_get)(struct iommu_table *tbl, 88 unsigned long (*tce_get)(struct iommu_table *tbl,
89 long index); 89 long index);
90 void (*tce_flush)(struct iommu_table *tbl); 90 void (*tce_flush)(struct iommu_table *tbl);
91 void (*pci_dma_dev_setup)(struct pci_dev *dev);
92 void (*pci_dma_bus_setup)(struct pci_bus *bus);
93 91
94 void __iomem * (*ioremap)(phys_addr_t addr, unsigned long size, 92 void __iomem * (*ioremap)(phys_addr_t addr, unsigned long size,
95 unsigned long flags); 93 unsigned long flags);
@@ -101,6 +99,9 @@ struct machdep_calls {
101#endif 99#endif
102#endif /* CONFIG_PPC64 */ 100#endif /* CONFIG_PPC64 */
103 101
102 void (*pci_dma_dev_setup)(struct pci_dev *dev);
103 void (*pci_dma_bus_setup)(struct pci_bus *bus);
104
104 int (*probe)(void); 105 int (*probe)(void);
105 void (*setup_arch)(void); /* Optional, may be NULL */ 106 void (*setup_arch)(void); /* Optional, may be NULL */
106 void (*init_early)(void); 107 void (*init_early)(void);
diff --git a/arch/powerpc/include/asm/mman.h b/arch/powerpc/include/asm/mman.h
index 9209f755763e..e7b99bac9f48 100644
--- a/arch/powerpc/include/asm/mman.h
+++ b/arch/powerpc/include/asm/mman.h
@@ -44,7 +44,7 @@ static inline unsigned long arch_calc_vm_prot_bits(unsigned long prot)
44 44
45static inline pgprot_t arch_vm_get_page_prot(unsigned long vm_flags) 45static inline pgprot_t arch_vm_get_page_prot(unsigned long vm_flags)
46{ 46{
47 return (vm_flags & VM_SAO) ? __pgprot(_PAGE_SAO) : 0; 47 return (vm_flags & VM_SAO) ? __pgprot(_PAGE_SAO) : __pgprot(0);
48} 48}
49#define arch_vm_get_page_prot(vm_flags) arch_vm_get_page_prot(vm_flags) 49#define arch_vm_get_page_prot(vm_flags) arch_vm_get_page_prot(vm_flags)
50 50
diff --git a/arch/powerpc/include/asm/mmu-hash64.h b/arch/powerpc/include/asm/mmu-hash64.h
index c2df53c5ceb9..5a441742ffba 100644
--- a/arch/powerpc/include/asm/mmu-hash64.h
+++ b/arch/powerpc/include/asm/mmu-hash64.h
@@ -437,7 +437,7 @@ typedef struct {
437 }) 437 })
438#endif /* 1 */ 438#endif /* 1 */
439 439
440/* This is only valid for addresses >= KERNELBASE */ 440/* This is only valid for addresses >= PAGE_OFFSET */
441static inline unsigned long get_kernel_vsid(unsigned long ea, int ssize) 441static inline unsigned long get_kernel_vsid(unsigned long ea, int ssize)
442{ 442{
443 if (ssize == MMU_SEGSIZE_256M) 443 if (ssize == MMU_SEGSIZE_256M)
diff --git a/arch/powerpc/include/asm/mpic.h b/arch/powerpc/include/asm/mpic.h
index fe566a348a86..34d9ac433ace 100644
--- a/arch/powerpc/include/asm/mpic.h
+++ b/arch/powerpc/include/asm/mpic.h
@@ -5,6 +5,7 @@
5#include <linux/irq.h> 5#include <linux/irq.h>
6#include <linux/sysdev.h> 6#include <linux/sysdev.h>
7#include <asm/dcr.h> 7#include <asm/dcr.h>
8#include <asm/msi_bitmap.h>
8 9
9/* 10/*
10 * Global registers 11 * Global registers
@@ -301,8 +302,7 @@ struct mpic
301#endif 302#endif
302 303
303#ifdef CONFIG_PCI_MSI 304#ifdef CONFIG_PCI_MSI
304 spinlock_t bitmap_lock; 305 struct msi_bitmap msi_bitmap;
305 unsigned long *hwirq_bitmap;
306#endif 306#endif
307 307
308#ifdef CONFIG_MPIC_BROKEN_REGREAD 308#ifdef CONFIG_MPIC_BROKEN_REGREAD
diff --git a/arch/powerpc/include/asm/msi_bitmap.h b/arch/powerpc/include/asm/msi_bitmap.h
new file mode 100644
index 000000000000..97ac3f46ae0d
--- /dev/null
+++ b/arch/powerpc/include/asm/msi_bitmap.h
@@ -0,0 +1,35 @@
1#ifndef _POWERPC_SYSDEV_MSI_BITMAP_H
2#define _POWERPC_SYSDEV_MSI_BITMAP_H
3
4/*
5 * Copyright 2008, Michael Ellerman, IBM Corporation.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; version 2 of the
10 * License.
11 *
12 */
13
14#include <linux/of.h>
15#include <asm/irq.h>
16
17struct msi_bitmap {
18 struct device_node *of_node;
19 unsigned long *bitmap;
20 spinlock_t lock;
21 unsigned int irq_count;
22};
23
24int msi_bitmap_alloc_hwirqs(struct msi_bitmap *bmp, int num);
25void msi_bitmap_free_hwirqs(struct msi_bitmap *bmp, unsigned int offset,
26 unsigned int num);
27void msi_bitmap_reserve_hwirq(struct msi_bitmap *bmp, unsigned int hwirq);
28
29int msi_bitmap_reserve_dt_hwirqs(struct msi_bitmap *bmp);
30
31int msi_bitmap_alloc(struct msi_bitmap *bmp, unsigned int irq_count,
32 struct device_node *of_node);
33void msi_bitmap_free(struct msi_bitmap *bmp);
34
35#endif /* _POWERPC_SYSDEV_MSI_BITMAP_H */
diff --git a/arch/powerpc/include/asm/of_device.h b/arch/powerpc/include/asm/of_device.h
index 3c123990ca2e..a64debf177dc 100644
--- a/arch/powerpc/include/asm/of_device.h
+++ b/arch/powerpc/include/asm/of_device.h
@@ -24,8 +24,5 @@ extern struct of_device *of_device_alloc(struct device_node *np,
24extern int of_device_uevent(struct device *dev, 24extern int of_device_uevent(struct device *dev,
25 struct kobj_uevent_env *env); 25 struct kobj_uevent_env *env);
26 26
27/* This is just here during the transition */
28#include <linux/of_device.h>
29
30#endif /* __KERNEL__ */ 27#endif /* __KERNEL__ */
31#endif /* _ASM_POWERPC_OF_DEVICE_H */ 28#endif /* _ASM_POWERPC_OF_DEVICE_H */
diff --git a/arch/powerpc/include/asm/of_platform.h b/arch/powerpc/include/asm/of_platform.h
index 18659ef72139..53b46507ffde 100644
--- a/arch/powerpc/include/asm/of_platform.h
+++ b/arch/powerpc/include/asm/of_platform.h
@@ -11,9 +11,6 @@
11 * 11 *
12 */ 12 */
13 13
14/* This is just here during the transition */
15#include <linux/of_platform.h>
16
17/* Platform drivers register/unregister */ 14/* Platform drivers register/unregister */
18static inline int of_register_platform_driver(struct of_platform_driver *drv) 15static inline int of_register_platform_driver(struct of_platform_driver *drv)
19{ 16{
diff --git a/arch/powerpc/include/asm/paca.h b/arch/powerpc/include/asm/paca.h
index 6493a395508b..082b3aedf145 100644
--- a/arch/powerpc/include/asm/paca.h
+++ b/arch/powerpc/include/asm/paca.h
@@ -62,6 +62,8 @@ struct paca_struct {
62 u16 paca_index; /* Logical processor number */ 62 u16 paca_index; /* Logical processor number */
63 63
64 u64 kernel_toc; /* Kernel TOC address */ 64 u64 kernel_toc; /* Kernel TOC address */
65 u64 kernelbase; /* Base address of kernel */
66 u64 kernel_msr; /* MSR while running in kernel */
65 u64 stab_real; /* Absolute address of segment table */ 67 u64 stab_real; /* Absolute address of segment table */
66 u64 stab_addr; /* Virtual address of segment table */ 68 u64 stab_addr; /* Virtual address of segment table */
67 void *emergency_sp; /* pointer to emergency stack */ 69 void *emergency_sp; /* pointer to emergency stack */
diff --git a/arch/powerpc/include/asm/page.h b/arch/powerpc/include/asm/page.h
index e088545cb3f5..64e144505f65 100644
--- a/arch/powerpc/include/asm/page.h
+++ b/arch/powerpc/include/asm/page.h
@@ -71,15 +71,21 @@
71#define PAGE_OFFSET ASM_CONST(CONFIG_PAGE_OFFSET) 71#define PAGE_OFFSET ASM_CONST(CONFIG_PAGE_OFFSET)
72#define LOAD_OFFSET ASM_CONST((CONFIG_KERNEL_START-CONFIG_PHYSICAL_START)) 72#define LOAD_OFFSET ASM_CONST((CONFIG_KERNEL_START-CONFIG_PHYSICAL_START))
73 73
74#if defined(CONFIG_RELOCATABLE) && defined(CONFIG_FLATMEM) 74#if defined(CONFIG_RELOCATABLE)
75#ifndef __ASSEMBLY__ 75#ifndef __ASSEMBLY__
76extern phys_addr_t memstart_addr; 76extern phys_addr_t memstart_addr;
77extern phys_addr_t kernstart_addr; 77extern phys_addr_t kernstart_addr;
78#endif 78#endif
79#define PHYSICAL_START kernstart_addr 79#define PHYSICAL_START kernstart_addr
80#define MEMORY_START memstart_addr
81#else 80#else
82#define PHYSICAL_START ASM_CONST(CONFIG_PHYSICAL_START) 81#define PHYSICAL_START ASM_CONST(CONFIG_PHYSICAL_START)
82#endif
83
84#ifdef CONFIG_PPC64
85#define MEMORY_START 0UL
86#elif defined(CONFIG_RELOCATABLE)
87#define MEMORY_START memstart_addr
88#else
83#define MEMORY_START (PHYSICAL_START + PAGE_OFFSET - KERNELBASE) 89#define MEMORY_START (PHYSICAL_START + PAGE_OFFSET - KERNELBASE)
84#endif 90#endif
85 91
@@ -92,8 +98,8 @@ extern phys_addr_t kernstart_addr;
92#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) 98#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
93#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT) 99#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
94 100
95#define __va(x) ((void *)((unsigned long)(x) - PHYSICAL_START + KERNELBASE)) 101#define __va(x) ((void *)((unsigned long)(x) + PAGE_OFFSET - MEMORY_START))
96#define __pa(x) ((unsigned long)(x) + PHYSICAL_START - KERNELBASE) 102#define __pa(x) ((unsigned long)(x) - PAGE_OFFSET + MEMORY_START)
97 103
98/* 104/*
99 * Unfortunately the PLT is in the BSS in the PPC32 ELF ABI, 105 * Unfortunately the PLT is in the BSS in the PPC32 ELF ABI,
diff --git a/arch/powerpc/include/asm/page_32.h b/arch/powerpc/include/asm/page_32.h
index ebfae530a379..d77072a32cc6 100644
--- a/arch/powerpc/include/asm/page_32.h
+++ b/arch/powerpc/include/asm/page_32.h
@@ -13,10 +13,16 @@
13#define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES 13#define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES
14#endif 14#endif
15 15
16#ifdef CONFIG_PTE_64BIT
17#define PTE_FLAGS_OFFSET 4 /* offset of PTE flags, in bytes */
18#else
19#define PTE_FLAGS_OFFSET 0
20#endif
21
16#ifndef __ASSEMBLY__ 22#ifndef __ASSEMBLY__
17/* 23/*
18 * The basic type of a PTE - 64 bits for those CPUs with > 32 bit 24 * The basic type of a PTE - 64 bits for those CPUs with > 32 bit
19 * physical addressing. For now this just the IBM PPC440. 25 * physical addressing.
20 */ 26 */
21#ifdef CONFIG_PTE_64BIT 27#ifdef CONFIG_PTE_64BIT
22typedef unsigned long long pte_basic_t; 28typedef unsigned long long pte_basic_t;
diff --git a/arch/powerpc/include/asm/pci.h b/arch/powerpc/include/asm/pci.h
index a05a942b1c25..0e52c7828ea4 100644
--- a/arch/powerpc/include/asm/pci.h
+++ b/arch/powerpc/include/asm/pci.h
@@ -60,6 +60,14 @@ static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
60 return channel ? 15 : 14; 60 return channel ? 15 : 14;
61} 61}
62 62
63#ifdef CONFIG_PCI
64extern void set_pci_dma_ops(struct dma_mapping_ops *dma_ops);
65extern struct dma_mapping_ops *get_pci_dma_ops(void);
66#else /* CONFIG_PCI */
67#define set_pci_dma_ops(d)
68#define get_pci_dma_ops() NULL
69#endif
70
63#ifdef CONFIG_PPC64 71#ifdef CONFIG_PPC64
64 72
65/* 73/*
@@ -70,9 +78,6 @@ static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
70#define PCI_DISABLE_MWI 78#define PCI_DISABLE_MWI
71 79
72#ifdef CONFIG_PCI 80#ifdef CONFIG_PCI
73extern void set_pci_dma_ops(struct dma_mapping_ops *dma_ops);
74extern struct dma_mapping_ops *get_pci_dma_ops(void);
75
76static inline void pci_dma_burst_advice(struct pci_dev *pdev, 81static inline void pci_dma_burst_advice(struct pci_dev *pdev,
77 enum pci_dma_burst_strategy *strat, 82 enum pci_dma_burst_strategy *strat,
78 unsigned long *strategy_parameter) 83 unsigned long *strategy_parameter)
@@ -89,9 +94,6 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev,
89 *strat = PCI_DMA_BURST_MULTIPLE; 94 *strat = PCI_DMA_BURST_MULTIPLE;
90 *strategy_parameter = cacheline_size; 95 *strategy_parameter = cacheline_size;
91} 96}
92#else /* CONFIG_PCI */
93#define set_pci_dma_ops(d)
94#define get_pci_dma_ops() NULL
95#endif 97#endif
96 98
97#else /* 32-bit */ 99#else /* 32-bit */
diff --git a/arch/powerpc/include/asm/pgtable-ppc32.h b/arch/powerpc/include/asm/pgtable-ppc32.h
index 6fe39e327047..6ab7c67cb5ab 100644
--- a/arch/powerpc/include/asm/pgtable-ppc32.h
+++ b/arch/powerpc/include/asm/pgtable-ppc32.h
@@ -261,6 +261,7 @@ extern int icache_44x_need_flush;
261#define _PAGE_HWEXEC 0x00000004 /* H: Execute permission */ 261#define _PAGE_HWEXEC 0x00000004 /* H: Execute permission */
262#define _PAGE_ACCESSED 0x00000008 /* S: Page referenced */ 262#define _PAGE_ACCESSED 0x00000008 /* S: Page referenced */
263#define _PAGE_DIRTY 0x00000010 /* S: Page dirty */ 263#define _PAGE_DIRTY 0x00000010 /* S: Page dirty */
264#define _PAGE_SPECIAL 0x00000020 /* S: Special page */
264#define _PAGE_USER 0x00000040 /* S: User page */ 265#define _PAGE_USER 0x00000040 /* S: User page */
265#define _PAGE_ENDIAN 0x00000080 /* H: E bit */ 266#define _PAGE_ENDIAN 0x00000080 /* H: E bit */
266#define _PAGE_GUARDED 0x00000100 /* H: G bit */ 267#define _PAGE_GUARDED 0x00000100 /* H: G bit */
@@ -276,6 +277,7 @@ extern int icache_44x_need_flush;
276/* ERPN in a PTE never gets cleared, ignore it */ 277/* ERPN in a PTE never gets cleared, ignore it */
277#define _PTE_NONE_MASK 0xffffffff00000000ULL 278#define _PTE_NONE_MASK 0xffffffff00000000ULL
278 279
280#define __HAVE_ARCH_PTE_SPECIAL
279 281
280#elif defined(CONFIG_FSL_BOOKE) 282#elif defined(CONFIG_FSL_BOOKE)
281/* 283/*
@@ -305,6 +307,7 @@ extern int icache_44x_need_flush;
305#define _PAGE_COHERENT 0x00100 /* H: M bit */ 307#define _PAGE_COHERENT 0x00100 /* H: M bit */
306#define _PAGE_NO_CACHE 0x00200 /* H: I bit */ 308#define _PAGE_NO_CACHE 0x00200 /* H: I bit */
307#define _PAGE_WRITETHRU 0x00400 /* H: W bit */ 309#define _PAGE_WRITETHRU 0x00400 /* H: W bit */
310#define _PAGE_SPECIAL 0x00800 /* S: Special page */
308 311
309#ifdef CONFIG_PTE_64BIT 312#ifdef CONFIG_PTE_64BIT
310/* ERPN in a PTE never gets cleared, ignore it */ 313/* ERPN in a PTE never gets cleared, ignore it */
@@ -315,6 +318,8 @@ extern int icache_44x_need_flush;
315#define _PMD_PRESENT_MASK (PAGE_MASK) 318#define _PMD_PRESENT_MASK (PAGE_MASK)
316#define _PMD_BAD (~PAGE_MASK) 319#define _PMD_BAD (~PAGE_MASK)
317 320
321#define __HAVE_ARCH_PTE_SPECIAL
322
318#elif defined(CONFIG_8xx) 323#elif defined(CONFIG_8xx)
319/* Definitions for 8xx embedded chips. */ 324/* Definitions for 8xx embedded chips. */
320#define _PAGE_PRESENT 0x0001 /* Page is valid */ 325#define _PAGE_PRESENT 0x0001 /* Page is valid */
@@ -362,8 +367,14 @@ extern int icache_44x_need_flush;
362#define _PAGE_ACCESSED 0x100 /* R: page referenced */ 367#define _PAGE_ACCESSED 0x100 /* R: page referenced */
363#define _PAGE_EXEC 0x200 /* software: i-cache coherency required */ 368#define _PAGE_EXEC 0x200 /* software: i-cache coherency required */
364#define _PAGE_RW 0x400 /* software: user write access allowed */ 369#define _PAGE_RW 0x400 /* software: user write access allowed */
370#define _PAGE_SPECIAL 0x800 /* software: Special page */
365 371
372#ifdef CONFIG_PTE_64BIT
373/* We never clear the high word of the pte */
374#define _PTE_NONE_MASK (0xffffffff00000000ULL | _PAGE_HASHPTE)
375#else
366#define _PTE_NONE_MASK _PAGE_HASHPTE 376#define _PTE_NONE_MASK _PAGE_HASHPTE
377#endif
367 378
368#define _PMD_PRESENT 0 379#define _PMD_PRESENT 0
369#define _PMD_PRESENT_MASK (PAGE_MASK) 380#define _PMD_PRESENT_MASK (PAGE_MASK)
@@ -372,6 +383,8 @@ extern int icache_44x_need_flush;
372/* Hash table based platforms need atomic updates of the linux PTE */ 383/* Hash table based platforms need atomic updates of the linux PTE */
373#define PTE_ATOMIC_UPDATES 1 384#define PTE_ATOMIC_UPDATES 1
374 385
386#define __HAVE_ARCH_PTE_SPECIAL
387
375#endif 388#endif
376 389
377/* 390/*
@@ -404,6 +417,9 @@ extern int icache_44x_need_flush;
404#ifndef _PAGE_WRITETHRU 417#ifndef _PAGE_WRITETHRU
405#define _PAGE_WRITETHRU 0 418#define _PAGE_WRITETHRU 0
406#endif 419#endif
420#ifndef _PAGE_SPECIAL
421#define _PAGE_SPECIAL 0
422#endif
407#ifndef _PMD_PRESENT_MASK 423#ifndef _PMD_PRESENT_MASK
408#define _PMD_PRESENT_MASK _PMD_PRESENT 424#define _PMD_PRESENT_MASK _PMD_PRESENT
409#endif 425#endif
@@ -415,11 +431,11 @@ extern int icache_44x_need_flush;
415#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY) 431#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
416 432
417 433
418#define PAGE_PROT_BITS __pgprot(_PAGE_GUARDED | _PAGE_COHERENT | _PAGE_NO_CACHE | \ 434#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | _PAGE_NO_CACHE | \
419 _PAGE_WRITETHRU | _PAGE_ENDIAN | \ 435 _PAGE_WRITETHRU | _PAGE_ENDIAN | \
420 _PAGE_USER | _PAGE_ACCESSED | \ 436 _PAGE_USER | _PAGE_ACCESSED | \
421 _PAGE_RW | _PAGE_HWWRITE | _PAGE_DIRTY | \ 437 _PAGE_RW | _PAGE_HWWRITE | _PAGE_DIRTY | \
422 _PAGE_EXEC | _PAGE_HWEXEC) 438 _PAGE_EXEC | _PAGE_HWEXEC)
423/* 439/*
424 * Note: the _PAGE_COHERENT bit automatically gets set in the hardware 440 * Note: the _PAGE_COHERENT bit automatically gets set in the hardware
425 * PTE if CONFIG_SMP is defined (hash_page does this); there is no need 441 * PTE if CONFIG_SMP is defined (hash_page does this); there is no need
@@ -517,7 +533,8 @@ extern unsigned long bad_call_to_PMD_PAGE_SIZE(void);
517 533
518#define pte_none(pte) ((pte_val(pte) & ~_PTE_NONE_MASK) == 0) 534#define pte_none(pte) ((pte_val(pte) & ~_PTE_NONE_MASK) == 0)
519#define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT) 535#define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT)
520#define pte_clear(mm,addr,ptep) do { set_pte_at((mm), (addr), (ptep), __pte(0)); } while (0) 536#define pte_clear(mm, addr, ptep) \
537 do { pte_update(ptep, ~_PAGE_HASHPTE, 0); } while (0)
521 538
522#define pmd_none(pmd) (!pmd_val(pmd)) 539#define pmd_none(pmd) (!pmd_val(pmd))
523#define pmd_bad(pmd) (pmd_val(pmd) & _PMD_BAD) 540#define pmd_bad(pmd) (pmd_val(pmd) & _PMD_BAD)
@@ -533,7 +550,7 @@ static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_RW; }
533static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; } 550static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; }
534static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; } 551static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
535static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; } 552static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; }
536static inline int pte_special(pte_t pte) { return 0; } 553static inline int pte_special(pte_t pte) { return pte_val(pte) & _PAGE_SPECIAL; }
537 554
538static inline void pte_uncache(pte_t pte) { pte_val(pte) |= _PAGE_NO_CACHE; } 555static inline void pte_uncache(pte_t pte) { pte_val(pte) |= _PAGE_NO_CACHE; }
539static inline void pte_cache(pte_t pte) { pte_val(pte) &= ~_PAGE_NO_CACHE; } 556static inline void pte_cache(pte_t pte) { pte_val(pte) &= ~_PAGE_NO_CACHE; }
@@ -552,10 +569,10 @@ static inline pte_t pte_mkdirty(pte_t pte) {
552static inline pte_t pte_mkyoung(pte_t pte) { 569static inline pte_t pte_mkyoung(pte_t pte) {
553 pte_val(pte) |= _PAGE_ACCESSED; return pte; } 570 pte_val(pte) |= _PAGE_ACCESSED; return pte; }
554static inline pte_t pte_mkspecial(pte_t pte) { 571static inline pte_t pte_mkspecial(pte_t pte) {
555 return pte; } 572 pte_val(pte) |= _PAGE_SPECIAL; return pte; }
556static inline unsigned long pte_pgprot(pte_t pte) 573static inline pgprot_t pte_pgprot(pte_t pte)
557{ 574{
558 return __pgprot(pte_val(pte)) & PAGE_PROT_BITS; 575 return __pgprot(pte_val(pte) & PAGE_PROT_BITS);
559} 576}
560 577
561static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 578static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
@@ -575,6 +592,10 @@ extern int flush_hash_pages(unsigned context, unsigned long va,
575extern void add_hash_page(unsigned context, unsigned long va, 592extern void add_hash_page(unsigned context, unsigned long va,
576 unsigned long pmdval); 593 unsigned long pmdval);
577 594
595/* Flush an entry from the TLB/hash table */
596extern void flush_hash_entry(struct mm_struct *mm, pte_t *ptep,
597 unsigned long address);
598
578/* 599/*
579 * Atomic PTE updates. 600 * Atomic PTE updates.
580 * 601 *
@@ -612,9 +633,6 @@ static inline unsigned long pte_update(pte_t *p,
612 return old; 633 return old;
613} 634}
614#else /* CONFIG_PTE_64BIT */ 635#else /* CONFIG_PTE_64BIT */
615/* TODO: Change that to only modify the low word and move set_pte_at()
616 * out of line
617 */
618static inline unsigned long long pte_update(pte_t *p, 636static inline unsigned long long pte_update(pte_t *p,
619 unsigned long clr, 637 unsigned long clr,
620 unsigned long set) 638 unsigned long set)
@@ -652,14 +670,36 @@ static inline unsigned long long pte_update(pte_t *p,
652 * On machines which use an MMU hash table we avoid changing the 670 * On machines which use an MMU hash table we avoid changing the
653 * _PAGE_HASHPTE bit. 671 * _PAGE_HASHPTE bit.
654 */ 672 */
655static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, 673
674static inline void __set_pte_at(struct mm_struct *mm, unsigned long addr,
656 pte_t *ptep, pte_t pte) 675 pte_t *ptep, pte_t pte)
657{ 676{
658#if _PAGE_HASHPTE != 0 677#if (_PAGE_HASHPTE != 0) && defined(CONFIG_SMP) && !defined(CONFIG_PTE_64BIT)
659 pte_update(ptep, ~_PAGE_HASHPTE, pte_val(pte) & ~_PAGE_HASHPTE); 678 pte_update(ptep, ~_PAGE_HASHPTE, pte_val(pte) & ~_PAGE_HASHPTE);
679#elif defined(CONFIG_PTE_64BIT) && defined(CONFIG_SMP)
680#if _PAGE_HASHPTE != 0
681 if (pte_val(*ptep) & _PAGE_HASHPTE)
682 flush_hash_entry(mm, ptep, addr);
683#endif
684 __asm__ __volatile__("\
685 stw%U0%X0 %2,%0\n\
686 eieio\n\
687 stw%U0%X0 %L2,%1"
688 : "=m" (*ptep), "=m" (*((unsigned char *)ptep+4))
689 : "r" (pte) : "memory");
660#else 690#else
661 *ptep = pte; 691 *ptep = __pte((pte_val(*ptep) & _PAGE_HASHPTE)
692 | (pte_val(pte) & ~_PAGE_HASHPTE));
693#endif
694}
695
696static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
697 pte_t *ptep, pte_t pte)
698{
699#if defined(CONFIG_PTE_64BIT) && defined(CONFIG_SMP)
700 WARN_ON(pte_present(*ptep));
662#endif 701#endif
702 __set_pte_at(mm, addr, ptep, pte);
663} 703}
664 704
665/* 705/*
diff --git a/arch/powerpc/include/asm/pgtable-ppc64.h b/arch/powerpc/include/asm/pgtable-ppc64.h
index 4597c491e9b5..4c0a8c62859d 100644
--- a/arch/powerpc/include/asm/pgtable-ppc64.h
+++ b/arch/powerpc/include/asm/pgtable-ppc64.h
@@ -117,10 +117,10 @@
117#define PAGE_AGP __pgprot(_PAGE_BASE | _PAGE_WRENABLE | _PAGE_NO_CACHE) 117#define PAGE_AGP __pgprot(_PAGE_BASE | _PAGE_WRENABLE | _PAGE_NO_CACHE)
118#define HAVE_PAGE_AGP 118#define HAVE_PAGE_AGP
119 119
120#define PAGE_PROT_BITS __pgprot(_PAGE_GUARDED | _PAGE_COHERENT | \ 120#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | \
121 _PAGE_NO_CACHE | _PAGE_WRITETHRU | \ 121 _PAGE_NO_CACHE | _PAGE_WRITETHRU | \
122 _PAGE_4K_PFN | _PAGE_RW | _PAGE_USER | \ 122 _PAGE_4K_PFN | _PAGE_RW | _PAGE_USER | \
123 _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_EXEC) 123 _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_EXEC)
124/* PTEIDX nibble */ 124/* PTEIDX nibble */
125#define _PTEIDX_SECONDARY 0x8 125#define _PTEIDX_SECONDARY 0x8
126#define _PTEIDX_GROUP_IX 0x7 126#define _PTEIDX_GROUP_IX 0x7
@@ -264,9 +264,9 @@ static inline pte_t pte_mkhuge(pte_t pte) {
264 return pte; } 264 return pte; }
265static inline pte_t pte_mkspecial(pte_t pte) { 265static inline pte_t pte_mkspecial(pte_t pte) {
266 pte_val(pte) |= _PAGE_SPECIAL; return pte; } 266 pte_val(pte) |= _PAGE_SPECIAL; return pte; }
267static inline unsigned long pte_pgprot(pte_t pte) 267static inline pgprot_t pte_pgprot(pte_t pte)
268{ 268{
269 return __pgprot(pte_val(pte)) & PAGE_PROT_BITS; 269 return __pgprot(pte_val(pte) & PAGE_PROT_BITS);
270} 270}
271 271
272/* Atomic PTE updates */ 272/* Atomic PTE updates */
diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h
index 0966899d974b..c4a029ccb4d3 100644
--- a/arch/powerpc/include/asm/ppc_asm.h
+++ b/arch/powerpc/include/asm/ppc_asm.h
@@ -268,7 +268,7 @@ n:
268 * Loads the value of the constant expression 'expr' into register 'rn' 268 * Loads the value of the constant expression 'expr' into register 'rn'
269 * using immediate instructions only. Use this when it's important not 269 * using immediate instructions only. Use this when it's important not
270 * to reference other data (i.e. on ppc64 when the TOC pointer is not 270 * to reference other data (i.e. on ppc64 when the TOC pointer is not
271 * valid). 271 * valid) and when 'expr' is a constant or absolute address.
272 * 272 *
273 * LOAD_REG_ADDR(rn, name) 273 * LOAD_REG_ADDR(rn, name)
274 * Loads the address of label 'name' into register 'rn'. Use this when 274 * Loads the address of label 'name' into register 'rn'. Use this when
diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h
index be980f4ee495..67453766bff1 100644
--- a/arch/powerpc/include/asm/reg_booke.h
+++ b/arch/powerpc/include/asm/reg_booke.h
@@ -109,6 +109,7 @@
109#define SPRN_EVPR 0x3D6 /* Exception Vector Prefix Register */ 109#define SPRN_EVPR 0x3D6 /* Exception Vector Prefix Register */
110#define SPRN_L1CSR0 0x3F2 /* L1 Cache Control and Status Register 0 */ 110#define SPRN_L1CSR0 0x3F2 /* L1 Cache Control and Status Register 0 */
111#define SPRN_L1CSR1 0x3F3 /* L1 Cache Control and Status Register 1 */ 111#define SPRN_L1CSR1 0x3F3 /* L1 Cache Control and Status Register 1 */
112#define SPRN_MMUCSR0 0x3F4 /* MMU Control and Status Register 0 */
112#define SPRN_PIT 0x3DB /* Programmable Interval Timer */ 113#define SPRN_PIT 0x3DB /* Programmable Interval Timer */
113#define SPRN_BUCSR 0x3F5 /* Branch Unit Control and Status */ 114#define SPRN_BUCSR 0x3F5 /* Branch Unit Control and Status */
114#define SPRN_L2CSR0 0x3F9 /* L2 Data Cache Control and Status Register 0 */ 115#define SPRN_L2CSR0 0x3F9 /* L2 Data Cache Control and Status Register 0 */
@@ -410,6 +411,12 @@
410#define L2CSR0_L2LOA 0x00000080 /* L2 Cache Lock Overflow Allocate */ 411#define L2CSR0_L2LOA 0x00000080 /* L2 Cache Lock Overflow Allocate */
411#define L2CSR0_L2LO 0x00000020 /* L2 Cache Lock Overflow */ 412#define L2CSR0_L2LO 0x00000020 /* L2 Cache Lock Overflow */
412 413
414/* Bit definitions for MMUCSR0 */
415#define MMUCSR0_TLB1FI 0x00000002 /* TLB1 Flash invalidate */
416#define MMUCSR0_TLB0FI 0x00000004 /* TLB0 Flash invalidate */
417#define MMUCSR0_TLB2FI 0x00000040 /* TLB2 Flash invalidate */
418#define MMUCSR0_TLB3FI 0x00000020 /* TLB3 Flash invalidate */
419
413/* Bit definitions for SGR. */ 420/* Bit definitions for SGR. */
414#define SGR_NORMAL 0 /* Speculative fetching allowed. */ 421#define SGR_NORMAL 0 /* Speculative fetching allowed. */
415#define SGR_GUARDED 1 /* Speculative fetching disallowed. */ 422#define SGR_GUARDED 1 /* Speculative fetching disallowed. */
diff --git a/arch/powerpc/include/asm/sections.h b/arch/powerpc/include/asm/sections.h
index 07956f3e7844..6fbce725c710 100644
--- a/arch/powerpc/include/asm/sections.h
+++ b/arch/powerpc/include/asm/sections.h
@@ -18,6 +18,12 @@ static inline int in_kernel_text(unsigned long addr)
18 return 0; 18 return 0;
19} 19}
20 20
21static inline int overlaps_kernel_text(unsigned long start, unsigned long end)
22{
23 return start < (unsigned long)__init_end &&
24 (unsigned long)_stext < end;
25}
26
21#undef dereference_function_descriptor 27#undef dereference_function_descriptor
22static inline void *dereference_function_descriptor(void *ptr) 28static inline void *dereference_function_descriptor(void *ptr)
23{ 29{
diff --git a/arch/powerpc/include/asm/sfp-machine.h b/arch/powerpc/include/asm/sfp-machine.h
new file mode 100644
index 000000000000..ced34f1dc8f8
--- /dev/null
+++ b/arch/powerpc/include/asm/sfp-machine.h
@@ -0,0 +1,353 @@
1/* Machine-dependent software floating-point definitions. PPC version.
2 Copyright (C) 1997 Free Software Foundation, Inc.
3 This file is part of the GNU C Library.
4
5 The GNU C Library is free software; you can redistribute it and/or
6 modify it under the terms of the GNU Library General Public License as
7 published by the Free Software Foundation; either version 2 of the
8 License, or (at your option) any later version.
9
10 The GNU C Library is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 Library General Public License for more details.
14
15 You should have received a copy of the GNU Library General Public
16 License along with the GNU C Library; see the file COPYING.LIB. If
17 not, write to the Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19
20 Actually, this is a PPC (32bit) version, written based on the
21 i386, sparc, and sparc64 versions, by me,
22 Peter Maydell (pmaydell@chiark.greenend.org.uk).
23 Comments are by and large also mine, although they may be inaccurate.
24
25 In picking out asm fragments I've gone with the lowest common
26 denominator, which also happens to be the hardware I have :->
27 That is, a SPARC without hardware multiply and divide.
28 */
29
30/* basic word size definitions */
31#define _FP_W_TYPE_SIZE 32
32#define _FP_W_TYPE unsigned long
33#define _FP_WS_TYPE signed long
34#define _FP_I_TYPE long
35
36#define __ll_B ((UWtype) 1 << (W_TYPE_SIZE / 2))
37#define __ll_lowpart(t) ((UWtype) (t) & (__ll_B - 1))
38#define __ll_highpart(t) ((UWtype) (t) >> (W_TYPE_SIZE / 2))
39
40/* You can optionally code some things like addition in asm. For
41 * example, i386 defines __FP_FRAC_ADD_2 as asm. If you don't
42 * then you get a fragment of C code [if you change an #ifdef 0
43 * in op-2.h] or a call to add_ssaaaa (see below).
44 * Good places to look for asm fragments to use are gcc and glibc.
45 * gcc's longlong.h is useful.
46 */
47
48/* We need to know how to multiply and divide. If the host word size
49 * is >= 2*fracbits you can use FP_MUL_MEAT_n_imm(t,R,X,Y) which
50 * codes the multiply with whatever gcc does to 'a * b'.
51 * _FP_MUL_MEAT_n_wide(t,R,X,Y,f) is used when you have an asm
52 * function that can multiply two 1W values and get a 2W result.
53 * Otherwise you're stuck with _FP_MUL_MEAT_n_hard(t,R,X,Y) which
54 * does bitshifting to avoid overflow.
55 * For division there is FP_DIV_MEAT_n_imm(t,R,X,Y,f) for word size
56 * >= 2*fracbits, where f is either _FP_DIV_HELP_imm or
57 * _FP_DIV_HELP_ldiv (see op-1.h).
58 * _FP_DIV_MEAT_udiv() is if you have asm to do 2W/1W => (1W, 1W).
59 * [GCC and glibc have longlong.h which has the asm macro udiv_qrnnd
60 * to do this.]
61 * In general, 'n' is the number of words required to hold the type,
62 * and 't' is either S, D or Q for single/double/quad.
63 * -- PMM
64 */
65/* Example: SPARC64:
66 * #define _FP_MUL_MEAT_S(R,X,Y) _FP_MUL_MEAT_1_imm(S,R,X,Y)
67 * #define _FP_MUL_MEAT_D(R,X,Y) _FP_MUL_MEAT_1_wide(D,R,X,Y,umul_ppmm)
68 * #define _FP_MUL_MEAT_Q(R,X,Y) _FP_MUL_MEAT_2_wide(Q,R,X,Y,umul_ppmm)
69 *
70 * #define _FP_DIV_MEAT_S(R,X,Y) _FP_DIV_MEAT_1_imm(S,R,X,Y,_FP_DIV_HELP_imm)
71 * #define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_1_udiv(D,R,X,Y)
72 * #define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_2_udiv_64(Q,R,X,Y)
73 *
74 * Example: i386:
75 * #define _FP_MUL_MEAT_S(R,X,Y) _FP_MUL_MEAT_1_wide(S,R,X,Y,_i386_mul_32_64)
76 * #define _FP_MUL_MEAT_D(R,X,Y) _FP_MUL_MEAT_2_wide(D,R,X,Y,_i386_mul_32_64)
77 *
78 * #define _FP_DIV_MEAT_S(R,X,Y) _FP_DIV_MEAT_1_udiv(S,R,X,Y,_i386_div_64_32)
79 * #define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_2_udiv_64(D,R,X,Y)
80 */
81
82#define _FP_MUL_MEAT_S(R,X,Y) _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm)
83#define _FP_MUL_MEAT_D(R,X,Y) _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
84
85#define _FP_DIV_MEAT_S(R,X,Y) _FP_DIV_MEAT_1_udiv(S,R,X,Y)
86#define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_2_udiv(D,R,X,Y)
87
88/* These macros define what NaN looks like. They're supposed to expand to
89 * a comma-separated set of 32bit unsigned ints that encode NaN.
90 */
91#define _FP_NANFRAC_S ((_FP_QNANBIT_S << 1) - 1)
92#define _FP_NANFRAC_D ((_FP_QNANBIT_D << 1) - 1), -1
93#define _FP_NANFRAC_Q ((_FP_QNANBIT_Q << 1) - 1), -1, -1, -1
94#define _FP_NANSIGN_S 0
95#define _FP_NANSIGN_D 0
96#define _FP_NANSIGN_Q 0
97
98#define _FP_KEEPNANFRACP 1
99
100/* Exception flags. We use the bit positions of the appropriate bits
101 in the FPSCR, which also correspond to the FE_* bits. This makes
102 everything easier ;-). */
103#define FP_EX_INVALID (1 << (31 - 2))
104#define FP_EX_INVALID_SNAN EFLAG_VXSNAN
105#define FP_EX_INVALID_ISI EFLAG_VXISI
106#define FP_EX_INVALID_IDI EFLAG_VXIDI
107#define FP_EX_INVALID_ZDZ EFLAG_VXZDZ
108#define FP_EX_INVALID_IMZ EFLAG_VXIMZ
109#define FP_EX_OVERFLOW (1 << (31 - 3))
110#define FP_EX_UNDERFLOW (1 << (31 - 4))
111#define FP_EX_DIVZERO (1 << (31 - 5))
112#define FP_EX_INEXACT (1 << (31 - 6))
113
114/* This macro appears to be called when both X and Y are NaNs, and
115 * has to choose one and copy it to R. i386 goes for the larger of the
116 * two, sparc64 just picks Y. I don't understand this at all so I'll
117 * go with sparc64 because it's shorter :-> -- PMM
118 */
119#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \
120 do { \
121 R##_s = Y##_s; \
122 _FP_FRAC_COPY_##wc(R,Y); \
123 R##_c = FP_CLS_NAN; \
124 } while (0)
125
126
127#include <linux/kernel.h>
128#include <linux/sched.h>
129
130#define __FPU_FPSCR (current->thread.fpscr.val)
131
132/* We only actually write to the destination register
133 * if exceptions signalled (if any) will not trap.
134 */
135#define __FPU_ENABLED_EXC \
136({ \
137 (__FPU_FPSCR >> 3) & 0x1f; \
138})
139
140#define __FPU_TRAP_P(bits) \
141 ((__FPU_ENABLED_EXC & (bits)) != 0)
142
143#define __FP_PACK_S(val,X) \
144({ int __exc = _FP_PACK_CANONICAL(S,1,X); \
145 if(!__exc || !__FPU_TRAP_P(__exc)) \
146 _FP_PACK_RAW_1_P(S,val,X); \
147 __exc; \
148})
149
150#define __FP_PACK_D(val,X) \
151 do { \
152 _FP_PACK_CANONICAL(D, 2, X); \
153 if (!FP_CUR_EXCEPTIONS || !__FPU_TRAP_P(FP_CUR_EXCEPTIONS)) \
154 _FP_PACK_RAW_2_P(D, val, X); \
155 } while (0)
156
157#define __FP_PACK_DS(val,X) \
158 do { \
159 FP_DECL_S(__X); \
160 FP_CONV(S, D, 1, 2, __X, X); \
161 _FP_PACK_CANONICAL(S, 1, __X); \
162 if (!FP_CUR_EXCEPTIONS || !__FPU_TRAP_P(FP_CUR_EXCEPTIONS)) { \
163 _FP_UNPACK_CANONICAL(S, 1, __X); \
164 FP_CONV(D, S, 2, 1, X, __X); \
165 _FP_PACK_CANONICAL(D, 2, X); \
166 if (!FP_CUR_EXCEPTIONS || !__FPU_TRAP_P(FP_CUR_EXCEPTIONS)) \
167 _FP_PACK_RAW_2_P(D, val, X); \
168 } \
169 } while (0)
170
171/* Obtain the current rounding mode. */
172#define FP_ROUNDMODE \
173({ \
174 __FPU_FPSCR & 0x3; \
175})
176
177/* the asm fragments go here: all these are taken from glibc-2.0.5's
178 * stdlib/longlong.h
179 */
180
181#include <linux/types.h>
182#include <asm/byteorder.h>
183
184/* add_ssaaaa is used in op-2.h and should be equivalent to
185 * #define add_ssaaaa(sh,sl,ah,al,bh,bl) (sh = ah+bh+ (( sl = al+bl) < al))
186 * add_ssaaaa(high_sum, low_sum, high_addend_1, low_addend_1,
187 * high_addend_2, low_addend_2) adds two UWtype integers, composed by
188 * HIGH_ADDEND_1 and LOW_ADDEND_1, and HIGH_ADDEND_2 and LOW_ADDEND_2
189 * respectively. The result is placed in HIGH_SUM and LOW_SUM. Overflow
190 * (i.e. carry out) is not stored anywhere, and is lost.
191 */
192#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
193 do { \
194 if (__builtin_constant_p (bh) && (bh) == 0) \
195 __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2" \
196 : "=r" ((USItype)(sh)), \
197 "=&r" ((USItype)(sl)) \
198 : "%r" ((USItype)(ah)), \
199 "%r" ((USItype)(al)), \
200 "rI" ((USItype)(bl))); \
201 else if (__builtin_constant_p (bh) && (bh) ==~(USItype) 0) \
202 __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2" \
203 : "=r" ((USItype)(sh)), \
204 "=&r" ((USItype)(sl)) \
205 : "%r" ((USItype)(ah)), \
206 "%r" ((USItype)(al)), \
207 "rI" ((USItype)(bl))); \
208 else \
209 __asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3" \
210 : "=r" ((USItype)(sh)), \
211 "=&r" ((USItype)(sl)) \
212 : "%r" ((USItype)(ah)), \
213 "r" ((USItype)(bh)), \
214 "%r" ((USItype)(al)), \
215 "rI" ((USItype)(bl))); \
216 } while (0)
217
218/* sub_ddmmss is used in op-2.h and udivmodti4.c and should be equivalent to
219 * #define sub_ddmmss(sh, sl, ah, al, bh, bl) (sh = ah-bh - ((sl = al-bl) > al))
220 * sub_ddmmss(high_difference, low_difference, high_minuend, low_minuend,
221 * high_subtrahend, low_subtrahend) subtracts two two-word UWtype integers,
222 * composed by HIGH_MINUEND_1 and LOW_MINUEND_1, and HIGH_SUBTRAHEND_2 and
223 * LOW_SUBTRAHEND_2 respectively. The result is placed in HIGH_DIFFERENCE
224 * and LOW_DIFFERENCE. Overflow (i.e. carry out) is not stored anywhere,
225 * and is lost.
226 */
227#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
228 do { \
229 if (__builtin_constant_p (ah) && (ah) == 0) \
230 __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2" \
231 : "=r" ((USItype)(sh)), \
232 "=&r" ((USItype)(sl)) \
233 : "r" ((USItype)(bh)), \
234 "rI" ((USItype)(al)), \
235 "r" ((USItype)(bl))); \
236 else if (__builtin_constant_p (ah) && (ah) ==~(USItype) 0) \
237 __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2" \
238 : "=r" ((USItype)(sh)), \
239 "=&r" ((USItype)(sl)) \
240 : "r" ((USItype)(bh)), \
241 "rI" ((USItype)(al)), \
242 "r" ((USItype)(bl))); \
243 else if (__builtin_constant_p (bh) && (bh) == 0) \
244 __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2" \
245 : "=r" ((USItype)(sh)), \
246 "=&r" ((USItype)(sl)) \
247 : "r" ((USItype)(ah)), \
248 "rI" ((USItype)(al)), \
249 "r" ((USItype)(bl))); \
250 else if (__builtin_constant_p (bh) && (bh) ==~(USItype) 0) \
251 __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2" \
252 : "=r" ((USItype)(sh)), \
253 "=&r" ((USItype)(sl)) \
254 : "r" ((USItype)(ah)), \
255 "rI" ((USItype)(al)), \
256 "r" ((USItype)(bl))); \
257 else \
258 __asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2" \
259 : "=r" ((USItype)(sh)), \
260 "=&r" ((USItype)(sl)) \
261 : "r" ((USItype)(ah)), \
262 "r" ((USItype)(bh)), \
263 "rI" ((USItype)(al)), \
264 "r" ((USItype)(bl))); \
265 } while (0)
266
267/* asm fragments for mul and div */
268
269/* umul_ppmm(high_prod, low_prod, multipler, multiplicand) multiplies two
270 * UWtype integers MULTIPLER and MULTIPLICAND, and generates a two UWtype
271 * word product in HIGH_PROD and LOW_PROD.
272 */
273#define umul_ppmm(ph, pl, m0, m1) \
274 do { \
275 USItype __m0 = (m0), __m1 = (m1); \
276 __asm__ ("mulhwu %0,%1,%2" \
277 : "=r" ((USItype)(ph)) \
278 : "%r" (__m0), \
279 "r" (__m1)); \
280 (pl) = __m0 * __m1; \
281 } while (0)
282
283/* udiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
284 * denominator) divides a UDWtype, composed by the UWtype integers
285 * HIGH_NUMERATOR and LOW_NUMERATOR, by DENOMINATOR and places the quotient
286 * in QUOTIENT and the remainder in REMAINDER. HIGH_NUMERATOR must be less
287 * than DENOMINATOR for correct operation. If, in addition, the most
288 * significant bit of DENOMINATOR must be 1, then the pre-processor symbol
289 * UDIV_NEEDS_NORMALIZATION is defined to 1.
290 */
291#define udiv_qrnnd(q, r, n1, n0, d) \
292 do { \
293 UWtype __d1, __d0, __q1, __q0, __r1, __r0, __m; \
294 __d1 = __ll_highpart (d); \
295 __d0 = __ll_lowpart (d); \
296 \
297 __r1 = (n1) % __d1; \
298 __q1 = (n1) / __d1; \
299 __m = (UWtype) __q1 * __d0; \
300 __r1 = __r1 * __ll_B | __ll_highpart (n0); \
301 if (__r1 < __m) \
302 { \
303 __q1--, __r1 += (d); \
304 if (__r1 >= (d)) /* we didn't get carry when adding to __r1 */ \
305 if (__r1 < __m) \
306 __q1--, __r1 += (d); \
307 } \
308 __r1 -= __m; \
309 \
310 __r0 = __r1 % __d1; \
311 __q0 = __r1 / __d1; \
312 __m = (UWtype) __q0 * __d0; \
313 __r0 = __r0 * __ll_B | __ll_lowpart (n0); \
314 if (__r0 < __m) \
315 { \
316 __q0--, __r0 += (d); \
317 if (__r0 >= (d)) \
318 if (__r0 < __m) \
319 __q0--, __r0 += (d); \
320 } \
321 __r0 -= __m; \
322 \
323 (q) = (UWtype) __q1 * __ll_B | __q0; \
324 (r) = __r0; \
325 } while (0)
326
327#define UDIV_NEEDS_NORMALIZATION 1
328
329#define abort() \
330 return 0
331
332#ifdef __BIG_ENDIAN
333#define __BYTE_ORDER __BIG_ENDIAN
334#else
335#define __BYTE_ORDER __LITTLE_ENDIAN
336#endif
337
338/* Exception flags. */
339#define EFLAG_INVALID (1 << (31 - 2))
340#define EFLAG_OVERFLOW (1 << (31 - 3))
341#define EFLAG_UNDERFLOW (1 << (31 - 4))
342#define EFLAG_DIVZERO (1 << (31 - 5))
343#define EFLAG_INEXACT (1 << (31 - 6))
344
345#define EFLAG_VXSNAN (1 << (31 - 7))
346#define EFLAG_VXISI (1 << (31 - 8))
347#define EFLAG_VXIDI (1 << (31 - 9))
348#define EFLAG_VXZDZ (1 << (31 - 10))
349#define EFLAG_VXIMZ (1 << (31 - 11))
350#define EFLAG_VXVC (1 << (31 - 12))
351#define EFLAG_VXSOFT (1 << (31 - 21))
352#define EFLAG_VXSQRT (1 << (31 - 22))
353#define EFLAG_VXCVI (1 << (31 - 23))
diff --git a/arch/powerpc/include/asm/smp.h b/arch/powerpc/include/asm/smp.h
index 4d28e1e4521b..1866cec4f967 100644
--- a/arch/powerpc/include/asm/smp.h
+++ b/arch/powerpc/include/asm/smp.h
@@ -56,9 +56,16 @@ extern int smp_hw_index[];
56 56
57#define raw_smp_processor_id() (current_thread_info()->cpu) 57#define raw_smp_processor_id() (current_thread_info()->cpu)
58#define hard_smp_processor_id() (smp_hw_index[smp_processor_id()]) 58#define hard_smp_processor_id() (smp_hw_index[smp_processor_id()])
59#define get_hard_smp_processor_id(cpu) (smp_hw_index[(cpu)]) 59
60#define set_hard_smp_processor_id(cpu, phys)\ 60static inline int get_hard_smp_processor_id(int cpu)
61 (smp_hw_index[(cpu)] = (phys)) 61{
62 return smp_hw_index[cpu];
63}
64
65static inline void set_hard_smp_processor_id(int cpu, int phys)
66{
67 smp_hw_index[cpu] = phys;
68}
62#endif 69#endif
63 70
64DECLARE_PER_CPU(cpumask_t, cpu_sibling_map); 71DECLARE_PER_CPU(cpumask_t, cpu_sibling_map);
@@ -86,15 +93,21 @@ extern void __cpu_die(unsigned int cpu);
86 93
87#else 94#else
88/* for UP */ 95/* for UP */
89#define hard_smp_processor_id() 0 96#define hard_smp_processor_id() get_hard_smp_processor_id(0)
90#define smp_setup_cpu_maps() 97#define smp_setup_cpu_maps()
91 98
92#endif /* CONFIG_SMP */ 99#endif /* CONFIG_SMP */
93 100
94#ifdef CONFIG_PPC64 101#ifdef CONFIG_PPC64
95#define get_hard_smp_processor_id(CPU) (paca[(CPU)].hw_cpu_id) 102static inline int get_hard_smp_processor_id(int cpu)
96#define set_hard_smp_processor_id(CPU, VAL) \ 103{
97 do { (paca[(CPU)].hw_cpu_id = (VAL)); } while (0) 104 return paca[cpu].hw_cpu_id;
105}
106
107static inline void set_hard_smp_processor_id(int cpu, int phys)
108{
109 paca[cpu].hw_cpu_id = phys;
110}
98 111
99extern void smp_release_cpus(void); 112extern void smp_release_cpus(void);
100 113
@@ -102,10 +115,17 @@ extern void smp_release_cpus(void);
102/* 32-bit */ 115/* 32-bit */
103#ifndef CONFIG_SMP 116#ifndef CONFIG_SMP
104extern int boot_cpuid_phys; 117extern int boot_cpuid_phys;
105#define get_hard_smp_processor_id(cpu) boot_cpuid_phys 118static inline int get_hard_smp_processor_id(int cpu)
106#define set_hard_smp_processor_id(cpu, phys) 119{
107#endif 120 return boot_cpuid_phys;
108#endif 121}
122
123static inline void set_hard_smp_processor_id(int cpu, int phys)
124{
125 boot_cpuid_phys = phys;
126}
127#endif /* !CONFIG_SMP */
128#endif /* !CONFIG_PPC64 */
109 129
110extern int smt_enabled_at_boot; 130extern int smt_enabled_at_boot;
111 131
diff --git a/arch/powerpc/include/asm/systbl.h b/arch/powerpc/include/asm/systbl.h
index f6cc7a43b4fa..803def236654 100644
--- a/arch/powerpc/include/asm/systbl.h
+++ b/arch/powerpc/include/asm/systbl.h
@@ -32,7 +32,7 @@ COMPAT_SYS_SPU(stime)
32COMPAT_SYS(ptrace) 32COMPAT_SYS(ptrace)
33SYSCALL_SPU(alarm) 33SYSCALL_SPU(alarm)
34OLDSYS(fstat) 34OLDSYS(fstat)
35COMPAT_SYS(pause) 35SYSCALL(pause)
36COMPAT_SYS(utime) 36COMPAT_SYS(utime)
37SYSCALL(ni_syscall) 37SYSCALL(ni_syscall)
38SYSCALL(ni_syscall) 38SYSCALL(ni_syscall)
diff --git a/arch/powerpc/include/asm/tlbflush.h b/arch/powerpc/include/asm/tlbflush.h
index 361cd5c7a32b..a2c6bfd85fb7 100644
--- a/arch/powerpc/include/asm/tlbflush.h
+++ b/arch/powerpc/include/asm/tlbflush.h
@@ -29,6 +29,9 @@
29#include <linux/mm.h> 29#include <linux/mm.h>
30 30
31extern void _tlbie(unsigned long address, unsigned int pid); 31extern void _tlbie(unsigned long address, unsigned int pid);
32extern void _tlbil_all(void);
33extern void _tlbil_pid(unsigned int pid);
34extern void _tlbil_va(unsigned long address, unsigned int pid);
32 35
33#if defined(CONFIG_40x) || defined(CONFIG_8xx) 36#if defined(CONFIG_40x) || defined(CONFIG_8xx)
34#define _tlbia() asm volatile ("tlbia; sync" : : : "memory") 37#define _tlbia() asm volatile ("tlbia; sync" : : : "memory")
@@ -38,31 +41,31 @@ extern void _tlbia(void);
38 41
39static inline void flush_tlb_mm(struct mm_struct *mm) 42static inline void flush_tlb_mm(struct mm_struct *mm)
40{ 43{
41 _tlbia(); 44 _tlbil_pid(mm->context.id);
42} 45}
43 46
44static inline void flush_tlb_page(struct vm_area_struct *vma, 47static inline void flush_tlb_page(struct vm_area_struct *vma,
45 unsigned long vmaddr) 48 unsigned long vmaddr)
46{ 49{
47 _tlbie(vmaddr, vma ? vma->vm_mm->context.id : 0); 50 _tlbil_va(vmaddr, vma ? vma->vm_mm->context.id : 0);
48} 51}
49 52
50static inline void flush_tlb_page_nohash(struct vm_area_struct *vma, 53static inline void flush_tlb_page_nohash(struct vm_area_struct *vma,
51 unsigned long vmaddr) 54 unsigned long vmaddr)
52{ 55{
53 _tlbie(vmaddr, vma ? vma->vm_mm->context.id : 0); 56 flush_tlb_page(vma, vmaddr);
54} 57}
55 58
56static inline void flush_tlb_range(struct vm_area_struct *vma, 59static inline void flush_tlb_range(struct vm_area_struct *vma,
57 unsigned long start, unsigned long end) 60 unsigned long start, unsigned long end)
58{ 61{
59 _tlbia(); 62 _tlbil_pid(vma->vm_mm->context.id);
60} 63}
61 64
62static inline void flush_tlb_kernel_range(unsigned long start, 65static inline void flush_tlb_kernel_range(unsigned long start,
63 unsigned long end) 66 unsigned long end)
64{ 67{
65 _tlbia(); 68 _tlbil_pid(0);
66} 69}
67 70
68#elif defined(CONFIG_PPC32) 71#elif defined(CONFIG_PPC32)
diff --git a/arch/powerpc/include/asm/types.h b/arch/powerpc/include/asm/types.h
index d3374bc865ba..a9a9262e84a3 100644
--- a/arch/powerpc/include/asm/types.h
+++ b/arch/powerpc/include/asm/types.h
@@ -55,7 +55,7 @@ typedef u64 phys_addr_t;
55typedef u32 phys_addr_t; 55typedef u32 phys_addr_t;
56#endif 56#endif
57 57
58#ifdef __powerpc64__ 58#if defined(__powerpc64__) || defined(CONFIG_PHYS_64BIT)
59typedef u64 dma_addr_t; 59typedef u64 dma_addr_t;
60#else 60#else
61typedef u32 dma_addr_t; 61typedef u32 dma_addr_t;
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-04 19:24:48 -0400