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-rw-r--r--arch/powerpc/include/asm/epapr_hcalls.h111
-rw-r--r--arch/powerpc/include/asm/kvm_asm.h3
-rw-r--r--arch/powerpc/include/asm/kvm_book3s.h27
-rw-r--r--arch/powerpc/include/asm/kvm_book3s_asm.h1
-rw-r--r--arch/powerpc/include/asm/kvm_booke.h6
-rw-r--r--arch/powerpc/include/asm/kvm_host.h61
-rw-r--r--arch/powerpc/include/asm/kvm_para.h80
-rw-r--r--arch/powerpc/include/asm/kvm_ppc.h13
-rw-r--r--arch/powerpc/include/asm/pgtable.h21
-rw-r--r--arch/powerpc/include/asm/reg.h43
-rw-r--r--arch/powerpc/include/asm/switch_to.h2
-rw-r--r--arch/powerpc/include/uapi/asm/kvm.h3
-rw-r--r--arch/powerpc/include/uapi/asm/tm.h2
13 files changed, 257 insertions, 116 deletions
diff --git a/arch/powerpc/include/asm/epapr_hcalls.h b/arch/powerpc/include/asm/epapr_hcalls.h
index 86b0ac79990c..334459ad145b 100644
--- a/arch/powerpc/include/asm/epapr_hcalls.h
+++ b/arch/powerpc/include/asm/epapr_hcalls.h
@@ -460,5 +460,116 @@ static inline unsigned int ev_idle(void)
460 460
461 return r3; 461 return r3;
462} 462}
463
464#ifdef CONFIG_EPAPR_PARAVIRT
465static inline unsigned long epapr_hypercall(unsigned long *in,
466 unsigned long *out,
467 unsigned long nr)
468{
469 unsigned long register r0 asm("r0");
470 unsigned long register r3 asm("r3") = in[0];
471 unsigned long register r4 asm("r4") = in[1];
472 unsigned long register r5 asm("r5") = in[2];
473 unsigned long register r6 asm("r6") = in[3];
474 unsigned long register r7 asm("r7") = in[4];
475 unsigned long register r8 asm("r8") = in[5];
476 unsigned long register r9 asm("r9") = in[6];
477 unsigned long register r10 asm("r10") = in[7];
478 unsigned long register r11 asm("r11") = nr;
479 unsigned long register r12 asm("r12");
480
481 asm volatile("bl epapr_hypercall_start"
482 : "=r"(r0), "=r"(r3), "=r"(r4), "=r"(r5), "=r"(r6),
483 "=r"(r7), "=r"(r8), "=r"(r9), "=r"(r10), "=r"(r11),
484 "=r"(r12)
485 : "r"(r3), "r"(r4), "r"(r5), "r"(r6), "r"(r7), "r"(r8),
486 "r"(r9), "r"(r10), "r"(r11)
487 : "memory", "cc", "xer", "ctr", "lr");
488
489 out[0] = r4;
490 out[1] = r5;
491 out[2] = r6;
492 out[3] = r7;
493 out[4] = r8;
494 out[5] = r9;
495 out[6] = r10;
496 out[7] = r11;
497
498 return r3;
499}
500#else
501static unsigned long epapr_hypercall(unsigned long *in,
502 unsigned long *out,
503 unsigned long nr)
504{
505 return EV_UNIMPLEMENTED;
506}
507#endif
508
509static inline long epapr_hypercall0_1(unsigned int nr, unsigned long *r2)
510{
511 unsigned long in[8];
512 unsigned long out[8];
513 unsigned long r;
514
515 r = epapr_hypercall(in, out, nr);
516 *r2 = out[0];
517
518 return r;
519}
520
521static inline long epapr_hypercall0(unsigned int nr)
522{
523 unsigned long in[8];
524 unsigned long out[8];
525
526 return epapr_hypercall(in, out, nr);
527}
528
529static inline long epapr_hypercall1(unsigned int nr, unsigned long p1)
530{
531 unsigned long in[8];
532 unsigned long out[8];
533
534 in[0] = p1;
535 return epapr_hypercall(in, out, nr);
536}
537
538static inline long epapr_hypercall2(unsigned int nr, unsigned long p1,
539 unsigned long p2)
540{
541 unsigned long in[8];
542 unsigned long out[8];
543
544 in[0] = p1;
545 in[1] = p2;
546 return epapr_hypercall(in, out, nr);
547}
548
549static inline long epapr_hypercall3(unsigned int nr, unsigned long p1,
550 unsigned long p2, unsigned long p3)
551{
552 unsigned long in[8];
553 unsigned long out[8];
554
555 in[0] = p1;
556 in[1] = p2;
557 in[2] = p3;
558 return epapr_hypercall(in, out, nr);
559}
560
561static inline long epapr_hypercall4(unsigned int nr, unsigned long p1,
562 unsigned long p2, unsigned long p3,
563 unsigned long p4)
564{
565 unsigned long in[8];
566 unsigned long out[8];
567
568 in[0] = p1;
569 in[1] = p2;
570 in[2] = p3;
571 in[3] = p4;
572 return epapr_hypercall(in, out, nr);
573}
463#endif /* !__ASSEMBLY__ */ 574#endif /* !__ASSEMBLY__ */
464#endif /* _EPAPR_HCALLS_H */ 575#endif /* _EPAPR_HCALLS_H */
diff --git a/arch/powerpc/include/asm/kvm_asm.h b/arch/powerpc/include/asm/kvm_asm.h
index 1503d8c7c41b..19eb74a95b59 100644
--- a/arch/powerpc/include/asm/kvm_asm.h
+++ b/arch/powerpc/include/asm/kvm_asm.h
@@ -92,14 +92,17 @@
92#define BOOK3S_INTERRUPT_FP_UNAVAIL 0x800 92#define BOOK3S_INTERRUPT_FP_UNAVAIL 0x800
93#define BOOK3S_INTERRUPT_DECREMENTER 0x900 93#define BOOK3S_INTERRUPT_DECREMENTER 0x900
94#define BOOK3S_INTERRUPT_HV_DECREMENTER 0x980 94#define BOOK3S_INTERRUPT_HV_DECREMENTER 0x980
95#define BOOK3S_INTERRUPT_DOORBELL 0xa00
95#define BOOK3S_INTERRUPT_SYSCALL 0xc00 96#define BOOK3S_INTERRUPT_SYSCALL 0xc00
96#define BOOK3S_INTERRUPT_TRACE 0xd00 97#define BOOK3S_INTERRUPT_TRACE 0xd00
97#define BOOK3S_INTERRUPT_H_DATA_STORAGE 0xe00 98#define BOOK3S_INTERRUPT_H_DATA_STORAGE 0xe00
98#define BOOK3S_INTERRUPT_H_INST_STORAGE 0xe20 99#define BOOK3S_INTERRUPT_H_INST_STORAGE 0xe20
99#define BOOK3S_INTERRUPT_H_EMUL_ASSIST 0xe40 100#define BOOK3S_INTERRUPT_H_EMUL_ASSIST 0xe40
101#define BOOK3S_INTERRUPT_H_DOORBELL 0xe80
100#define BOOK3S_INTERRUPT_PERFMON 0xf00 102#define BOOK3S_INTERRUPT_PERFMON 0xf00
101#define BOOK3S_INTERRUPT_ALTIVEC 0xf20 103#define BOOK3S_INTERRUPT_ALTIVEC 0xf20
102#define BOOK3S_INTERRUPT_VSX 0xf40 104#define BOOK3S_INTERRUPT_VSX 0xf40
105#define BOOK3S_INTERRUPT_H_FAC_UNAVAIL 0xf80
103 106
104#define BOOK3S_IRQPRIO_SYSTEM_RESET 0 107#define BOOK3S_IRQPRIO_SYSTEM_RESET 0
105#define BOOK3S_IRQPRIO_DATA_SEGMENT 1 108#define BOOK3S_IRQPRIO_DATA_SEGMENT 1
diff --git a/arch/powerpc/include/asm/kvm_book3s.h b/arch/powerpc/include/asm/kvm_book3s.h
index bc23b1ba7980..83851aabfdc8 100644
--- a/arch/powerpc/include/asm/kvm_book3s.h
+++ b/arch/powerpc/include/asm/kvm_book3s.h
@@ -186,9 +186,6 @@ extern void kvmppc_update_lpcr(struct kvm *kvm, unsigned long lpcr,
186 186
187extern void kvmppc_entry_trampoline(void); 187extern void kvmppc_entry_trampoline(void);
188extern void kvmppc_hv_entry_trampoline(void); 188extern void kvmppc_hv_entry_trampoline(void);
189extern void kvmppc_load_up_fpu(void);
190extern void kvmppc_load_up_altivec(void);
191extern void kvmppc_load_up_vsx(void);
192extern u32 kvmppc_alignment_dsisr(struct kvm_vcpu *vcpu, unsigned int inst); 189extern u32 kvmppc_alignment_dsisr(struct kvm_vcpu *vcpu, unsigned int inst);
193extern ulong kvmppc_alignment_dar(struct kvm_vcpu *vcpu, unsigned int inst); 190extern ulong kvmppc_alignment_dar(struct kvm_vcpu *vcpu, unsigned int inst);
194extern int kvmppc_h_pr(struct kvm_vcpu *vcpu, unsigned long cmd); 191extern int kvmppc_h_pr(struct kvm_vcpu *vcpu, unsigned long cmd);
@@ -271,16 +268,25 @@ static inline ulong kvmppc_get_pc(struct kvm_vcpu *vcpu)
271 return vcpu->arch.pc; 268 return vcpu->arch.pc;
272} 269}
273 270
274static inline u32 kvmppc_get_last_inst(struct kvm_vcpu *vcpu) 271static inline bool kvmppc_need_byteswap(struct kvm_vcpu *vcpu)
275{ 272{
276 ulong pc = kvmppc_get_pc(vcpu); 273 return (vcpu->arch.shared->msr & MSR_LE) != (MSR_KERNEL & MSR_LE);
274}
277 275
276static inline u32 kvmppc_get_last_inst_internal(struct kvm_vcpu *vcpu, ulong pc)
277{
278 /* Load the instruction manually if it failed to do so in the 278 /* Load the instruction manually if it failed to do so in the
279 * exit path */ 279 * exit path */
280 if (vcpu->arch.last_inst == KVM_INST_FETCH_FAILED) 280 if (vcpu->arch.last_inst == KVM_INST_FETCH_FAILED)
281 kvmppc_ld(vcpu, &pc, sizeof(u32), &vcpu->arch.last_inst, false); 281 kvmppc_ld(vcpu, &pc, sizeof(u32), &vcpu->arch.last_inst, false);
282 282
283 return vcpu->arch.last_inst; 283 return kvmppc_need_byteswap(vcpu) ? swab32(vcpu->arch.last_inst) :
284 vcpu->arch.last_inst;
285}
286
287static inline u32 kvmppc_get_last_inst(struct kvm_vcpu *vcpu)
288{
289 return kvmppc_get_last_inst_internal(vcpu, kvmppc_get_pc(vcpu));
284} 290}
285 291
286/* 292/*
@@ -290,14 +296,7 @@ static inline u32 kvmppc_get_last_inst(struct kvm_vcpu *vcpu)
290 */ 296 */
291static inline u32 kvmppc_get_last_sc(struct kvm_vcpu *vcpu) 297static inline u32 kvmppc_get_last_sc(struct kvm_vcpu *vcpu)
292{ 298{
293 ulong pc = kvmppc_get_pc(vcpu) - 4; 299 return kvmppc_get_last_inst_internal(vcpu, kvmppc_get_pc(vcpu) - 4);
294
295 /* Load the instruction manually if it failed to do so in the
296 * exit path */
297 if (vcpu->arch.last_inst == KVM_INST_FETCH_FAILED)
298 kvmppc_ld(vcpu, &pc, sizeof(u32), &vcpu->arch.last_inst, false);
299
300 return vcpu->arch.last_inst;
301} 300}
302 301
303static inline ulong kvmppc_get_fault_dar(struct kvm_vcpu *vcpu) 302static inline ulong kvmppc_get_fault_dar(struct kvm_vcpu *vcpu)
diff --git a/arch/powerpc/include/asm/kvm_book3s_asm.h b/arch/powerpc/include/asm/kvm_book3s_asm.h
index 192917d2239c..f3a91dc02c98 100644
--- a/arch/powerpc/include/asm/kvm_book3s_asm.h
+++ b/arch/powerpc/include/asm/kvm_book3s_asm.h
@@ -88,6 +88,7 @@ struct kvmppc_host_state {
88 u8 hwthread_req; 88 u8 hwthread_req;
89 u8 hwthread_state; 89 u8 hwthread_state;
90 u8 host_ipi; 90 u8 host_ipi;
91 u8 ptid;
91 struct kvm_vcpu *kvm_vcpu; 92 struct kvm_vcpu *kvm_vcpu;
92 struct kvmppc_vcore *kvm_vcore; 93 struct kvmppc_vcore *kvm_vcore;
93 unsigned long xics_phys; 94 unsigned long xics_phys;
diff --git a/arch/powerpc/include/asm/kvm_booke.h b/arch/powerpc/include/asm/kvm_booke.h
index dd8f61510dfd..80d46b5a7efb 100644
--- a/arch/powerpc/include/asm/kvm_booke.h
+++ b/arch/powerpc/include/asm/kvm_booke.h
@@ -63,6 +63,12 @@ static inline u32 kvmppc_get_xer(struct kvm_vcpu *vcpu)
63 return vcpu->arch.xer; 63 return vcpu->arch.xer;
64} 64}
65 65
66static inline bool kvmppc_need_byteswap(struct kvm_vcpu *vcpu)
67{
68 /* XXX Would need to check TLB entry */
69 return false;
70}
71
66static inline u32 kvmppc_get_last_inst(struct kvm_vcpu *vcpu) 72static inline u32 kvmppc_get_last_inst(struct kvm_vcpu *vcpu)
67{ 73{
68 return vcpu->arch.last_inst; 74 return vcpu->arch.last_inst;
diff --git a/arch/powerpc/include/asm/kvm_host.h b/arch/powerpc/include/asm/kvm_host.h
index 237d1d25b448..1eaea2dea174 100644
--- a/arch/powerpc/include/asm/kvm_host.h
+++ b/arch/powerpc/include/asm/kvm_host.h
@@ -288,6 +288,7 @@ struct kvmppc_vcore {
288 int n_woken; 288 int n_woken;
289 int nap_count; 289 int nap_count;
290 int napping_threads; 290 int napping_threads;
291 int first_vcpuid;
291 u16 pcpu; 292 u16 pcpu;
292 u16 last_cpu; 293 u16 last_cpu;
293 u8 vcore_state; 294 u8 vcore_state;
@@ -298,10 +299,12 @@ struct kvmppc_vcore {
298 u64 stolen_tb; 299 u64 stolen_tb;
299 u64 preempt_tb; 300 u64 preempt_tb;
300 struct kvm_vcpu *runner; 301 struct kvm_vcpu *runner;
302 struct kvm *kvm;
301 u64 tb_offset; /* guest timebase - host timebase */ 303 u64 tb_offset; /* guest timebase - host timebase */
302 ulong lpcr; 304 ulong lpcr;
303 u32 arch_compat; 305 u32 arch_compat;
304 ulong pcr; 306 ulong pcr;
307 ulong dpdes; /* doorbell state (POWER8) */
305}; 308};
306 309
307#define VCORE_ENTRY_COUNT(vc) ((vc)->entry_exit_count & 0xff) 310#define VCORE_ENTRY_COUNT(vc) ((vc)->entry_exit_count & 0xff)
@@ -410,8 +413,7 @@ struct kvm_vcpu_arch {
410 413
411 ulong gpr[32]; 414 ulong gpr[32];
412 415
413 u64 fpr[32]; 416 struct thread_fp_state fp;
414 u64 fpscr;
415 417
416#ifdef CONFIG_SPE 418#ifdef CONFIG_SPE
417 ulong evr[32]; 419 ulong evr[32];
@@ -420,12 +422,7 @@ struct kvm_vcpu_arch {
420 u64 acc; 422 u64 acc;
421#endif 423#endif
422#ifdef CONFIG_ALTIVEC 424#ifdef CONFIG_ALTIVEC
423 vector128 vr[32]; 425 struct thread_vr_state vr;
424 vector128 vscr;
425#endif
426
427#ifdef CONFIG_VSX
428 u64 vsr[64];
429#endif 426#endif
430 427
431#ifdef CONFIG_KVM_BOOKE_HV 428#ifdef CONFIG_KVM_BOOKE_HV
@@ -452,6 +449,7 @@ struct kvm_vcpu_arch {
452 ulong pc; 449 ulong pc;
453 ulong ctr; 450 ulong ctr;
454 ulong lr; 451 ulong lr;
452 ulong tar;
455 453
456 ulong xer; 454 ulong xer;
457 u32 cr; 455 u32 cr;
@@ -461,13 +459,30 @@ struct kvm_vcpu_arch {
461 ulong guest_owned_ext; 459 ulong guest_owned_ext;
462 ulong purr; 460 ulong purr;
463 ulong spurr; 461 ulong spurr;
462 ulong ic;
463 ulong vtb;
464 ulong dscr; 464 ulong dscr;
465 ulong amr; 465 ulong amr;
466 ulong uamor; 466 ulong uamor;
467 ulong iamr;
467 u32 ctrl; 468 u32 ctrl;
469 u32 dabrx;
468 ulong dabr; 470 ulong dabr;
471 ulong dawr;
472 ulong dawrx;
473 ulong ciabr;
469 ulong cfar; 474 ulong cfar;
470 ulong ppr; 475 ulong ppr;
476 ulong pspb;
477 ulong fscr;
478 ulong ebbhr;
479 ulong ebbrr;
480 ulong bescr;
481 ulong csigr;
482 ulong tacr;
483 ulong tcscr;
484 ulong acop;
485 ulong wort;
471 ulong shadow_srr1; 486 ulong shadow_srr1;
472#endif 487#endif
473 u32 vrsave; /* also USPRG0 */ 488 u32 vrsave; /* also USPRG0 */
@@ -502,10 +517,33 @@ struct kvm_vcpu_arch {
502 u32 ccr1; 517 u32 ccr1;
503 u32 dbsr; 518 u32 dbsr;
504 519
505 u64 mmcr[3]; 520 u64 mmcr[5];
506 u32 pmc[8]; 521 u32 pmc[8];
522 u32 spmc[2];
507 u64 siar; 523 u64 siar;
508 u64 sdar; 524 u64 sdar;
525 u64 sier;
526#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
527 u64 tfhar;
528 u64 texasr;
529 u64 tfiar;
530
531 u32 cr_tm;
532 u64 lr_tm;
533 u64 ctr_tm;
534 u64 amr_tm;
535 u64 ppr_tm;
536 u64 dscr_tm;
537 u64 tar_tm;
538
539 ulong gpr_tm[32];
540
541 struct thread_fp_state fp_tm;
542
543 struct thread_vr_state vr_tm;
544 u32 vrsave_tm; /* also USPRG0 */
545
546#endif
509 547
510#ifdef CONFIG_KVM_EXIT_TIMING 548#ifdef CONFIG_KVM_EXIT_TIMING
511 struct mutex exit_timing_lock; 549 struct mutex exit_timing_lock;
@@ -546,6 +584,7 @@ struct kvm_vcpu_arch {
546#endif 584#endif
547 gpa_t paddr_accessed; 585 gpa_t paddr_accessed;
548 gva_t vaddr_accessed; 586 gva_t vaddr_accessed;
587 pgd_t *pgdir;
549 588
550 u8 io_gpr; /* GPR used as IO source/target */ 589 u8 io_gpr; /* GPR used as IO source/target */
551 u8 mmio_is_bigendian; 590 u8 mmio_is_bigendian;
@@ -603,7 +642,6 @@ struct kvm_vcpu_arch {
603 struct list_head run_list; 642 struct list_head run_list;
604 struct task_struct *run_task; 643 struct task_struct *run_task;
605 struct kvm_run *kvm_run; 644 struct kvm_run *kvm_run;
606 pgd_t *pgdir;
607 645
608 spinlock_t vpa_update_lock; 646 spinlock_t vpa_update_lock;
609 struct kvmppc_vpa vpa; 647 struct kvmppc_vpa vpa;
@@ -616,9 +654,12 @@ struct kvm_vcpu_arch {
616 spinlock_t tbacct_lock; 654 spinlock_t tbacct_lock;
617 u64 busy_stolen; 655 u64 busy_stolen;
618 u64 busy_preempt; 656 u64 busy_preempt;
657 unsigned long intr_msr;
619#endif 658#endif
620}; 659};
621 660
661#define VCPU_FPR(vcpu, i) (vcpu)->arch.fp.fpr[i][TS_FPROFFSET]
662
622/* Values for vcpu->arch.state */ 663/* Values for vcpu->arch.state */
623#define KVMPPC_VCPU_NOTREADY 0 664#define KVMPPC_VCPU_NOTREADY 0
624#define KVMPPC_VCPU_RUNNABLE 1 665#define KVMPPC_VCPU_RUNNABLE 1
diff --git a/arch/powerpc/include/asm/kvm_para.h b/arch/powerpc/include/asm/kvm_para.h
index 2b119654b4c1..336a91acb8b1 100644
--- a/arch/powerpc/include/asm/kvm_para.h
+++ b/arch/powerpc/include/asm/kvm_para.h
@@ -39,10 +39,6 @@ static inline int kvm_para_available(void)
39 return 1; 39 return 1;
40} 40}
41 41
42extern unsigned long kvm_hypercall(unsigned long *in,
43 unsigned long *out,
44 unsigned long nr);
45
46#else 42#else
47 43
48static inline int kvm_para_available(void) 44static inline int kvm_para_available(void)
@@ -50,82 +46,8 @@ static inline int kvm_para_available(void)
50 return 0; 46 return 0;
51} 47}
52 48
53static unsigned long kvm_hypercall(unsigned long *in,
54 unsigned long *out,
55 unsigned long nr)
56{
57 return EV_UNIMPLEMENTED;
58}
59
60#endif 49#endif
61 50
62static inline long kvm_hypercall0_1(unsigned int nr, unsigned long *r2)
63{
64 unsigned long in[8];
65 unsigned long out[8];
66 unsigned long r;
67
68 r = kvm_hypercall(in, out, KVM_HCALL_TOKEN(nr));
69 *r2 = out[0];
70
71 return r;
72}
73
74static inline long kvm_hypercall0(unsigned int nr)
75{
76 unsigned long in[8];
77 unsigned long out[8];
78
79 return kvm_hypercall(in, out, KVM_HCALL_TOKEN(nr));
80}
81
82static inline long kvm_hypercall1(unsigned int nr, unsigned long p1)
83{
84 unsigned long in[8];
85 unsigned long out[8];
86
87 in[0] = p1;
88 return kvm_hypercall(in, out, KVM_HCALL_TOKEN(nr));
89}
90
91static inline long kvm_hypercall2(unsigned int nr, unsigned long p1,
92 unsigned long p2)
93{
94 unsigned long in[8];
95 unsigned long out[8];
96
97 in[0] = p1;
98 in[1] = p2;
99 return kvm_hypercall(in, out, KVM_HCALL_TOKEN(nr));
100}
101
102static inline long kvm_hypercall3(unsigned int nr, unsigned long p1,
103 unsigned long p2, unsigned long p3)
104{
105 unsigned long in[8];
106 unsigned long out[8];
107
108 in[0] = p1;
109 in[1] = p2;
110 in[2] = p3;
111 return kvm_hypercall(in, out, KVM_HCALL_TOKEN(nr));
112}
113
114static inline long kvm_hypercall4(unsigned int nr, unsigned long p1,
115 unsigned long p2, unsigned long p3,
116 unsigned long p4)
117{
118 unsigned long in[8];
119 unsigned long out[8];
120
121 in[0] = p1;
122 in[1] = p2;
123 in[2] = p3;
124 in[3] = p4;
125 return kvm_hypercall(in, out, KVM_HCALL_TOKEN(nr));
126}
127
128
129static inline unsigned int kvm_arch_para_features(void) 51static inline unsigned int kvm_arch_para_features(void)
130{ 52{
131 unsigned long r; 53 unsigned long r;
@@ -133,7 +55,7 @@ static inline unsigned int kvm_arch_para_features(void)
133 if (!kvm_para_available()) 55 if (!kvm_para_available())
134 return 0; 56 return 0;
135 57
136 if(kvm_hypercall0_1(KVM_HC_FEATURES, &r)) 58 if(epapr_hypercall0_1(KVM_HCALL_TOKEN(KVM_HC_FEATURES), &r))
137 return 0; 59 return 0;
138 60
139 return r; 61 return r;
diff --git a/arch/powerpc/include/asm/kvm_ppc.h b/arch/powerpc/include/asm/kvm_ppc.h
index c8317fbf92c4..fcd53f0d34ba 100644
--- a/arch/powerpc/include/asm/kvm_ppc.h
+++ b/arch/powerpc/include/asm/kvm_ppc.h
@@ -54,12 +54,13 @@ extern void kvmppc_handler_highmem(void);
54extern void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu); 54extern void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu);
55extern int kvmppc_handle_load(struct kvm_run *run, struct kvm_vcpu *vcpu, 55extern int kvmppc_handle_load(struct kvm_run *run, struct kvm_vcpu *vcpu,
56 unsigned int rt, unsigned int bytes, 56 unsigned int rt, unsigned int bytes,
57 int is_bigendian); 57 int is_default_endian);
58extern int kvmppc_handle_loads(struct kvm_run *run, struct kvm_vcpu *vcpu, 58extern int kvmppc_handle_loads(struct kvm_run *run, struct kvm_vcpu *vcpu,
59 unsigned int rt, unsigned int bytes, 59 unsigned int rt, unsigned int bytes,
60 int is_bigendian); 60 int is_default_endian);
61extern int kvmppc_handle_store(struct kvm_run *run, struct kvm_vcpu *vcpu, 61extern int kvmppc_handle_store(struct kvm_run *run, struct kvm_vcpu *vcpu,
62 u64 val, unsigned int bytes, int is_bigendian); 62 u64 val, unsigned int bytes,
63 int is_default_endian);
63 64
64extern int kvmppc_emulate_instruction(struct kvm_run *run, 65extern int kvmppc_emulate_instruction(struct kvm_run *run,
65 struct kvm_vcpu *vcpu); 66 struct kvm_vcpu *vcpu);
@@ -455,6 +456,12 @@ static inline void kvmppc_fix_ee_before_entry(void)
455 trace_hardirqs_on(); 456 trace_hardirqs_on();
456 457
457#ifdef CONFIG_PPC64 458#ifdef CONFIG_PPC64
459 /*
460 * To avoid races, the caller must have gone directly from having
461 * interrupts fully-enabled to hard-disabled.
462 */
463 WARN_ON(local_paca->irq_happened != PACA_IRQ_HARD_DIS);
464
458 /* Only need to enable IRQs by hard enabling them after this */ 465 /* Only need to enable IRQs by hard enabling them after this */
459 local_paca->irq_happened = 0; 466 local_paca->irq_happened = 0;
460 local_paca->soft_enabled = 1; 467 local_paca->soft_enabled = 1;
diff --git a/arch/powerpc/include/asm/pgtable.h b/arch/powerpc/include/asm/pgtable.h
index b999ca318985..f83b6f3e1b39 100644
--- a/arch/powerpc/include/asm/pgtable.h
+++ b/arch/powerpc/include/asm/pgtable.h
@@ -287,6 +287,27 @@ extern int gup_hugepte(pte_t *ptep, unsigned long sz, unsigned long addr,
287#endif 287#endif
288pte_t *find_linux_pte_or_hugepte(pgd_t *pgdir, unsigned long ea, 288pte_t *find_linux_pte_or_hugepte(pgd_t *pgdir, unsigned long ea,
289 unsigned *shift); 289 unsigned *shift);
290
291static inline pte_t *lookup_linux_ptep(pgd_t *pgdir, unsigned long hva,
292 unsigned long *pte_sizep)
293{
294 pte_t *ptep;
295 unsigned long ps = *pte_sizep;
296 unsigned int shift;
297
298 ptep = find_linux_pte_or_hugepte(pgdir, hva, &shift);
299 if (!ptep)
300 return NULL;
301 if (shift)
302 *pte_sizep = 1ul << shift;
303 else
304 *pte_sizep = PAGE_SIZE;
305
306 if (ps > *pte_sizep)
307 return NULL;
308
309 return ptep;
310}
290#endif /* __ASSEMBLY__ */ 311#endif /* __ASSEMBLY__ */
291 312
292#endif /* __KERNEL__ */ 313#endif /* __KERNEL__ */
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index 62b114e079cf..90c06ec6eff5 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -223,17 +223,26 @@
223#define CTRL_TE 0x00c00000 /* thread enable */ 223#define CTRL_TE 0x00c00000 /* thread enable */
224#define CTRL_RUNLATCH 0x1 224#define CTRL_RUNLATCH 0x1
225#define SPRN_DAWR 0xB4 225#define SPRN_DAWR 0xB4
226#define SPRN_CIABR 0xBB
227#define CIABR_PRIV 0x3
228#define CIABR_PRIV_USER 1
229#define CIABR_PRIV_SUPER 2
230#define CIABR_PRIV_HYPER 3
226#define SPRN_DAWRX 0xBC 231#define SPRN_DAWRX 0xBC
227#define DAWRX_USER (1UL << 0) 232#define DAWRX_USER __MASK(0)
228#define DAWRX_KERNEL (1UL << 1) 233#define DAWRX_KERNEL __MASK(1)
229#define DAWRX_HYP (1UL << 2) 234#define DAWRX_HYP __MASK(2)
235#define DAWRX_WTI __MASK(3)
236#define DAWRX_WT __MASK(4)
237#define DAWRX_DR __MASK(5)
238#define DAWRX_DW __MASK(6)
230#define SPRN_DABR 0x3F5 /* Data Address Breakpoint Register */ 239#define SPRN_DABR 0x3F5 /* Data Address Breakpoint Register */
231#define SPRN_DABR2 0x13D /* e300 */ 240#define SPRN_DABR2 0x13D /* e300 */
232#define SPRN_DABRX 0x3F7 /* Data Address Breakpoint Register Extension */ 241#define SPRN_DABRX 0x3F7 /* Data Address Breakpoint Register Extension */
233#define DABRX_USER (1UL << 0) 242#define DABRX_USER __MASK(0)
234#define DABRX_KERNEL (1UL << 1) 243#define DABRX_KERNEL __MASK(1)
235#define DABRX_HYP (1UL << 2) 244#define DABRX_HYP __MASK(2)
236#define DABRX_BTI (1UL << 3) 245#define DABRX_BTI __MASK(3)
237#define DABRX_ALL (DABRX_BTI | DABRX_HYP | DABRX_KERNEL | DABRX_USER) 246#define DABRX_ALL (DABRX_BTI | DABRX_HYP | DABRX_KERNEL | DABRX_USER)
238#define SPRN_DAR 0x013 /* Data Address Register */ 247#define SPRN_DAR 0x013 /* Data Address Register */
239#define SPRN_DBCR 0x136 /* e300 Data Breakpoint Control Reg */ 248#define SPRN_DBCR 0x136 /* e300 Data Breakpoint Control Reg */
@@ -260,6 +269,8 @@
260#define SPRN_HRMOR 0x139 /* Real mode offset register */ 269#define SPRN_HRMOR 0x139 /* Real mode offset register */
261#define SPRN_HSRR0 0x13A /* Hypervisor Save/Restore 0 */ 270#define SPRN_HSRR0 0x13A /* Hypervisor Save/Restore 0 */
262#define SPRN_HSRR1 0x13B /* Hypervisor Save/Restore 1 */ 271#define SPRN_HSRR1 0x13B /* Hypervisor Save/Restore 1 */
272#define SPRN_IC 0x350 /* Virtual Instruction Count */
273#define SPRN_VTB 0x351 /* Virtual Time Base */
263/* HFSCR and FSCR bit numbers are the same */ 274/* HFSCR and FSCR bit numbers are the same */
264#define FSCR_TAR_LG 8 /* Enable Target Address Register */ 275#define FSCR_TAR_LG 8 /* Enable Target Address Register */
265#define FSCR_EBB_LG 7 /* Enable Event Based Branching */ 276#define FSCR_EBB_LG 7 /* Enable Event Based Branching */
@@ -298,9 +309,13 @@
298#define LPCR_RMLS 0x1C000000 /* impl dependent rmo limit sel */ 309#define LPCR_RMLS 0x1C000000 /* impl dependent rmo limit sel */
299#define LPCR_RMLS_SH (63-37) 310#define LPCR_RMLS_SH (63-37)
300#define LPCR_ILE 0x02000000 /* !HV irqs set MSR:LE */ 311#define LPCR_ILE 0x02000000 /* !HV irqs set MSR:LE */
312#define LPCR_AIL 0x01800000 /* Alternate interrupt location */
301#define LPCR_AIL_0 0x00000000 /* MMU off exception offset 0x0 */ 313#define LPCR_AIL_0 0x00000000 /* MMU off exception offset 0x0 */
302#define LPCR_AIL_3 0x01800000 /* MMU on exception offset 0xc00...4xxx */ 314#define LPCR_AIL_3 0x01800000 /* MMU on exception offset 0xc00...4xxx */
303#define LPCR_PECE 0x00007000 /* powersave exit cause enable */ 315#define LPCR_ONL 0x00040000 /* online - PURR/SPURR count */
316#define LPCR_PECE 0x0001f000 /* powersave exit cause enable */
317#define LPCR_PECEDP 0x00010000 /* directed priv dbells cause exit */
318#define LPCR_PECEDH 0x00008000 /* directed hyp dbells cause exit */
304#define LPCR_PECE0 0x00004000 /* ext. exceptions can cause exit */ 319#define LPCR_PECE0 0x00004000 /* ext. exceptions can cause exit */
305#define LPCR_PECE1 0x00002000 /* decrementer can cause exit */ 320#define LPCR_PECE1 0x00002000 /* decrementer can cause exit */
306#define LPCR_PECE2 0x00001000 /* machine check etc can cause exit */ 321#define LPCR_PECE2 0x00001000 /* machine check etc can cause exit */
@@ -322,6 +337,8 @@
322#define SPRN_PCR 0x152 /* Processor compatibility register */ 337#define SPRN_PCR 0x152 /* Processor compatibility register */
323#define PCR_VEC_DIS (1ul << (63-0)) /* Vec. disable (bit NA since POWER8) */ 338#define PCR_VEC_DIS (1ul << (63-0)) /* Vec. disable (bit NA since POWER8) */
324#define PCR_VSX_DIS (1ul << (63-1)) /* VSX disable (bit NA since POWER8) */ 339#define PCR_VSX_DIS (1ul << (63-1)) /* VSX disable (bit NA since POWER8) */
340#define PCR_TM_DIS (1ul << (63-2)) /* Trans. memory disable (POWER8) */
341#define PCR_ARCH_206 0x4 /* Architecture 2.06 */
325#define PCR_ARCH_205 0x2 /* Architecture 2.05 */ 342#define PCR_ARCH_205 0x2 /* Architecture 2.05 */
326#define SPRN_HEIR 0x153 /* Hypervisor Emulated Instruction Register */ 343#define SPRN_HEIR 0x153 /* Hypervisor Emulated Instruction Register */
327#define SPRN_TLBINDEXR 0x154 /* P7 TLB control register */ 344#define SPRN_TLBINDEXR 0x154 /* P7 TLB control register */
@@ -368,6 +385,8 @@
368#define DER_EBRKE 0x00000002 /* External Breakpoint Interrupt */ 385#define DER_EBRKE 0x00000002 /* External Breakpoint Interrupt */
369#define DER_DPIE 0x00000001 /* Dev. Port Nonmaskable Request */ 386#define DER_DPIE 0x00000001 /* Dev. Port Nonmaskable Request */
370#define SPRN_DMISS 0x3D0 /* Data TLB Miss Register */ 387#define SPRN_DMISS 0x3D0 /* Data TLB Miss Register */
388#define SPRN_DHDES 0x0B1 /* Directed Hyp. Doorbell Exc. State */
389#define SPRN_DPDES 0x0B0 /* Directed Priv. Doorbell Exc. State */
371#define SPRN_EAR 0x11A /* External Address Register */ 390#define SPRN_EAR 0x11A /* External Address Register */
372#define SPRN_HASH1 0x3D2 /* Primary Hash Address Register */ 391#define SPRN_HASH1 0x3D2 /* Primary Hash Address Register */
373#define SPRN_HASH2 0x3D3 /* Secondary Hash Address Resgister */ 392#define SPRN_HASH2 0x3D3 /* Secondary Hash Address Resgister */
@@ -427,6 +446,7 @@
427#define SPRN_IABR 0x3F2 /* Instruction Address Breakpoint Register */ 446#define SPRN_IABR 0x3F2 /* Instruction Address Breakpoint Register */
428#define SPRN_IABR2 0x3FA /* 83xx */ 447#define SPRN_IABR2 0x3FA /* 83xx */
429#define SPRN_IBCR 0x135 /* 83xx Insn Breakpoint Control Reg */ 448#define SPRN_IBCR 0x135 /* 83xx Insn Breakpoint Control Reg */
449#define SPRN_IAMR 0x03D /* Instr. Authority Mask Reg */
430#define SPRN_HID4 0x3F4 /* 970 HID4 */ 450#define SPRN_HID4 0x3F4 /* 970 HID4 */
431#define HID4_LPES0 (1ul << (63-0)) /* LPAR env. sel. bit 0 */ 451#define HID4_LPES0 (1ul << (63-0)) /* LPAR env. sel. bit 0 */
432#define HID4_RMLS2_SH (63 - 2) /* Real mode limit bottom 2 bits */ 452#define HID4_RMLS2_SH (63 - 2) /* Real mode limit bottom 2 bits */
@@ -541,6 +561,7 @@
541#define SPRN_PIR 0x3FF /* Processor Identification Register */ 561#define SPRN_PIR 0x3FF /* Processor Identification Register */
542#endif 562#endif
543#define SPRN_TIR 0x1BE /* Thread Identification Register */ 563#define SPRN_TIR 0x1BE /* Thread Identification Register */
564#define SPRN_PSPB 0x09F /* Problem State Priority Boost reg */
544#define SPRN_PTEHI 0x3D5 /* 981 7450 PTE HI word (S/W TLB load) */ 565#define SPRN_PTEHI 0x3D5 /* 981 7450 PTE HI word (S/W TLB load) */
545#define SPRN_PTELO 0x3D6 /* 982 7450 PTE LO word (S/W TLB load) */ 566#define SPRN_PTELO 0x3D6 /* 982 7450 PTE LO word (S/W TLB load) */
546#define SPRN_PURR 0x135 /* Processor Utilization of Resources Reg */ 567#define SPRN_PURR 0x135 /* Processor Utilization of Resources Reg */
@@ -682,6 +703,7 @@
682#define SPRN_EBBHR 804 /* Event based branch handler register */ 703#define SPRN_EBBHR 804 /* Event based branch handler register */
683#define SPRN_EBBRR 805 /* Event based branch return register */ 704#define SPRN_EBBRR 805 /* Event based branch return register */
684#define SPRN_BESCR 806 /* Branch event status and control register */ 705#define SPRN_BESCR 806 /* Branch event status and control register */
706#define SPRN_WORT 895 /* Workload optimization register - thread */
685 707
686#define SPRN_PMC1 787 708#define SPRN_PMC1 787
687#define SPRN_PMC2 788 709#define SPRN_PMC2 788
@@ -698,6 +720,11 @@
698#define SIER_SIHV 0x1000000 /* Sampled MSR_HV */ 720#define SIER_SIHV 0x1000000 /* Sampled MSR_HV */
699#define SIER_SIAR_VALID 0x0400000 /* SIAR contents valid */ 721#define SIER_SIAR_VALID 0x0400000 /* SIAR contents valid */
700#define SIER_SDAR_VALID 0x0200000 /* SDAR contents valid */ 722#define SIER_SDAR_VALID 0x0200000 /* SDAR contents valid */
723#define SPRN_TACR 888
724#define SPRN_TCSCR 889
725#define SPRN_CSIGR 890
726#define SPRN_SPMC1 892
727#define SPRN_SPMC2 893
701 728
702/* When EBB is enabled, some of MMCR0/MMCR2/SIER are user accessible */ 729/* When EBB is enabled, some of MMCR0/MMCR2/SIER are user accessible */
703#define MMCR0_USER_MASK (MMCR0_FC | MMCR0_PMXE | MMCR0_PMAO) 730#define MMCR0_USER_MASK (MMCR0_FC | MMCR0_PMXE | MMCR0_PMAO)
diff --git a/arch/powerpc/include/asm/switch_to.h b/arch/powerpc/include/asm/switch_to.h
index aace90547614..0e83e7d8c73f 100644
--- a/arch/powerpc/include/asm/switch_to.h
+++ b/arch/powerpc/include/asm/switch_to.h
@@ -25,10 +25,8 @@ static inline void save_tar(struct thread_struct *prev)
25static inline void save_tar(struct thread_struct *prev) {} 25static inline void save_tar(struct thread_struct *prev) {}
26#endif 26#endif
27 27
28extern void load_up_fpu(void);
29extern void enable_kernel_fp(void); 28extern void enable_kernel_fp(void);
30extern void enable_kernel_altivec(void); 29extern void enable_kernel_altivec(void);
31extern void load_up_altivec(struct task_struct *);
32extern int emulate_altivec(struct pt_regs *); 30extern int emulate_altivec(struct pt_regs *);
33extern void __giveup_vsx(struct task_struct *); 31extern void __giveup_vsx(struct task_struct *);
34extern void giveup_vsx(struct task_struct *); 32extern void giveup_vsx(struct task_struct *);
diff --git a/arch/powerpc/include/uapi/asm/kvm.h b/arch/powerpc/include/uapi/asm/kvm.h
index 6836ec79a830..a6665be4f3ab 100644
--- a/arch/powerpc/include/uapi/asm/kvm.h
+++ b/arch/powerpc/include/uapi/asm/kvm.h
@@ -545,6 +545,7 @@ struct kvm_get_htab_header {
545#define KVM_REG_PPC_TCSCR (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xb1) 545#define KVM_REG_PPC_TCSCR (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xb1)
546#define KVM_REG_PPC_PID (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xb2) 546#define KVM_REG_PPC_PID (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xb2)
547#define KVM_REG_PPC_ACOP (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xb3) 547#define KVM_REG_PPC_ACOP (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xb3)
548#define KVM_REG_PPC_WORT (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xb4)
548 549
549#define KVM_REG_PPC_VRSAVE (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xb4) 550#define KVM_REG_PPC_VRSAVE (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xb4)
550#define KVM_REG_PPC_LPCR (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xb5) 551#define KVM_REG_PPC_LPCR (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xb5)
@@ -553,6 +554,8 @@ struct kvm_get_htab_header {
553/* Architecture compatibility level */ 554/* Architecture compatibility level */
554#define KVM_REG_PPC_ARCH_COMPAT (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xb7) 555#define KVM_REG_PPC_ARCH_COMPAT (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xb7)
555 556
557#define KVM_REG_PPC_DABRX (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xb8)
558
556/* Transactional Memory checkpointed state: 559/* Transactional Memory checkpointed state:
557 * This is all GPRs, all VSX regs and a subset of SPRs 560 * This is all GPRs, all VSX regs and a subset of SPRs
558 */ 561 */
diff --git a/arch/powerpc/include/uapi/asm/tm.h b/arch/powerpc/include/uapi/asm/tm.h
index 85059a00f560..5d836b7c1176 100644
--- a/arch/powerpc/include/uapi/asm/tm.h
+++ b/arch/powerpc/include/uapi/asm/tm.h
@@ -6,6 +6,8 @@
6 * the failure is persistent. PAPR saves 0xff-0xe0 for the hypervisor. 6 * the failure is persistent. PAPR saves 0xff-0xe0 for the hypervisor.
7 */ 7 */
8#define TM_CAUSE_PERSISTENT 0x01 8#define TM_CAUSE_PERSISTENT 0x01
9#define TM_CAUSE_KVM_RESCHED 0xe0 /* From PAPR */
10#define TM_CAUSE_KVM_FAC_UNAV 0xe2 /* From PAPR */
9#define TM_CAUSE_RESCHED 0xde 11#define TM_CAUSE_RESCHED 0xde
10#define TM_CAUSE_TLBI 0xdc 12#define TM_CAUSE_TLBI 0xdc
11#define TM_CAUSE_FAC_UNAV 0xda 13#define TM_CAUSE_FAC_UNAV 0xda