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-rw-r--r--arch/powerpc/include/asm/dcr-regs.h4
-rw-r--r--arch/powerpc/include/asm/siginfo.h5
2 files changed, 4 insertions, 5 deletions
diff --git a/arch/powerpc/include/asm/dcr-regs.h b/arch/powerpc/include/asm/dcr-regs.h
index 29b0ecef980a..f15296cf3598 100644
--- a/arch/powerpc/include/asm/dcr-regs.h
+++ b/arch/powerpc/include/asm/dcr-regs.h
@@ -68,6 +68,10 @@
68#define SDR0_UART3 0x0123 68#define SDR0_UART3 0x0123
69#define SDR0_CUST0 0x4000 69#define SDR0_CUST0 0x4000
70 70
71/* SDRs (460EX/460GT) */
72#define SDR0_ETH_CFG 0x4103
73#define SDR0_ETH_CFG_ECS 0x00000100 /* EMAC int clk source */
74
71/* 75/*
72 * All those DCR register addresses are offsets from the base address 76 * All those DCR register addresses are offsets from the base address
73 * for the SRAM0 controller (e.g. 0x20 on 440GX). The base address is 77 * for the SRAM0 controller (e.g. 0x20 on 440GX). The base address is
diff --git a/arch/powerpc/include/asm/siginfo.h b/arch/powerpc/include/asm/siginfo.h
index 12f1bce037be..49495b0534ed 100644
--- a/arch/powerpc/include/asm/siginfo.h
+++ b/arch/powerpc/include/asm/siginfo.h
@@ -15,11 +15,6 @@
15 15
16#include <asm-generic/siginfo.h> 16#include <asm-generic/siginfo.h>
17 17
18/*
19 * SIGTRAP si_codes
20 */
21#define TRAP_BRANCH (__SI_FAULT|3) /* process taken branch trap */
22#define TRAP_HWBKPT (__SI_FAULT|4) /* hardware breakpoint or watchpoint */
23#undef NSIGTRAP 18#undef NSIGTRAP
24#define NSIGTRAP 4 19#define NSIGTRAP 4
25 20