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-rw-r--r--arch/powerpc/include/asm/device.h11
-rw-r--r--arch/powerpc/include/asm/dma-mapping.h27
-rw-r--r--arch/powerpc/include/asm/iommu.h10
-rw-r--r--arch/powerpc/include/asm/pmc.h2
-rw-r--r--arch/powerpc/include/asm/pte-40x.h1
-rw-r--r--arch/powerpc/include/asm/pte-8xx.h1
-rw-r--r--arch/powerpc/include/asm/pte-common.h5
7 files changed, 47 insertions, 10 deletions
diff --git a/arch/powerpc/include/asm/device.h b/arch/powerpc/include/asm/device.h
index 9dade15d1ab4..6d94d27ed850 100644
--- a/arch/powerpc/include/asm/device.h
+++ b/arch/powerpc/include/asm/device.h
@@ -15,7 +15,16 @@ struct dev_archdata {
15 15
16 /* DMA operations on that device */ 16 /* DMA operations on that device */
17 struct dma_map_ops *dma_ops; 17 struct dma_map_ops *dma_ops;
18 void *dma_data; 18
19 /*
20 * When an iommu is in use, dma_data is used as a ptr to the base of the
21 * iommu_table. Otherwise, it is a simple numerical offset.
22 */
23 union {
24 dma_addr_t dma_offset;
25 void *iommu_table_base;
26 } dma_data;
27
19#ifdef CONFIG_SWIOTLB 28#ifdef CONFIG_SWIOTLB
20 dma_addr_t max_direct_dma_addr; 29 dma_addr_t max_direct_dma_addr;
21#endif 30#endif
diff --git a/arch/powerpc/include/asm/dma-mapping.h b/arch/powerpc/include/asm/dma-mapping.h
index cb2ca41dd526..e281daebddca 100644
--- a/arch/powerpc/include/asm/dma-mapping.h
+++ b/arch/powerpc/include/asm/dma-mapping.h
@@ -26,7 +26,6 @@ extern void *dma_direct_alloc_coherent(struct device *dev, size_t size,
26extern void dma_direct_free_coherent(struct device *dev, size_t size, 26extern void dma_direct_free_coherent(struct device *dev, size_t size,
27 void *vaddr, dma_addr_t dma_handle); 27 void *vaddr, dma_addr_t dma_handle);
28 28
29extern unsigned long get_dma_direct_offset(struct device *dev);
30 29
31#ifdef CONFIG_NOT_COHERENT_CACHE 30#ifdef CONFIG_NOT_COHERENT_CACHE
32/* 31/*
@@ -90,6 +89,28 @@ static inline void set_dma_ops(struct device *dev, struct dma_map_ops *ops)
90 dev->archdata.dma_ops = ops; 89 dev->archdata.dma_ops = ops;
91} 90}
92 91
92/*
93 * get_dma_offset()
94 *
95 * Get the dma offset on configurations where the dma address can be determined
96 * from the physical address by looking at a simple offset. Direct dma and
97 * swiotlb use this function, but it is typically not used by implementations
98 * with an iommu.
99 */
100static inline dma_addr_t get_dma_offset(struct device *dev)
101{
102 if (dev)
103 return dev->archdata.dma_data.dma_offset;
104
105 return PCI_DRAM_OFFSET;
106}
107
108static inline void set_dma_offset(struct device *dev, dma_addr_t off)
109{
110 if (dev)
111 dev->archdata.dma_data.dma_offset = off;
112}
113
93/* this will be removed soon */ 114/* this will be removed soon */
94#define flush_write_buffers() 115#define flush_write_buffers()
95 116
@@ -181,12 +202,12 @@ static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
181 202
182static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr) 203static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
183{ 204{
184 return paddr + get_dma_direct_offset(dev); 205 return paddr + get_dma_offset(dev);
185} 206}
186 207
187static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr) 208static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr)
188{ 209{
189 return daddr - get_dma_direct_offset(dev); 210 return daddr - get_dma_offset(dev);
190} 211}
191 212
192#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) 213#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
diff --git a/arch/powerpc/include/asm/iommu.h b/arch/powerpc/include/asm/iommu.h
index 7464c0daddd1..edfc9803ec91 100644
--- a/arch/powerpc/include/asm/iommu.h
+++ b/arch/powerpc/include/asm/iommu.h
@@ -70,6 +70,16 @@ struct iommu_table {
70 70
71struct scatterlist; 71struct scatterlist;
72 72
73static inline void set_iommu_table_base(struct device *dev, void *base)
74{
75 dev->archdata.dma_data.iommu_table_base = base;
76}
77
78static inline void *get_iommu_table_base(struct device *dev)
79{
80 return dev->archdata.dma_data.iommu_table_base;
81}
82
73/* Frees table for an individual device node */ 83/* Frees table for an individual device node */
74extern void iommu_free_table(struct iommu_table *tbl, const char *node_name); 84extern void iommu_free_table(struct iommu_table *tbl, const char *node_name);
75 85
diff --git a/arch/powerpc/include/asm/pmc.h b/arch/powerpc/include/asm/pmc.h
index ccc68b50d05d..5a9ede4962cb 100644
--- a/arch/powerpc/include/asm/pmc.h
+++ b/arch/powerpc/include/asm/pmc.h
@@ -29,7 +29,7 @@ int reserve_pmc_hardware(perf_irq_t new_perf_irq);
29void release_pmc_hardware(void); 29void release_pmc_hardware(void);
30void ppc_enable_pmcs(void); 30void ppc_enable_pmcs(void);
31 31
32#ifdef CONFIG_PPC64 32#ifdef CONFIG_PPC_BOOK3S_64
33#include <asm/lppaca.h> 33#include <asm/lppaca.h>
34 34
35static inline void ppc_set_pmu_inuse(int inuse) 35static inline void ppc_set_pmu_inuse(int inuse)
diff --git a/arch/powerpc/include/asm/pte-40x.h b/arch/powerpc/include/asm/pte-40x.h
index 6c3e1f4378d4..ec0b0b0d1df9 100644
--- a/arch/powerpc/include/asm/pte-40x.h
+++ b/arch/powerpc/include/asm/pte-40x.h
@@ -43,6 +43,7 @@
43#define _PAGE_NO_CACHE 0x004 /* I: caching is inhibited */ 43#define _PAGE_NO_CACHE 0x004 /* I: caching is inhibited */
44#define _PAGE_WRITETHRU 0x008 /* W: caching is write-through */ 44#define _PAGE_WRITETHRU 0x008 /* W: caching is write-through */
45#define _PAGE_USER 0x010 /* matches one of the zone permission bits */ 45#define _PAGE_USER 0x010 /* matches one of the zone permission bits */
46#define _PAGE_SPECIAL 0x020 /* software: Special page */
46#define _PAGE_RW 0x040 /* software: Writes permitted */ 47#define _PAGE_RW 0x040 /* software: Writes permitted */
47#define _PAGE_DIRTY 0x080 /* software: dirty page */ 48#define _PAGE_DIRTY 0x080 /* software: dirty page */
48#define _PAGE_HWWRITE 0x100 /* hardware: Dirty & RW, set in exception */ 49#define _PAGE_HWWRITE 0x100 /* hardware: Dirty & RW, set in exception */
diff --git a/arch/powerpc/include/asm/pte-8xx.h b/arch/powerpc/include/asm/pte-8xx.h
index 94e979718dcf..dd5ea95fe61e 100644
--- a/arch/powerpc/include/asm/pte-8xx.h
+++ b/arch/powerpc/include/asm/pte-8xx.h
@@ -32,6 +32,7 @@
32#define _PAGE_FILE 0x0002 /* when !present: nonlinear file mapping */ 32#define _PAGE_FILE 0x0002 /* when !present: nonlinear file mapping */
33#define _PAGE_NO_CACHE 0x0002 /* I: cache inhibit */ 33#define _PAGE_NO_CACHE 0x0002 /* I: cache inhibit */
34#define _PAGE_SHARED 0x0004 /* No ASID (context) compare */ 34#define _PAGE_SHARED 0x0004 /* No ASID (context) compare */
35#define _PAGE_SPECIAL 0x0008 /* SW entry, forced to 0 by the TLB miss */
35 36
36/* These five software bits must be masked out when the entry is loaded 37/* These five software bits must be masked out when the entry is loaded
37 * into the TLB. 38 * into the TLB.
diff --git a/arch/powerpc/include/asm/pte-common.h b/arch/powerpc/include/asm/pte-common.h
index c3b65076a263..f2b370180a09 100644
--- a/arch/powerpc/include/asm/pte-common.h
+++ b/arch/powerpc/include/asm/pte-common.h
@@ -25,9 +25,6 @@
25#ifndef _PAGE_WRITETHRU 25#ifndef _PAGE_WRITETHRU
26#define _PAGE_WRITETHRU 0 26#define _PAGE_WRITETHRU 0
27#endif 27#endif
28#ifndef _PAGE_SPECIAL
29#define _PAGE_SPECIAL 0
30#endif
31#ifndef _PAGE_4K_PFN 28#ifndef _PAGE_4K_PFN
32#define _PAGE_4K_PFN 0 29#define _PAGE_4K_PFN 0
33#endif 30#endif
@@ -179,7 +176,5 @@ extern unsigned long bad_call_to_PMD_PAGE_SIZE(void);
179#define HAVE_PAGE_AGP 176#define HAVE_PAGE_AGP
180 177
181/* Advertise support for _PAGE_SPECIAL */ 178/* Advertise support for _PAGE_SPECIAL */
182#ifdef _PAGE_SPECIAL
183#define __HAVE_ARCH_PTE_SPECIAL 179#define __HAVE_ARCH_PTE_SPECIAL
184#endif
185 180