diff options
Diffstat (limited to 'arch/powerpc/include/asm')
-rw-r--r-- | arch/powerpc/include/asm/cpm.h | 16 | ||||
-rw-r--r-- | arch/powerpc/include/asm/cpm2.h | 8 |
2 files changed, 16 insertions, 8 deletions
diff --git a/arch/powerpc/include/asm/cpm.h b/arch/powerpc/include/asm/cpm.h index b5f15340dc22..ea3fdb9fe257 100644 --- a/arch/powerpc/include/asm/cpm.h +++ b/arch/powerpc/include/asm/cpm.h | |||
@@ -27,6 +27,22 @@ struct usb_ctlr { | |||
27 | u8 res6[0x22]; | 27 | u8 res6[0x22]; |
28 | } __attribute__ ((packed)); | 28 | } __attribute__ ((packed)); |
29 | 29 | ||
30 | /* | ||
31 | * Function code bits, usually generic to devices. | ||
32 | */ | ||
33 | #ifdef CONFIG_CPM1 | ||
34 | #define CPMFCR_GBL ((u_char)0x00) /* Flag doesn't exist in CPM1 */ | ||
35 | #define CPMFCR_TC2 ((u_char)0x00) /* Flag doesn't exist in CPM1 */ | ||
36 | #define CPMFCR_DTB ((u_char)0x00) /* Flag doesn't exist in CPM1 */ | ||
37 | #define CPMFCR_BDB ((u_char)0x00) /* Flag doesn't exist in CPM1 */ | ||
38 | #else | ||
39 | #define CPMFCR_GBL ((u_char)0x20) /* Set memory snooping */ | ||
40 | #define CPMFCR_TC2 ((u_char)0x04) /* Transfer code 2 value */ | ||
41 | #define CPMFCR_DTB ((u_char)0x02) /* Use local bus for data when set */ | ||
42 | #define CPMFCR_BDB ((u_char)0x01) /* Use local bus for BD when set */ | ||
43 | #endif | ||
44 | #define CPMFCR_EB ((u_char)0x10) /* Set big endian byte order */ | ||
45 | |||
30 | /* Opcodes common to CPM1 and CPM2 | 46 | /* Opcodes common to CPM1 and CPM2 |
31 | */ | 47 | */ |
32 | #define CPM_CR_INIT_TRX ((ushort)0x0000) | 48 | #define CPM_CR_INIT_TRX ((ushort)0x0000) |
diff --git a/arch/powerpc/include/asm/cpm2.h b/arch/powerpc/include/asm/cpm2.h index 236cfa344a7c..f42e9baf3a4e 100644 --- a/arch/powerpc/include/asm/cpm2.h +++ b/arch/powerpc/include/asm/cpm2.h | |||
@@ -124,14 +124,6 @@ static inline void cpm2_fastbrg(uint brg, uint rate, int div16) | |||
124 | __cpm2_setbrg(brg, rate, CPM2_BRG_INT_CLK, div16, CPM_BRG_EXTC_INT); | 124 | __cpm2_setbrg(brg, rate, CPM2_BRG_INT_CLK, div16, CPM_BRG_EXTC_INT); |
125 | } | 125 | } |
126 | 126 | ||
127 | /* Function code bits, usually generic to devices. | ||
128 | */ | ||
129 | #define CPMFCR_GBL ((u_char)0x20) /* Set memory snooping */ | ||
130 | #define CPMFCR_EB ((u_char)0x10) /* Set big endian byte order */ | ||
131 | #define CPMFCR_TC2 ((u_char)0x04) /* Transfer code 2 value */ | ||
132 | #define CPMFCR_DTB ((u_char)0x02) /* Use local bus for data when set */ | ||
133 | #define CPMFCR_BDB ((u_char)0x01) /* Use local bus for BD when set */ | ||
134 | |||
135 | /* Parameter RAM offsets from the base. | 127 | /* Parameter RAM offsets from the base. |
136 | */ | 128 | */ |
137 | #define PROFF_SCC1 ((uint)0x8000) | 129 | #define PROFF_SCC1 ((uint)0x8000) |