aboutsummaryrefslogtreecommitdiffstats
path: root/arch/powerpc/include/asm
diff options
context:
space:
mode:
Diffstat (limited to 'arch/powerpc/include/asm')
-rw-r--r--arch/powerpc/include/asm/mmu-hash64.h35
-rw-r--r--arch/powerpc/include/asm/pgalloc-64.h5
-rw-r--r--arch/powerpc/include/asm/pte-hash64-64k.h37
3 files changed, 35 insertions, 42 deletions
diff --git a/arch/powerpc/include/asm/mmu-hash64.h b/arch/powerpc/include/asm/mmu-hash64.h
index 7514ec2f8540..2102b214a87c 100644
--- a/arch/powerpc/include/asm/mmu-hash64.h
+++ b/arch/powerpc/include/asm/mmu-hash64.h
@@ -373,6 +373,38 @@ extern void slb_set_size(u16 size);
373 373
374#ifndef __ASSEMBLY__ 374#ifndef __ASSEMBLY__
375 375
376#ifdef CONFIG_PPC_SUBPAGE_PROT
377/*
378 * For the sub-page protection option, we extend the PGD with one of
379 * these. Basically we have a 3-level tree, with the top level being
380 * the protptrs array. To optimize speed and memory consumption when
381 * only addresses < 4GB are being protected, pointers to the first
382 * four pages of sub-page protection words are stored in the low_prot
383 * array.
384 * Each page of sub-page protection words protects 1GB (4 bytes
385 * protects 64k). For the 3-level tree, each page of pointers then
386 * protects 8TB.
387 */
388struct subpage_prot_table {
389 unsigned long maxaddr; /* only addresses < this are protected */
390 unsigned int **protptrs[2];
391 unsigned int *low_prot[4];
392};
393
394#define SBP_L1_BITS (PAGE_SHIFT - 2)
395#define SBP_L2_BITS (PAGE_SHIFT - 3)
396#define SBP_L1_COUNT (1 << SBP_L1_BITS)
397#define SBP_L2_COUNT (1 << SBP_L2_BITS)
398#define SBP_L2_SHIFT (PAGE_SHIFT + SBP_L1_BITS)
399#define SBP_L3_SHIFT (SBP_L2_SHIFT + SBP_L2_BITS)
400
401extern void subpage_prot_free(struct mm_struct *mm);
402extern void subpage_prot_init_new_context(struct mm_struct *mm);
403#else
404static inline void subpage_prot_free(struct mm_struct *mm) {}
405static inline void subpage_prot_init_new_context(struct mm_struct *mm) { }
406#endif /* CONFIG_PPC_SUBPAGE_PROT */
407
376typedef unsigned long mm_context_id_t; 408typedef unsigned long mm_context_id_t;
377 409
378typedef struct { 410typedef struct {
@@ -386,6 +418,9 @@ typedef struct {
386 u16 sllp; /* SLB page size encoding */ 418 u16 sllp; /* SLB page size encoding */
387#endif 419#endif
388 unsigned long vdso_base; 420 unsigned long vdso_base;
421#ifdef CONFIG_PPC_SUBPAGE_PROT
422 struct subpage_prot_table spt;
423#endif /* CONFIG_PPC_SUBPAGE_PROT */
389} mm_context_t; 424} mm_context_t;
390 425
391 426
diff --git a/arch/powerpc/include/asm/pgalloc-64.h b/arch/powerpc/include/asm/pgalloc-64.h
index 5c1cd73dafa8..605f5c5398d1 100644
--- a/arch/powerpc/include/asm/pgalloc-64.h
+++ b/arch/powerpc/include/asm/pgalloc-64.h
@@ -28,10 +28,6 @@
28 */ 28 */
29#define MAX_PGTABLE_INDEX_SIZE 0xf 29#define MAX_PGTABLE_INDEX_SIZE 0xf
30 30
31#ifndef CONFIG_PPC_SUBPAGE_PROT
32static inline void subpage_prot_free(pgd_t *pgd) {}
33#endif
34
35extern struct kmem_cache *pgtable_cache[]; 31extern struct kmem_cache *pgtable_cache[];
36#define PGT_CACHE(shift) (pgtable_cache[(shift)-1]) 32#define PGT_CACHE(shift) (pgtable_cache[(shift)-1])
37 33
@@ -42,7 +38,6 @@ static inline pgd_t *pgd_alloc(struct mm_struct *mm)
42 38
43static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd) 39static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd)
44{ 40{
45 subpage_prot_free(pgd);
46 kmem_cache_free(PGT_CACHE(PGD_INDEX_SIZE), pgd); 41 kmem_cache_free(PGT_CACHE(PGD_INDEX_SIZE), pgd);
47} 42}
48 43
diff --git a/arch/powerpc/include/asm/pte-hash64-64k.h b/arch/powerpc/include/asm/pte-hash64-64k.h
index 82b72207c51c..c4490f9c67c4 100644
--- a/arch/powerpc/include/asm/pte-hash64-64k.h
+++ b/arch/powerpc/include/asm/pte-hash64-64k.h
@@ -76,41 +76,4 @@
76 remap_pfn_range((vma), (addr), (pfn), PAGE_SIZE, \ 76 remap_pfn_range((vma), (addr), (pfn), PAGE_SIZE, \
77 __pgprot(pgprot_val((prot)) | _PAGE_4K_PFN)) 77 __pgprot(pgprot_val((prot)) | _PAGE_4K_PFN))
78 78
79
80#ifdef CONFIG_PPC_SUBPAGE_PROT
81/*
82 * For the sub-page protection option, we extend the PGD with one of
83 * these. Basically we have a 3-level tree, with the top level being
84 * the protptrs array. To optimize speed and memory consumption when
85 * only addresses < 4GB are being protected, pointers to the first
86 * four pages of sub-page protection words are stored in the low_prot
87 * array.
88 * Each page of sub-page protection words protects 1GB (4 bytes
89 * protects 64k). For the 3-level tree, each page of pointers then
90 * protects 8TB.
91 */
92struct subpage_prot_table {
93 unsigned long maxaddr; /* only addresses < this are protected */
94 unsigned int **protptrs[2];
95 unsigned int *low_prot[4];
96};
97
98#undef PGD_TABLE_SIZE
99#define PGD_TABLE_SIZE ((sizeof(pgd_t) << PGD_INDEX_SIZE) + \
100 sizeof(struct subpage_prot_table))
101
102#define SBP_L1_BITS (PAGE_SHIFT - 2)
103#define SBP_L2_BITS (PAGE_SHIFT - 3)
104#define SBP_L1_COUNT (1 << SBP_L1_BITS)
105#define SBP_L2_COUNT (1 << SBP_L2_BITS)
106#define SBP_L2_SHIFT (PAGE_SHIFT + SBP_L1_BITS)
107#define SBP_L3_SHIFT (SBP_L2_SHIFT + SBP_L2_BITS)
108
109extern void subpage_prot_free(pgd_t *pgd);
110
111static inline struct subpage_prot_table *pgd_subpage_prot(pgd_t *pgd)
112{
113 return (struct subpage_prot_table *)(pgd + PTRS_PER_PGD);
114}
115#endif /* CONFIG_PPC_SUBPAGE_PROT */
116#endif /* __ASSEMBLY__ */ 79#endif /* __ASSEMBLY__ */