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-rw-r--r--arch/powerpc/include/asm/reg_booke.h14
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h
index 667a498eaee1..e68c69bf741a 100644
--- a/arch/powerpc/include/asm/reg_booke.h
+++ b/arch/powerpc/include/asm/reg_booke.h
@@ -246,6 +246,20 @@
246 store or cache line push */ 246 store or cache line push */
247#endif 247#endif
248 248
249/* Bit definitions for the HID1 */
250#ifdef CONFIG_E500
251/* e500v1/v2 */
252#define HID1_PLL_CFG_MASK 0xfc000000 /* PLL_CFG input pins */
253#define HID1_RFXE 0x00020000 /* Read fault exception enable */
254#define HID1_R1DPE 0x00008000 /* R1 data bus parity enable */
255#define HID1_R2DPE 0x00004000 /* R2 data bus parity enable */
256#define HID1_ASTME 0x00002000 /* Address bus streaming mode enable */
257#define HID1_ABE 0x00001000 /* Address broadcast enable */
258#define HID1_MPXTT 0x00000400 /* MPX re-map transfer type */
259#define HID1_ATS 0x00000080 /* Atomic status */
260#define HID1_MID_MASK 0x0000000f /* MID input pins */
261#endif
262
249/* Bit definitions for the DBSR. */ 263/* Bit definitions for the DBSR. */
250/* 264/*
251 * DBSR bits which have conflicting definitions on true Book E versus IBM 40x. 265 * DBSR bits which have conflicting definitions on true Book E versus IBM 40x.