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-rw-r--r--arch/powerpc/include/asm/reg.h54
1 files changed, 32 insertions, 22 deletions
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index 638608677e2a..d24c14163966 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -208,6 +208,9 @@
208#define SPRN_DABRX 0x3F7 /* Data Address Breakpoint Register Extension */ 208#define SPRN_DABRX 0x3F7 /* Data Address Breakpoint Register Extension */
209#define DABRX_USER (1UL << 0) 209#define DABRX_USER (1UL << 0)
210#define DABRX_KERNEL (1UL << 1) 210#define DABRX_KERNEL (1UL << 1)
211#define DABRX_HYP (1UL << 2)
212#define DABRX_BTI (1UL << 3)
213#define DABRX_ALL (DABRX_BTI | DABRX_HYP | DABRX_KERNEL | DABRX_USER)
211#define SPRN_DAR 0x013 /* Data Address Register */ 214#define SPRN_DAR 0x013 /* Data Address Register */
212#define SPRN_DBCR 0x136 /* e300 Data Breakpoint Control Reg */ 215#define SPRN_DBCR 0x136 /* e300 Data Breakpoint Control Reg */
213#define SPRN_DSISR 0x012 /* Data Storage Interrupt Status Register */ 216#define SPRN_DSISR 0x012 /* Data Storage Interrupt Status Register */
@@ -521,6 +524,7 @@
521 524
522#define SPRN_HSRR0 0x13A /* Save/Restore Register 0 */ 525#define SPRN_HSRR0 0x13A /* Save/Restore Register 0 */
523#define SPRN_HSRR1 0x13B /* Save/Restore Register 1 */ 526#define SPRN_HSRR1 0x13B /* Save/Restore Register 1 */
527#define HSRR1_DENORM 0x00100000 /* Denorm exception */
524 528
525#define SPRN_TBCTL 0x35f /* PA6T Timebase control register */ 529#define SPRN_TBCTL 0x35f /* PA6T Timebase control register */
526#define TBCTL_FREEZE 0x0000000000000000ull /* Freeze all tbs */ 530#define TBCTL_FREEZE 0x0000000000000000ull /* Freeze all tbs */
@@ -602,6 +606,10 @@
602#define POWER6_MMCRA_SIPR 0x0000020000000000ULL 606#define POWER6_MMCRA_SIPR 0x0000020000000000ULL
603#define POWER6_MMCRA_THRM 0x00000020UL 607#define POWER6_MMCRA_THRM 0x00000020UL
604#define POWER6_MMCRA_OTHER 0x0000000EUL 608#define POWER6_MMCRA_OTHER 0x0000000EUL
609
610#define POWER7P_MMCRA_SIAR_VALID 0x10000000 /* P7+ SIAR contents valid */
611#define POWER7P_MMCRA_SDAR_VALID 0x08000000 /* P7+ SDAR contents valid */
612
605#define SPRN_PMC1 787 613#define SPRN_PMC1 787
606#define SPRN_PMC2 788 614#define SPRN_PMC2 788
607#define SPRN_PMC3 789 615#define SPRN_PMC3 789
@@ -761,7 +769,8 @@
761 * 64-bit embedded 769 * 64-bit embedded
762 * - SPRG0 generic exception scratch 770 * - SPRG0 generic exception scratch
763 * - SPRG2 TLB exception stack 771 * - SPRG2 TLB exception stack
764 * - SPRG3 CPU and NUMA node for VDSO getcpu (user visible) 772 * - SPRG3 critical exception scratch and
773 * CPU and NUMA node for VDSO getcpu (user visible)
765 * - SPRG4 unused (user visible) 774 * - SPRG4 unused (user visible)
766 * - SPRG6 TLB miss scratch (user visible, sorry !) 775 * - SPRG6 TLB miss scratch (user visible, sorry !)
767 * - SPRG7 critical exception scratch 776 * - SPRG7 critical exception scratch
@@ -858,11 +867,12 @@
858 867
859#ifdef CONFIG_PPC_BOOK3E_64 868#ifdef CONFIG_PPC_BOOK3E_64
860#define SPRN_SPRG_MC_SCRATCH SPRN_SPRG8 869#define SPRN_SPRG_MC_SCRATCH SPRN_SPRG8
861#define SPRN_SPRG_CRIT_SCRATCH SPRN_SPRG7 870#define SPRN_SPRG_CRIT_SCRATCH SPRN_SPRG3
862#define SPRN_SPRG_DBG_SCRATCH SPRN_SPRG9 871#define SPRN_SPRG_DBG_SCRATCH SPRN_SPRG9
863#define SPRN_SPRG_TLB_EXFRAME SPRN_SPRG2 872#define SPRN_SPRG_TLB_EXFRAME SPRN_SPRG2
864#define SPRN_SPRG_TLB_SCRATCH SPRN_SPRG6 873#define SPRN_SPRG_TLB_SCRATCH SPRN_SPRG6
865#define SPRN_SPRG_GEN_SCRATCH SPRN_SPRG0 874#define SPRN_SPRG_GEN_SCRATCH SPRN_SPRG0
875#define SPRN_SPRG_GDBELL_SCRATCH SPRN_SPRG_GEN_SCRATCH
866 876
867#define SET_PACA(rX) mtspr SPRN_SPRG_PACA,rX 877#define SET_PACA(rX) mtspr SPRN_SPRG_PACA,rX
868#define GET_PACA(rX) mfspr rX,SPRN_SPRG_PACA 878#define GET_PACA(rX) mfspr rX,SPRN_SPRG_PACA
@@ -937,7 +947,7 @@
937#define PVR_VER(pvr) (((pvr) >> 16) & 0xFFFF) /* Version field */ 947#define PVR_VER(pvr) (((pvr) >> 16) & 0xFFFF) /* Version field */
938#define PVR_REV(pvr) (((pvr) >> 0) & 0xFFFF) /* Revison field */ 948#define PVR_REV(pvr) (((pvr) >> 0) & 0xFFFF) /* Revison field */
939 949
940#define __is_processor(pv) (PVR_VER(mfspr(SPRN_PVR)) == (pv)) 950#define pvr_version_is(pvr) (PVR_VER(mfspr(SPRN_PVR)) == (pvr))
941 951
942/* 952/*
943 * IBM has further subdivided the standard PowerPC 16-bit version and 953 * IBM has further subdivided the standard PowerPC 16-bit version and
@@ -1002,25 +1012,25 @@
1002#define PVR_476_ISS 0x00052000 1012#define PVR_476_ISS 0x00052000
1003 1013
1004/* 64-bit processors */ 1014/* 64-bit processors */
1005/* XXX the prefix should be PVR_, we'll do a global sweep to fix it one day */ 1015#define PVR_NORTHSTAR 0x0033
1006#define PV_NORTHSTAR 0x0033 1016#define PVR_PULSAR 0x0034
1007#define PV_PULSAR 0x0034 1017#define PVR_POWER4 0x0035
1008#define PV_POWER4 0x0035 1018#define PVR_ICESTAR 0x0036
1009#define PV_ICESTAR 0x0036 1019#define PVR_SSTAR 0x0037
1010#define PV_SSTAR 0x0037 1020#define PVR_POWER4p 0x0038
1011#define PV_POWER4p 0x0038 1021#define PVR_970 0x0039
1012#define PV_970 0x0039 1022#define PVR_POWER5 0x003A
1013#define PV_POWER5 0x003A 1023#define PVR_POWER5p 0x003B
1014#define PV_POWER5p 0x003B 1024#define PVR_970FX 0x003C
1015#define PV_970FX 0x003C 1025#define PVR_POWER6 0x003E
1016#define PV_POWER6 0x003E 1026#define PVR_POWER7 0x003F
1017#define PV_POWER7 0x003F 1027#define PVR_630 0x0040
1018#define PV_630 0x0040 1028#define PVR_630p 0x0041
1019#define PV_630p 0x0041 1029#define PVR_970MP 0x0044
1020#define PV_970MP 0x0044 1030#define PVR_970GX 0x0045
1021#define PV_970GX 0x0045 1031#define PVR_POWER7p 0x004A
1022#define PV_BE 0x0070 1032#define PVR_BE 0x0070
1023#define PV_PA6T 0x0090 1033#define PVR_PA6T 0x0090
1024 1034
1025/* Macros for setting and retrieving special purpose registers */ 1035/* Macros for setting and retrieving special purpose registers */
1026#ifndef __ASSEMBLY__ 1036#ifndef __ASSEMBLY__