diff options
Diffstat (limited to 'arch/powerpc/include/asm/reg.h')
-rw-r--r-- | arch/powerpc/include/asm/reg.h | 49 |
1 files changed, 27 insertions, 22 deletions
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h index 638608677e2a..121a90bbf778 100644 --- a/arch/powerpc/include/asm/reg.h +++ b/arch/powerpc/include/asm/reg.h | |||
@@ -208,6 +208,9 @@ | |||
208 | #define SPRN_DABRX 0x3F7 /* Data Address Breakpoint Register Extension */ | 208 | #define SPRN_DABRX 0x3F7 /* Data Address Breakpoint Register Extension */ |
209 | #define DABRX_USER (1UL << 0) | 209 | #define DABRX_USER (1UL << 0) |
210 | #define DABRX_KERNEL (1UL << 1) | 210 | #define DABRX_KERNEL (1UL << 1) |
211 | #define DABRX_HYP (1UL << 2) | ||
212 | #define DABRX_BTI (1UL << 3) | ||
213 | #define DABRX_ALL (DABRX_BTI | DABRX_HYP | DABRX_KERNEL | DABRX_USER) | ||
211 | #define SPRN_DAR 0x013 /* Data Address Register */ | 214 | #define SPRN_DAR 0x013 /* Data Address Register */ |
212 | #define SPRN_DBCR 0x136 /* e300 Data Breakpoint Control Reg */ | 215 | #define SPRN_DBCR 0x136 /* e300 Data Breakpoint Control Reg */ |
213 | #define SPRN_DSISR 0x012 /* Data Storage Interrupt Status Register */ | 216 | #define SPRN_DSISR 0x012 /* Data Storage Interrupt Status Register */ |
@@ -761,7 +764,8 @@ | |||
761 | * 64-bit embedded | 764 | * 64-bit embedded |
762 | * - SPRG0 generic exception scratch | 765 | * - SPRG0 generic exception scratch |
763 | * - SPRG2 TLB exception stack | 766 | * - SPRG2 TLB exception stack |
764 | * - SPRG3 CPU and NUMA node for VDSO getcpu (user visible) | 767 | * - SPRG3 critical exception scratch and |
768 | * CPU and NUMA node for VDSO getcpu (user visible) | ||
765 | * - SPRG4 unused (user visible) | 769 | * - SPRG4 unused (user visible) |
766 | * - SPRG6 TLB miss scratch (user visible, sorry !) | 770 | * - SPRG6 TLB miss scratch (user visible, sorry !) |
767 | * - SPRG7 critical exception scratch | 771 | * - SPRG7 critical exception scratch |
@@ -858,11 +862,12 @@ | |||
858 | 862 | ||
859 | #ifdef CONFIG_PPC_BOOK3E_64 | 863 | #ifdef CONFIG_PPC_BOOK3E_64 |
860 | #define SPRN_SPRG_MC_SCRATCH SPRN_SPRG8 | 864 | #define SPRN_SPRG_MC_SCRATCH SPRN_SPRG8 |
861 | #define SPRN_SPRG_CRIT_SCRATCH SPRN_SPRG7 | 865 | #define SPRN_SPRG_CRIT_SCRATCH SPRN_SPRG3 |
862 | #define SPRN_SPRG_DBG_SCRATCH SPRN_SPRG9 | 866 | #define SPRN_SPRG_DBG_SCRATCH SPRN_SPRG9 |
863 | #define SPRN_SPRG_TLB_EXFRAME SPRN_SPRG2 | 867 | #define SPRN_SPRG_TLB_EXFRAME SPRN_SPRG2 |
864 | #define SPRN_SPRG_TLB_SCRATCH SPRN_SPRG6 | 868 | #define SPRN_SPRG_TLB_SCRATCH SPRN_SPRG6 |
865 | #define SPRN_SPRG_GEN_SCRATCH SPRN_SPRG0 | 869 | #define SPRN_SPRG_GEN_SCRATCH SPRN_SPRG0 |
870 | #define SPRN_SPRG_GDBELL_SCRATCH SPRN_SPRG_GEN_SCRATCH | ||
866 | 871 | ||
867 | #define SET_PACA(rX) mtspr SPRN_SPRG_PACA,rX | 872 | #define SET_PACA(rX) mtspr SPRN_SPRG_PACA,rX |
868 | #define GET_PACA(rX) mfspr rX,SPRN_SPRG_PACA | 873 | #define GET_PACA(rX) mfspr rX,SPRN_SPRG_PACA |
@@ -937,7 +942,7 @@ | |||
937 | #define PVR_VER(pvr) (((pvr) >> 16) & 0xFFFF) /* Version field */ | 942 | #define PVR_VER(pvr) (((pvr) >> 16) & 0xFFFF) /* Version field */ |
938 | #define PVR_REV(pvr) (((pvr) >> 0) & 0xFFFF) /* Revison field */ | 943 | #define PVR_REV(pvr) (((pvr) >> 0) & 0xFFFF) /* Revison field */ |
939 | 944 | ||
940 | #define __is_processor(pv) (PVR_VER(mfspr(SPRN_PVR)) == (pv)) | 945 | #define pvr_version_is(pvr) (PVR_VER(mfspr(SPRN_PVR)) == (pvr)) |
941 | 946 | ||
942 | /* | 947 | /* |
943 | * IBM has further subdivided the standard PowerPC 16-bit version and | 948 | * IBM has further subdivided the standard PowerPC 16-bit version and |
@@ -1002,25 +1007,25 @@ | |||
1002 | #define PVR_476_ISS 0x00052000 | 1007 | #define PVR_476_ISS 0x00052000 |
1003 | 1008 | ||
1004 | /* 64-bit processors */ | 1009 | /* 64-bit processors */ |
1005 | /* XXX the prefix should be PVR_, we'll do a global sweep to fix it one day */ | 1010 | #define PVR_NORTHSTAR 0x0033 |
1006 | #define PV_NORTHSTAR 0x0033 | 1011 | #define PVR_PULSAR 0x0034 |
1007 | #define PV_PULSAR 0x0034 | 1012 | #define PVR_POWER4 0x0035 |
1008 | #define PV_POWER4 0x0035 | 1013 | #define PVR_ICESTAR 0x0036 |
1009 | #define PV_ICESTAR 0x0036 | 1014 | #define PVR_SSTAR 0x0037 |
1010 | #define PV_SSTAR 0x0037 | 1015 | #define PVR_POWER4p 0x0038 |
1011 | #define PV_POWER4p 0x0038 | 1016 | #define PVR_970 0x0039 |
1012 | #define PV_970 0x0039 | 1017 | #define PVR_POWER5 0x003A |
1013 | #define PV_POWER5 0x003A | 1018 | #define PVR_POWER5p 0x003B |
1014 | #define PV_POWER5p 0x003B | 1019 | #define PVR_970FX 0x003C |
1015 | #define PV_970FX 0x003C | 1020 | #define PVR_POWER6 0x003E |
1016 | #define PV_POWER6 0x003E | 1021 | #define PVR_POWER7 0x003F |
1017 | #define PV_POWER7 0x003F | 1022 | #define PVR_630 0x0040 |
1018 | #define PV_630 0x0040 | 1023 | #define PVR_630p 0x0041 |
1019 | #define PV_630p 0x0041 | 1024 | #define PVR_970MP 0x0044 |
1020 | #define PV_970MP 0x0044 | 1025 | #define PVR_970GX 0x0045 |
1021 | #define PV_970GX 0x0045 | 1026 | #define PVR_POWER7p 0x004A |
1022 | #define PV_BE 0x0070 | 1027 | #define PVR_BE 0x0070 |
1023 | #define PV_PA6T 0x0090 | 1028 | #define PVR_PA6T 0x0090 |
1024 | 1029 | ||
1025 | /* Macros for setting and retrieving special purpose registers */ | 1030 | /* Macros for setting and retrieving special purpose registers */ |
1026 | #ifndef __ASSEMBLY__ | 1031 | #ifndef __ASSEMBLY__ |