1 files changed, 25 insertions, 5 deletions

diff --git a/arch/powerpc/include/asm/pte-hash64-64k.h b/arch/powerpc/include/asm/pte-hash64-64k.h
index b6d2d42f84b5..4f4ec2ab45c9 100644
--- a/arch/powerpc/include/asm/pte-hash64-64k.h
+++ b/arch/powerpc/include/asm/pte-hash64-64k.h
@@ -46,11 +46,31 @@
  * in order to deal with 64K made of 4K HW pages. Thus we override the
  * generic accessors and iterators here
  */
-#define __real_pte(e,p)         ((real_pte_t) { \
-                        (e), (pte_val(e) & _PAGE_COMBO) ? \
-                                (pte_val(*((p) + PTRS_PER_PTE))) : 0 })
-#define __rpte_to_hidx(r,index) ((pte_val((r).pte) & _PAGE_COMBO) ? \
-        (((r).hidx >> ((index)<<2)) & 0xf) : ((pte_val((r).pte) >> 12) & 0xf))
+#define __real_pte __real_pte
+static inline real_pte_t __real_pte(pte_t pte, pte_t *ptep)
+{
+        real_pte_t rpte;
+
+        rpte.pte = pte;
+        rpte.hidx = 0;
+        if (pte_val(pte) & _PAGE_COMBO) {
+                /*
+                 * Make sure we order the hidx load against the _PAGE_COMBO
+                 * check. The store side ordering is done in __hash_page_4K
+                 */
+                smp_rmb();
+                rpte.hidx = pte_val(*((ptep) + PTRS_PER_PTE));
+        }
+        return rpte;
+}
+
+static inline unsigned long __rpte_to_hidx(real_pte_t rpte, unsigned long index)
+{
+        if ((pte_val(rpte.pte) & _PAGE_COMBO))
+                return (rpte.hidx >> (index<<2)) & 0xf;
+        return (pte_val(rpte.pte) >> 12) & 0xf;
+}
+
 #define __rpte_to_pte(r)        ((r).pte)
 #define __rpte_sub_valid(rpte, index) \
         (pte_val(rpte.pte) & (_PAGE_HPTE_SUB0 >> (index)))