diff options
Diffstat (limited to 'arch/powerpc/include/asm/ppc-opcode.h')
-rw-r--r-- | arch/powerpc/include/asm/ppc-opcode.h | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h index ef9aa84cac5a..aea714797590 100644 --- a/arch/powerpc/include/asm/ppc-opcode.h +++ b/arch/powerpc/include/asm/ppc-opcode.h | |||
@@ -22,8 +22,10 @@ | |||
22 | #define PPC_INST_DCBZL 0x7c2007ec | 22 | #define PPC_INST_DCBZL 0x7c2007ec |
23 | #define PPC_INST_ISEL 0x7c00001e | 23 | #define PPC_INST_ISEL 0x7c00001e |
24 | #define PPC_INST_ISEL_MASK 0xfc00003e | 24 | #define PPC_INST_ISEL_MASK 0xfc00003e |
25 | #define PPC_INST_LDARX 0x7c0000a8 | ||
25 | #define PPC_INST_LSWI 0x7c0004aa | 26 | #define PPC_INST_LSWI 0x7c0004aa |
26 | #define PPC_INST_LSWX 0x7c00042a | 27 | #define PPC_INST_LSWX 0x7c00042a |
28 | #define PPC_INST_LWARX 0x7c000029 | ||
27 | #define PPC_INST_LWSYNC 0x7c2004ac | 29 | #define PPC_INST_LWSYNC 0x7c2004ac |
28 | #define PPC_INST_LXVD2X 0x7c000698 | 30 | #define PPC_INST_LXVD2X 0x7c000698 |
29 | #define PPC_INST_MCRXR 0x7c000400 | 31 | #define PPC_INST_MCRXR 0x7c000400 |
@@ -55,15 +57,31 @@ | |||
55 | #define __PPC_RA(a) (((a) & 0x1f) << 16) | 57 | #define __PPC_RA(a) (((a) & 0x1f) << 16) |
56 | #define __PPC_RB(b) (((b) & 0x1f) << 11) | 58 | #define __PPC_RB(b) (((b) & 0x1f) << 11) |
57 | #define __PPC_RS(s) (((s) & 0x1f) << 21) | 59 | #define __PPC_RS(s) (((s) & 0x1f) << 21) |
60 | #define __PPC_RT(s) __PPC_RS(s) | ||
58 | #define __PPC_XS(s) ((((s) & 0x1f) << 21) | (((s) & 0x20) >> 5)) | 61 | #define __PPC_XS(s) ((((s) & 0x1f) << 21) | (((s) & 0x20) >> 5)) |
59 | #define __PPC_T_TLB(t) (((t) & 0x3) << 21) | 62 | #define __PPC_T_TLB(t) (((t) & 0x3) << 21) |
60 | #define __PPC_WC(w) (((w) & 0x3) << 21) | 63 | #define __PPC_WC(w) (((w) & 0x3) << 21) |
64 | /* | ||
65 | * Only use the larx hint bit on 64bit CPUs. Once we verify it doesn't have | ||
66 | * any side effects on all 32bit processors, we can do this all the time. | ||
67 | */ | ||
68 | #ifdef CONFIG_PPC64 | ||
69 | #define __PPC_EH(eh) (((eh) & 0x1) << 0) | ||
70 | #else | ||
71 | #define __PPC_EH(eh) 0 | ||
72 | #endif | ||
61 | 73 | ||
62 | /* Deal with instructions that older assemblers aren't aware of */ | 74 | /* Deal with instructions that older assemblers aren't aware of */ |
63 | #define PPC_DCBAL(a, b) stringify_in_c(.long PPC_INST_DCBAL | \ | 75 | #define PPC_DCBAL(a, b) stringify_in_c(.long PPC_INST_DCBAL | \ |
64 | __PPC_RA(a) | __PPC_RB(b)) | 76 | __PPC_RA(a) | __PPC_RB(b)) |
65 | #define PPC_DCBZL(a, b) stringify_in_c(.long PPC_INST_DCBZL | \ | 77 | #define PPC_DCBZL(a, b) stringify_in_c(.long PPC_INST_DCBZL | \ |
66 | __PPC_RA(a) | __PPC_RB(b)) | 78 | __PPC_RA(a) | __PPC_RB(b)) |
79 | #define PPC_LDARX(t, a, b, eh) stringify_in_c(.long PPC_INST_LDARX | \ | ||
80 | __PPC_RT(t) | __PPC_RA(a) | \ | ||
81 | __PPC_RB(b) | __PPC_EH(eh)) | ||
82 | #define PPC_LWARX(t, a, b, eh) stringify_in_c(.long PPC_INST_LWARX | \ | ||
83 | __PPC_RT(t) | __PPC_RA(a) | \ | ||
84 | __PPC_RB(b) | __PPC_EH(eh)) | ||
67 | #define PPC_MSGSND(b) stringify_in_c(.long PPC_INST_MSGSND | \ | 85 | #define PPC_MSGSND(b) stringify_in_c(.long PPC_INST_MSGSND | \ |
68 | __PPC_RB(b)) | 86 | __PPC_RB(b)) |
69 | #define PPC_RFCI stringify_in_c(.long PPC_INST_RFCI) | 87 | #define PPC_RFCI stringify_in_c(.long PPC_INST_RFCI) |