1 files changed, 21 insertions, 4 deletions

diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h
index 640ccbbc0977..b74f16d45cb4 100644
--- a/arch/powerpc/include/asm/ppc-opcode.h
+++ b/arch/powerpc/include/asm/ppc-opcode.h
@@ -25,6 +25,7 @@
 #define PPC_INST_LSWI                   0x7c0004aa
 #define PPC_INST_LSWX                   0x7c00042a
 #define PPC_INST_LWSYNC                 0x7c2004ac
+#define PPC_INST_LXVD2X                 0x7c000698
 #define PPC_INST_MCRXR                  0x7c000400
 #define PPC_INST_MCRXR_MASK             0xfc0007fe
 #define PPC_INST_MFSPR_PVR              0x7c1f42a6
@@ -43,14 +44,18 @@
 
 #define PPC_INST_STSWI                  0x7c0005aa
 #define PPC_INST_STSWX                  0x7c00052a
+#define PPC_INST_STXVD2X                0x7c000798
+#define PPC_INST_TLBIE                  0x7c000264
 #define PPC_INST_TLBILX                 0x7c000024
 #define PPC_INST_WAIT                   0x7c00007c
 
 /* macros to insert fields into opcodes */
-#define __PPC_RA(a)     ((a & 0x1f) << 16)
-#define __PPC_RB(b)     ((b & 0x1f) << 11)
-#define __PPC_T_TLB(t)  ((t & 0x3) << 21)
-#define __PPC_WC(w)     ((w & 0x3) << 21)
+#define __PPC_RA(a)     (((a) & 0x1f) << 16)
+#define __PPC_RB(b)     (((b) & 0x1f) << 11)
+#define __PPC_RS(s)     (((s) & 0x1f) << 21)
+#define __PPC_XS(s)     ((((s) & 0x1f) << 21) | (((s) & 0x20) >> 5))
+#define __PPC_T_TLB(t)  (((t) & 0x3) << 21)
+#define __PPC_WC(w)     (((w) & 0x3) << 21)
 
 /* Deal with instructions that older assemblers aren't aware of */
 #define PPC_DCBAL(a, b)         stringify_in_c(.long PPC_INST_DCBAL | \
@@ -69,5 +74,17 @@
 #define PPC_TLBILX_VA(a, b)     PPC_TLBILX(3, a, b)
 #define PPC_WAIT(w)             stringify_in_c(.long PPC_INST_WAIT | \
                                         __PPC_WC(w))
+#define PPC_TLBIE(lp,a)         stringify_in_c(.long PPC_INST_TLBIE | \
+                                               __PPC_RB(a) | __PPC_RS(lp))
+
+/*
+ * Define what the VSX XX1 form instructions will look like, then add
+ * the 128 bit load store instructions based on that.
+ */
+#define VSX_XX1(s, a, b)        (__PPC_XS(s) | __PPC_RA(a) | __PPC_RB(b))
+#define STXVD2X(s, a, b)        stringify_in_c(.long PPC_INST_STXVD2X | \
+                                               VSX_XX1((s), (a), (b)))
+#define LXVD2X(s, a, b)         stringify_in_c(.long PPC_INST_LXVD2X | \
+                                               VSX_XX1((s), (a), (b)))
 
 #endif /* _ASM_POWERPC_PPC_OPCODE_H */