aboutsummaryrefslogtreecommitdiffstats
path: root/arch/powerpc/include/asm/pci-bridge.h
diff options
context:
space:
mode:
Diffstat (limited to 'arch/powerpc/include/asm/pci-bridge.h')
-rw-r--r--arch/powerpc/include/asm/pci-bridge.h11
1 files changed, 10 insertions, 1 deletions
diff --git a/arch/powerpc/include/asm/pci-bridge.h b/arch/powerpc/include/asm/pci-bridge.h
index 025a130729bc..ffbc5fd549ac 100644
--- a/arch/powerpc/include/asm/pci-bridge.h
+++ b/arch/powerpc/include/asm/pci-bridge.h
@@ -70,6 +70,8 @@ struct pci_controller {
70 * BIG_ENDIAN - cfg_addr is a big endian register 70 * BIG_ENDIAN - cfg_addr is a big endian register
71 * BROKEN_MRM - the 440EPx/GRx chips have an errata that causes hangs on 71 * BROKEN_MRM - the 440EPx/GRx chips have an errata that causes hangs on
72 * the PLB4. Effectively disable MRM commands by setting this. 72 * the PLB4. Effectively disable MRM commands by setting this.
73 * FSL_CFG_REG_LINK - Freescale controller version in which the PCIe
74 * link status is in a RC PCIe cfg register (vs being a SoC register)
73 */ 75 */
74#define PPC_INDIRECT_TYPE_SET_CFG_TYPE 0x00000001 76#define PPC_INDIRECT_TYPE_SET_CFG_TYPE 0x00000001
75#define PPC_INDIRECT_TYPE_EXT_REG 0x00000002 77#define PPC_INDIRECT_TYPE_EXT_REG 0x00000002
@@ -77,6 +79,7 @@ struct pci_controller {
77#define PPC_INDIRECT_TYPE_NO_PCIE_LINK 0x00000008 79#define PPC_INDIRECT_TYPE_NO_PCIE_LINK 0x00000008
78#define PPC_INDIRECT_TYPE_BIG_ENDIAN 0x00000010 80#define PPC_INDIRECT_TYPE_BIG_ENDIAN 0x00000010
79#define PPC_INDIRECT_TYPE_BROKEN_MRM 0x00000020 81#define PPC_INDIRECT_TYPE_BROKEN_MRM 0x00000020
82#define PPC_INDIRECT_TYPE_FSL_CFG_REG_LINK 0x00000040
80 u32 indirect_type; 83 u32 indirect_type;
81 /* Currently, we limit ourselves to 1 IO range and 3 mem 84 /* Currently, we limit ourselves to 1 IO range and 3 mem
82 * ranges since the common pci_bus structure can't handle more 85 * ranges since the common pci_bus structure can't handle more
@@ -90,9 +93,9 @@ struct pci_controller {
90 93
91#ifdef CONFIG_PPC64 94#ifdef CONFIG_PPC64
92 unsigned long buid; 95 unsigned long buid;
96#endif /* CONFIG_PPC64 */
93 97
94 void *private_data; 98 void *private_data;
95#endif /* CONFIG_PPC64 */
96}; 99};
97 100
98/* These are used for config access before all the PCI probing 101/* These are used for config access before all the PCI probing
@@ -117,6 +120,12 @@ extern void setup_indirect_pci(struct pci_controller* hose,
117 resource_size_t cfg_addr, 120 resource_size_t cfg_addr,
118 resource_size_t cfg_data, u32 flags); 121 resource_size_t cfg_data, u32 flags);
119 122
123extern int indirect_read_config(struct pci_bus *bus, unsigned int devfn,
124 int offset, int len, u32 *val);
125
126extern int indirect_write_config(struct pci_bus *bus, unsigned int devfn,
127 int offset, int len, u32 val);
128
120static inline struct pci_controller *pci_bus_to_host(const struct pci_bus *bus) 129static inline struct pci_controller *pci_bus_to_host(const struct pci_bus *bus)
121{ 130{
122 return bus->sysdata; 131 return bus->sysdata;