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-rw-r--r--arch/powerpc/include/asm/pci-bridge.h40
1 files changed, 16 insertions, 24 deletions
diff --git a/arch/powerpc/include/asm/pci-bridge.h b/arch/powerpc/include/asm/pci-bridge.h
index 4c61fa0b8d75..76e1f313a58e 100644
--- a/arch/powerpc/include/asm/pci-bridge.h
+++ b/arch/powerpc/include/asm/pci-bridge.h
@@ -77,9 +77,7 @@ struct pci_controller {
77 77
78 int first_busno; 78 int first_busno;
79 int last_busno; 79 int last_busno;
80#ifndef CONFIG_PPC64
81 int self_busno; 80 int self_busno;
82#endif
83 81
84 void __iomem *io_base_virt; 82 void __iomem *io_base_virt;
85#ifdef CONFIG_PPC64 83#ifdef CONFIG_PPC64
@@ -104,7 +102,6 @@ struct pci_controller {
104 unsigned int __iomem *cfg_addr; 102 unsigned int __iomem *cfg_addr;
105 void __iomem *cfg_data; 103 void __iomem *cfg_data;
106 104
107#ifndef CONFIG_PPC64
108 /* 105 /*
109 * Used for variants of PCI indirect handling and possible quirks: 106 * Used for variants of PCI indirect handling and possible quirks:
110 * SET_CFG_TYPE - used on 4xx or any PHB that does explicit type0/1 107 * SET_CFG_TYPE - used on 4xx or any PHB that does explicit type0/1
@@ -128,7 +125,6 @@ struct pci_controller {
128#define PPC_INDIRECT_TYPE_BIG_ENDIAN 0x00000010 125#define PPC_INDIRECT_TYPE_BIG_ENDIAN 0x00000010
129#define PPC_INDIRECT_TYPE_BROKEN_MRM 0x00000020 126#define PPC_INDIRECT_TYPE_BROKEN_MRM 0x00000020
130 u32 indirect_type; 127 u32 indirect_type;
131#endif /* !CONFIG_PPC64 */
132 /* Currently, we limit ourselves to 1 IO range and 3 mem 128 /* Currently, we limit ourselves to 1 IO range and 3 mem
133 * ranges since the common pci_bus structure can't handle more 129 * ranges since the common pci_bus structure can't handle more
134 */ 130 */
@@ -146,21 +142,6 @@ struct pci_controller {
146#endif /* CONFIG_PPC64 */ 142#endif /* CONFIG_PPC64 */
147}; 143};
148 144
149#ifndef CONFIG_PPC64
150
151static inline struct pci_controller *pci_bus_to_host(const struct pci_bus *bus)
152{
153 return bus->sysdata;
154}
155
156static inline int isa_vaddr_is_ioport(void __iomem *address)
157{
158 /* No specific ISA handling on ppc32 at this stage, it
159 * all goes through PCI
160 */
161 return 0;
162}
163
164/* These are used for config access before all the PCI probing 145/* These are used for config access before all the PCI probing
165 has been done. */ 146 has been done. */
166extern int early_read_config_byte(struct pci_controller *hose, int bus, 147extern int early_read_config_byte(struct pci_controller *hose, int bus,
@@ -182,6 +163,22 @@ extern int early_find_capability(struct pci_controller *hose, int bus,
182extern void setup_indirect_pci(struct pci_controller* hose, 163extern void setup_indirect_pci(struct pci_controller* hose,
183 resource_size_t cfg_addr, 164 resource_size_t cfg_addr,
184 resource_size_t cfg_data, u32 flags); 165 resource_size_t cfg_data, u32 flags);
166
167#ifndef CONFIG_PPC64
168
169static inline struct pci_controller *pci_bus_to_host(const struct pci_bus *bus)
170{
171 return bus->sysdata;
172}
173
174static inline int isa_vaddr_is_ioport(void __iomem *address)
175{
176 /* No specific ISA handling on ppc32 at this stage, it
177 * all goes through PCI
178 */
179 return 0;
180}
181
185#else /* CONFIG_PPC64 */ 182#else /* CONFIG_PPC64 */
186 183
187/* 184/*
@@ -284,11 +281,6 @@ static inline int isa_vaddr_is_ioport(void __iomem *address)
284extern int pcibios_unmap_io_space(struct pci_bus *bus); 281extern int pcibios_unmap_io_space(struct pci_bus *bus);
285extern int pcibios_map_io_space(struct pci_bus *bus); 282extern int pcibios_map_io_space(struct pci_bus *bus);
286 283
287/* Return values for ppc_md.pci_probe_mode function */
288#define PCI_PROBE_NONE -1 /* Don't look at this bus at all */
289#define PCI_PROBE_NORMAL 0 /* Do normal PCI probing */
290#define PCI_PROBE_DEVTREE 1 /* Instantiate from device tree */
291
292#ifdef CONFIG_NUMA 284#ifdef CONFIG_NUMA
293#define PHB_SET_NODE(PHB, NODE) ((PHB)->node = (NODE)) 285#define PHB_SET_NODE(PHB, NODE) ((PHB)->node = (NODE))
294#else 286#else