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-rw-r--r--arch/powerpc/include/asm/ohare.h54
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diff --git a/arch/powerpc/include/asm/ohare.h b/arch/powerpc/include/asm/ohare.h
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1#ifndef _ASM_POWERPC_OHARE_H
2#define _ASM_POWERPC_OHARE_H
3#ifdef __KERNEL__
4/*
5 * ohare.h: definitions for using the "O'Hare" I/O controller chip.
6 *
7 * Copyright (C) 1997 Paul Mackerras.
8 *
9 * BenH: Changed to match those of heathrow (but not all of them). Please
10 * check if I didn't break anything (especially the media bay).
11 */
12
13/* offset from ohare base for feature control register */
14#define OHARE_MBCR 0x34
15#define OHARE_FCR 0x38
16
17/*
18 * Bits in feature control register.
19 * These were mostly derived by experiment on a powerbook 3400
20 * and may differ for other machines.
21 */
22#define OH_SCC_RESET 1
23#define OH_BAY_POWER_N 2 /* a guess */
24#define OH_BAY_PCI_ENABLE 4 /* a guess */
25#define OH_BAY_IDE_ENABLE 8
26#define OH_BAY_FLOPPY_ENABLE 0x10
27#define OH_IDE0_ENABLE 0x20
28#define OH_IDE0_RESET_N 0x40 /* a guess */
29#define OH_BAY_DEV_MASK 0x1c
30#define OH_BAY_RESET_N 0x80
31#define OH_IOBUS_ENABLE 0x100 /* IOBUS seems to be IDE */
32#define OH_SCC_ENABLE 0x200
33#define OH_MESH_ENABLE 0x400
34#define OH_FLOPPY_ENABLE 0x800
35#define OH_SCCA_IO 0x4000
36#define OH_SCCB_IO 0x8000
37#define OH_VIA_ENABLE 0x10000 /* Is apparently wrong, to be verified */
38#define OH_IDE1_RESET_N 0x800000
39
40/*
41 * Bits to set in the feature control register on PowerBooks.
42 */
43#define PBOOK_FEATURES (OH_IDE_ENABLE | OH_SCC_ENABLE | \
44 OH_MESH_ENABLE | OH_SCCA_IO | OH_SCCB_IO)
45
46/*
47 * A magic value to put into the feature control register of the
48 * "ohare" I/O controller on Starmaxes to enable the IDE CD interface.
49 * Contributed by Harry Eaton.
50 */
51#define STARMAX_FEATURES 0xbeff7a
52
53#endif /* __KERNEL__ */
54#endif /* _ASM_POWERPC_OHARE_H */