diff options
Diffstat (limited to 'arch/powerpc/include/asm/mmu-book3e.h')
-rw-r--r-- | arch/powerpc/include/asm/mmu-book3e.h | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/mmu-book3e.h b/arch/powerpc/include/asm/mmu-book3e.h index 936db360790a..89b785d16846 100644 --- a/arch/powerpc/include/asm/mmu-book3e.h +++ b/arch/powerpc/include/asm/mmu-book3e.h | |||
@@ -286,8 +286,21 @@ static inline unsigned int mmu_psize_to_shift(unsigned int mmu_psize) | |||
286 | extern int mmu_linear_psize; | 286 | extern int mmu_linear_psize; |
287 | extern int mmu_vmemmap_psize; | 287 | extern int mmu_vmemmap_psize; |
288 | 288 | ||
289 | struct tlb_core_data { | ||
290 | /* For software way selection, as on Freescale TLB1 */ | ||
291 | u8 esel_next, esel_max, esel_first; | ||
292 | |||
293 | /* Per-core spinlock for e6500 TLB handlers (no tlbsrx.) */ | ||
294 | u8 lock; | ||
295 | }; | ||
296 | |||
289 | #ifdef CONFIG_PPC64 | 297 | #ifdef CONFIG_PPC64 |
290 | extern unsigned long linear_map_top; | 298 | extern unsigned long linear_map_top; |
299 | extern int book3e_htw_mode; | ||
300 | |||
301 | #define PPC_HTW_NONE 0 | ||
302 | #define PPC_HTW_IBM 1 | ||
303 | #define PPC_HTW_E6500 2 | ||
291 | 304 | ||
292 | /* | 305 | /* |
293 | * 64-bit booke platforms don't load the tlb in the tlb miss handler code. | 306 | * 64-bit booke platforms don't load the tlb in the tlb miss handler code. |