aboutsummaryrefslogtreecommitdiffstats
path: root/arch/powerpc/include/asm/cputable.h
diff options
context:
space:
mode:
Diffstat (limited to 'arch/powerpc/include/asm/cputable.h')
-rw-r--r--arch/powerpc/include/asm/cputable.h10
1 files changed, 7 insertions, 3 deletions
diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h
index ef8a248dfd55..1e94b07a020e 100644
--- a/arch/powerpc/include/asm/cputable.h
+++ b/arch/powerpc/include/asm/cputable.h
@@ -62,6 +62,7 @@ enum powerpc_pmc_type {
62 PPC_PMC_DEFAULT = 0, 62 PPC_PMC_DEFAULT = 0,
63 PPC_PMC_IBM = 1, 63 PPC_PMC_IBM = 1,
64 PPC_PMC_PA6T = 2, 64 PPC_PMC_PA6T = 2,
65 PPC_PMC_G4 = 3,
65}; 66};
66 67
67struct pt_regs; 68struct pt_regs;
@@ -192,6 +193,7 @@ extern const char *powerpc_base_platform;
192#define CPU_FTR_NO_SLBIE_B LONG_ASM_CONST(0x0008000000000000) 193#define CPU_FTR_NO_SLBIE_B LONG_ASM_CONST(0x0008000000000000)
193#define CPU_FTR_VSX LONG_ASM_CONST(0x0010000000000000) 194#define CPU_FTR_VSX LONG_ASM_CONST(0x0010000000000000)
194#define CPU_FTR_SAO LONG_ASM_CONST(0x0020000000000000) 195#define CPU_FTR_SAO LONG_ASM_CONST(0x0020000000000000)
196#define CPU_FTR_CP_USE_DCBTZ LONG_ASM_CONST(0x0040000000000000)
195 197
196#ifndef __ASSEMBLY__ 198#ifndef __ASSEMBLY__
197 199
@@ -387,10 +389,11 @@ extern const char *powerpc_base_platform;
387 CPU_FTR_MMCRA | CPU_FTR_CTRL) 389 CPU_FTR_MMCRA | CPU_FTR_CTRL)
388#define CPU_FTRS_POWER4 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ 390#define CPU_FTRS_POWER4 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
389 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ 391 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
390 CPU_FTR_MMCRA) 392 CPU_FTR_MMCRA | CPU_FTR_CP_USE_DCBTZ)
391#define CPU_FTRS_PPC970 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ 393#define CPU_FTRS_PPC970 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
392 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ 394 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
393 CPU_FTR_ALTIVEC_COMP | CPU_FTR_CAN_NAP | CPU_FTR_MMCRA) 395 CPU_FTR_ALTIVEC_COMP | CPU_FTR_CAN_NAP | CPU_FTR_MMCRA | \
396 CPU_FTR_CP_USE_DCBTZ)
394#define CPU_FTRS_POWER5 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ 397#define CPU_FTRS_POWER5 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
395 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ 398 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
396 CPU_FTR_MMCRA | CPU_FTR_SMT | \ 399 CPU_FTR_MMCRA | CPU_FTR_SMT | \
@@ -411,7 +414,8 @@ extern const char *powerpc_base_platform;
411#define CPU_FTRS_CELL (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ 414#define CPU_FTRS_CELL (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
412 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ 415 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
413 CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \ 416 CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \
414 CPU_FTR_PAUSE_ZERO | CPU_FTR_CI_LARGE_PAGE | CPU_FTR_CELL_TB_BUG) 417 CPU_FTR_PAUSE_ZERO | CPU_FTR_CI_LARGE_PAGE | \
418 CPU_FTR_CELL_TB_BUG | CPU_FTR_CP_USE_DCBTZ)
415#define CPU_FTRS_PA6T (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ 419#define CPU_FTRS_PA6T (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
416 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | \ 420 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | \
417 CPU_FTR_ALTIVEC_COMP | CPU_FTR_CI_LARGE_PAGE | \ 421 CPU_FTR_ALTIVEC_COMP | CPU_FTR_CI_LARGE_PAGE | \