diff options
Diffstat (limited to 'arch/powerpc/include/asm/cputable.h')
-rw-r--r-- | arch/powerpc/include/asm/cputable.h | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h index f3a1fdd9cf08..f0a211d96923 100644 --- a/arch/powerpc/include/asm/cputable.h +++ b/arch/powerpc/include/asm/cputable.h | |||
@@ -199,6 +199,8 @@ extern const char *powerpc_base_platform; | |||
199 | #define CPU_FTR_UNALIGNED_LD_STD LONG_ASM_CONST(0x0080000000000000) | 199 | #define CPU_FTR_UNALIGNED_LD_STD LONG_ASM_CONST(0x0080000000000000) |
200 | #define CPU_FTR_ASYM_SMT LONG_ASM_CONST(0x0100000000000000) | 200 | #define CPU_FTR_ASYM_SMT LONG_ASM_CONST(0x0100000000000000) |
201 | #define CPU_FTR_STCX_CHECKS_ADDRESS LONG_ASM_CONST(0x0200000000000000) | 201 | #define CPU_FTR_STCX_CHECKS_ADDRESS LONG_ASM_CONST(0x0200000000000000) |
202 | #define CPU_FTR_POPCNTB LONG_ASM_CONST(0x0400000000000000) | ||
203 | #define CPU_FTR_POPCNTD LONG_ASM_CONST(0x0800000000000000) | ||
202 | 204 | ||
203 | #ifndef __ASSEMBLY__ | 205 | #ifndef __ASSEMBLY__ |
204 | 206 | ||
@@ -403,21 +405,22 @@ extern const char *powerpc_base_platform; | |||
403 | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ | 405 | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ |
404 | CPU_FTR_MMCRA | CPU_FTR_SMT | \ | 406 | CPU_FTR_MMCRA | CPU_FTR_SMT | \ |
405 | CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \ | 407 | CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \ |
406 | CPU_FTR_PURR | CPU_FTR_STCX_CHECKS_ADDRESS) | 408 | CPU_FTR_PURR | CPU_FTR_STCX_CHECKS_ADDRESS | \ |
409 | CPU_FTR_POPCNTB) | ||
407 | #define CPU_FTRS_POWER6 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ | 410 | #define CPU_FTRS_POWER6 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ |
408 | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ | 411 | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ |
409 | CPU_FTR_MMCRA | CPU_FTR_SMT | \ | 412 | CPU_FTR_MMCRA | CPU_FTR_SMT | \ |
410 | CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \ | 413 | CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \ |
411 | CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \ | 414 | CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \ |
412 | CPU_FTR_DSCR | CPU_FTR_UNALIGNED_LD_STD | \ | 415 | CPU_FTR_DSCR | CPU_FTR_UNALIGNED_LD_STD | \ |
413 | CPU_FTR_STCX_CHECKS_ADDRESS) | 416 | CPU_FTR_STCX_CHECKS_ADDRESS | CPU_FTR_POPCNTB) |
414 | #define CPU_FTRS_POWER7 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ | 417 | #define CPU_FTRS_POWER7 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ |
415 | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ | 418 | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ |
416 | CPU_FTR_MMCRA | CPU_FTR_SMT | \ | 419 | CPU_FTR_MMCRA | CPU_FTR_SMT | \ |
417 | CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \ | 420 | CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \ |
418 | CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \ | 421 | CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \ |
419 | CPU_FTR_DSCR | CPU_FTR_SAO | CPU_FTR_ASYM_SMT | \ | 422 | CPU_FTR_DSCR | CPU_FTR_SAO | CPU_FTR_ASYM_SMT | \ |
420 | CPU_FTR_STCX_CHECKS_ADDRESS) | 423 | CPU_FTR_STCX_CHECKS_ADDRESS | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD) |
421 | #define CPU_FTRS_CELL (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ | 424 | #define CPU_FTRS_CELL (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ |
422 | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ | 425 | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ |
423 | CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \ | 426 | CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \ |