diff options
Diffstat (limited to 'arch/powerpc/include/asm/cputable.h')
-rw-r--r-- | arch/powerpc/include/asm/cputable.h | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h index fb3245e928ea..fcc54ad159ba 100644 --- a/arch/powerpc/include/asm/cputable.h +++ b/arch/powerpc/include/asm/cputable.h | |||
@@ -52,6 +52,7 @@ struct cpu_spec { | |||
52 | char *cpu_name; | 52 | char *cpu_name; |
53 | unsigned long cpu_features; /* Kernel features */ | 53 | unsigned long cpu_features; /* Kernel features */ |
54 | unsigned int cpu_user_features; /* Userland features */ | 54 | unsigned int cpu_user_features; /* Userland features */ |
55 | unsigned int cpu_user_features2; /* Userland features v2 */ | ||
55 | unsigned int mmu_features; /* MMU features */ | 56 | unsigned int mmu_features; /* MMU features */ |
56 | 57 | ||
57 | /* cache line sizes */ | 58 | /* cache line sizes */ |
@@ -151,7 +152,7 @@ extern const char *powerpc_base_platform; | |||
151 | #define CPU_FTR_HVMODE LONG_ASM_CONST(0x0000000100000000) | 152 | #define CPU_FTR_HVMODE LONG_ASM_CONST(0x0000000100000000) |
152 | #define CPU_FTR_ARCH_201 LONG_ASM_CONST(0x0000000200000000) | 153 | #define CPU_FTR_ARCH_201 LONG_ASM_CONST(0x0000000200000000) |
153 | #define CPU_FTR_ARCH_206 LONG_ASM_CONST(0x0000000400000000) | 154 | #define CPU_FTR_ARCH_206 LONG_ASM_CONST(0x0000000400000000) |
154 | #define CPU_FTR_CFAR LONG_ASM_CONST(0x0000000800000000) | 155 | #define CPU_FTR_ARCH_207S LONG_ASM_CONST(0x0000000800000000) |
155 | #define CPU_FTR_IABR LONG_ASM_CONST(0x0000001000000000) | 156 | #define CPU_FTR_IABR LONG_ASM_CONST(0x0000001000000000) |
156 | #define CPU_FTR_MMCRA LONG_ASM_CONST(0x0000002000000000) | 157 | #define CPU_FTR_MMCRA LONG_ASM_CONST(0x0000002000000000) |
157 | #define CPU_FTR_CTRL LONG_ASM_CONST(0x0000004000000000) | 158 | #define CPU_FTR_CTRL LONG_ASM_CONST(0x0000004000000000) |
@@ -172,7 +173,7 @@ extern const char *powerpc_base_platform; | |||
172 | #define CPU_FTR_ICSWX LONG_ASM_CONST(0x0020000000000000) | 173 | #define CPU_FTR_ICSWX LONG_ASM_CONST(0x0020000000000000) |
173 | #define CPU_FTR_VMX_COPY LONG_ASM_CONST(0x0040000000000000) | 174 | #define CPU_FTR_VMX_COPY LONG_ASM_CONST(0x0040000000000000) |
174 | #define CPU_FTR_TM LONG_ASM_CONST(0x0080000000000000) | 175 | #define CPU_FTR_TM LONG_ASM_CONST(0x0080000000000000) |
175 | #define CPU_FTR_BCTAR LONG_ASM_CONST(0x0100000000000000) | 176 | #define CPU_FTR_CFAR LONG_ASM_CONST(0x0100000000000000) |
176 | #define CPU_FTR_HAS_PPR LONG_ASM_CONST(0x0200000000000000) | 177 | #define CPU_FTR_HAS_PPR LONG_ASM_CONST(0x0200000000000000) |
177 | #define CPU_FTR_DAWR LONG_ASM_CONST(0x0400000000000000) | 178 | #define CPU_FTR_DAWR LONG_ASM_CONST(0x0400000000000000) |
178 | 179 | ||
@@ -374,7 +375,7 @@ extern const char *powerpc_base_platform; | |||
374 | #define CPU_FTRS_E6500 (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN | \ | 375 | #define CPU_FTRS_E6500 (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN | \ |
375 | CPU_FTR_L2CSR | CPU_FTR_LWSYNC | CPU_FTR_NOEXECUTE | \ | 376 | CPU_FTR_L2CSR | CPU_FTR_LWSYNC | CPU_FTR_NOEXECUTE | \ |
376 | CPU_FTR_DBELL | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \ | 377 | CPU_FTR_DBELL | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \ |
377 | CPU_FTR_DEBUG_LVL_EXC | CPU_FTR_EMB_HV) | 378 | CPU_FTR_DEBUG_LVL_EXC | CPU_FTR_EMB_HV | CPU_FTR_ALTIVEC_COMP) |
378 | #define CPU_FTRS_GENERIC_32 (CPU_FTR_COMMON | CPU_FTR_NODSISRALIGN) | 379 | #define CPU_FTRS_GENERIC_32 (CPU_FTR_COMMON | CPU_FTR_NODSISRALIGN) |
379 | 380 | ||
380 | /* 64-bit CPUs */ | 381 | /* 64-bit CPUs */ |
@@ -421,8 +422,8 @@ extern const char *powerpc_base_platform; | |||
421 | CPU_FTR_DSCR | CPU_FTR_SAO | \ | 422 | CPU_FTR_DSCR | CPU_FTR_SAO | \ |
422 | CPU_FTR_STCX_CHECKS_ADDRESS | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \ | 423 | CPU_FTR_STCX_CHECKS_ADDRESS | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \ |
423 | CPU_FTR_ICSWX | CPU_FTR_CFAR | CPU_FTR_HVMODE | CPU_FTR_VMX_COPY | \ | 424 | CPU_FTR_ICSWX | CPU_FTR_CFAR | CPU_FTR_HVMODE | CPU_FTR_VMX_COPY | \ |
424 | CPU_FTR_DBELL | CPU_FTR_HAS_PPR | CPU_FTR_DAWR | CPU_FTR_BCTAR | \ | 425 | CPU_FTR_DBELL | CPU_FTR_HAS_PPR | CPU_FTR_DAWR | \ |
425 | CPU_FTR_TM_COMP) | 426 | CPU_FTR_ARCH_207S | CPU_FTR_TM_COMP) |
426 | #define CPU_FTRS_CELL (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ | 427 | #define CPU_FTRS_CELL (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ |
427 | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ | 428 | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ |
428 | CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \ | 429 | CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \ |