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-rw-r--r--arch/powerpc/include/asm/cpm2.h39
1 files changed, 0 insertions, 39 deletions
diff --git a/arch/powerpc/include/asm/cpm2.h b/arch/powerpc/include/asm/cpm2.h
index 990ff191da8b..236cfa344a7c 100644
--- a/arch/powerpc/include/asm/cpm2.h
+++ b/arch/powerpc/include/asm/cpm2.h
@@ -654,45 +654,6 @@ typedef struct iic {
654 uint iic_txtmp; /* Internal */ 654 uint iic_txtmp; /* Internal */
655} iic_t; 655} iic_t;
656 656
657/* SPI parameter RAM.
658*/
659typedef struct spi {
660 ushort spi_rbase; /* Rx Buffer descriptor base address */
661 ushort spi_tbase; /* Tx Buffer descriptor base address */
662 u_char spi_rfcr; /* Rx function code */
663 u_char spi_tfcr; /* Tx function code */
664 ushort spi_mrblr; /* Max receive buffer length */
665 uint spi_rstate; /* Internal */
666 uint spi_rdp; /* Internal */
667 ushort spi_rbptr; /* Internal */
668 ushort spi_rbc; /* Internal */
669 uint spi_rxtmp; /* Internal */
670 uint spi_tstate; /* Internal */
671 uint spi_tdp; /* Internal */
672 ushort spi_tbptr; /* Internal */
673 ushort spi_tbc; /* Internal */
674 uint spi_txtmp; /* Internal */
675 uint spi_res; /* Tx temp. */
676 uint spi_res1[4]; /* SDMA temp. */
677} spi_t;
678
679/* SPI Mode register.
680*/
681#define SPMODE_LOOP ((ushort)0x4000) /* Loopback */
682#define SPMODE_CI ((ushort)0x2000) /* Clock Invert */
683#define SPMODE_CP ((ushort)0x1000) /* Clock Phase */
684#define SPMODE_DIV16 ((ushort)0x0800) /* BRG/16 mode */
685#define SPMODE_REV ((ushort)0x0400) /* Reversed Data */
686#define SPMODE_MSTR ((ushort)0x0200) /* SPI Master */
687#define SPMODE_EN ((ushort)0x0100) /* Enable */
688#define SPMODE_LENMSK ((ushort)0x00f0) /* character length */
689#define SPMODE_PMMSK ((ushort)0x000f) /* prescale modulus */
690
691#define SPMODE_LEN(x) ((((x)-1)&0xF)<<4)
692#define SPMODE_PM(x) ((x) &0xF)
693
694#define SPI_EB ((u_char)0x10) /* big endian byte order */
695
696/* IDMA parameter RAM 657/* IDMA parameter RAM
697*/ 658*/
698typedef struct idma { 659typedef struct idma {