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-rw-r--r--arch/powerpc/boot/dts/b4860emu.dts223
1 files changed, 0 insertions, 223 deletions
diff --git a/arch/powerpc/boot/dts/b4860emu.dts b/arch/powerpc/boot/dts/b4860emu.dts
deleted file mode 100644
index 2aa5cd318ce8..000000000000
--- a/arch/powerpc/boot/dts/b4860emu.dts
+++ /dev/null
@@ -1,223 +0,0 @@
1/*
2 * B4860 emulator Device Tree Source
3 *
4 * Copyright 2013 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * This software is provided by Freescale Semiconductor "as is" and any
24 * express or implied warranties, including, but not limited to, the implied
25 * warranties of merchantability and fitness for a particular purpose are
26 * disclaimed. In no event shall Freescale Semiconductor be liable for any
27 * direct, indirect, incidental, special, exemplary, or consequential damages
28 * (including, but not limited to, procurement of substitute goods or services;
29 * loss of use, data, or profits; or business interruption) however caused and
30 * on any theory of liability, whether in contract, strict liability, or tort
31 * (including negligence or otherwise) arising in any way out of the use of
32 * this software, even if advised of the possibility of such damage.
33 */
34
35/dts-v1/;
36
37/include/ "fsl/e6500_power_isa.dtsi"
38
39/ {
40 compatible = "fsl,B4860";
41 #address-cells = <2>;
42 #size-cells = <2>;
43 interrupt-parent = <&mpic>;
44
45 aliases {
46 ccsr = &soc;
47
48 serial0 = &serial0;
49 serial1 = &serial1;
50 serial2 = &serial2;
51 serial3 = &serial3;
52 dma0 = &dma0;
53 dma1 = &dma1;
54 };
55
56 cpus {
57 #address-cells = <1>;
58 #size-cells = <0>;
59
60 cpu0: PowerPC,e6500@0 {
61 device_type = "cpu";
62 reg = <0 1>;
63 next-level-cache = <&L2>;
64 fsl,portid-mapping = <0x80000000>;
65 };
66 cpu1: PowerPC,e6500@2 {
67 device_type = "cpu";
68 reg = <2 3>;
69 next-level-cache = <&L2>;
70 fsl,portid-mapping = <0x80000000>;
71 };
72 cpu2: PowerPC,e6500@4 {
73 device_type = "cpu";
74 reg = <4 5>;
75 next-level-cache = <&L2>;
76 fsl,portid-mapping = <0x80000000>;
77 };
78 cpu3: PowerPC,e6500@6 {
79 device_type = "cpu";
80 reg = <6 7>;
81 next-level-cache = <&L2>;
82 fsl,portid-mapping = <0x80000000>;
83 };
84 };
85};
86
87/ {
88 model = "fsl,B4860QDS";
89 compatible = "fsl,B4860EMU", "fsl,B4860QDS";
90 #address-cells = <2>;
91 #size-cells = <2>;
92 interrupt-parent = <&mpic>;
93
94 ifc: localbus@ffe124000 {
95 reg = <0xf 0xfe124000 0 0x2000>;
96 ranges = <0 0 0xf 0xe8000000 0x08000000
97 2 0 0xf 0xff800000 0x00010000
98 3 0 0xf 0xffdf0000 0x00008000>;
99
100 nor@0,0 {
101 #address-cells = <1>;
102 #size-cells = <1>;
103 compatible = "cfi-flash";
104 reg = <0x0 0x0 0x8000000>;
105 bank-width = <2>;
106 device-width = <1>;
107 };
108 };
109
110 memory {
111 device_type = "memory";
112 };
113
114 soc: soc@ffe000000 {
115 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
116 reg = <0xf 0xfe000000 0 0x00001000>;
117 };
118};
119
120&ifc {
121 #address-cells = <2>;
122 #size-cells = <1>;
123 compatible = "fsl,ifc", "simple-bus";
124 interrupts = <25 2 0 0>;
125};
126
127&soc {
128 #address-cells = <1>;
129 #size-cells = <1>;
130 device_type = "soc";
131 compatible = "simple-bus";
132
133 soc-sram-error {
134 compatible = "fsl,soc-sram-error";
135 interrupts = <16 2 1 2>;
136 };
137
138 corenet-law@0 {
139 compatible = "fsl,corenet-law";
140 reg = <0x0 0x1000>;
141 fsl,num-laws = <32>;
142 };
143
144 ddr1: memory-controller@8000 {
145 compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
146 reg = <0x8000 0x1000>;
147 interrupts = <16 2 1 8>;
148 };
149
150 ddr2: memory-controller@9000 {
151 compatible = "fsl,qoriq-memory-controller-v4.5","fsl,qoriq-memory-controller";
152 reg = <0x9000 0x1000>;
153 interrupts = <16 2 1 9>;
154 };
155
156 cpc: l3-cache-controller@10000 {
157 compatible = "fsl,b4-l3-cache-controller", "cache";
158 reg = <0x10000 0x1000
159 0x11000 0x1000>;
160 interrupts = <16 2 1 4>;
161 };
162
163 corenet-cf@18000 {
164 compatible = "fsl,corenet2-cf", "fsl,corenet-cf";
165 reg = <0x18000 0x1000>;
166 interrupts = <16 2 1 0>;
167 fsl,ccf-num-csdids = <32>;
168 fsl,ccf-num-snoopids = <32>;
169 };
170
171 iommu@20000 {
172 compatible = "fsl,pamu-v1.0", "fsl,pamu";
173 reg = <0x20000 0x4000>;
174 fsl,portid-mapping = <0x8000>;
175 #address-cells = <1>;
176 #size-cells = <1>;
177 interrupts = <
178 24 2 0 0
179 16 2 1 1>;
180 pamu0: pamu@0 {
181 reg = <0 0x1000>;
182 fsl,primary-cache-geometry = <8 1>;
183 fsl,secondary-cache-geometry = <32 2>;
184 };
185 };
186
187/include/ "fsl/qoriq-mpic.dtsi"
188
189 guts: global-utilities@e0000 {
190 compatible = "fsl,b4-device-config";
191 reg = <0xe0000 0xe00>;
192 fsl,has-rstcr;
193 fsl,liodn-bits = <12>;
194 };
195
196/include/ "fsl/qoriq-clockgen2.dtsi"
197 global-utilities@e1000 {
198 compatible = "fsl,b4-clockgen", "fsl,qoriq-clockgen-2.0";
199 };
200
201/include/ "fsl/qoriq-dma-0.dtsi"
202 dma@100300 {
203 fsl,iommu-parent = <&pamu0>;
204 fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */
205 };
206
207/include/ "fsl/qoriq-dma-1.dtsi"
208 dma@101300 {
209 fsl,iommu-parent = <&pamu0>;
210 fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */
211 };
212
213/include/ "fsl/qoriq-i2c-0.dtsi"
214/include/ "fsl/qoriq-i2c-1.dtsi"
215/include/ "fsl/qoriq-duart-0.dtsi"
216/include/ "fsl/qoriq-duart-1.dtsi"
217
218 L2: l2-cache-controller@c20000 {
219 compatible = "fsl,b4-l2-cache-controller";
220 reg = <0xc20000 0x1000>;
221 next-level-cache = <&cpc>;
222 };
223};
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-23 21:14:38 -0500