diff options
Diffstat (limited to 'arch/powerpc/boot')
-rw-r--r-- | arch/powerpc/boot/dts/mpc8544ds.dts | 88 | ||||
-rw-r--r-- | arch/powerpc/boot/dts/mpc8641_hpcn.dts | 114 |
2 files changed, 64 insertions, 138 deletions
diff --git a/arch/powerpc/boot/dts/mpc8544ds.dts b/arch/powerpc/boot/dts/mpc8544ds.dts index 4680e2010887..3e79bf0a3159 100644 --- a/arch/powerpc/boot/dts/mpc8544ds.dts +++ b/arch/powerpc/boot/dts/mpc8544ds.dts | |||
@@ -44,8 +44,18 @@ | |||
44 | #size-cells = <1>; | 44 | #size-cells = <1>; |
45 | #interrupt-cells = <2>; | 45 | #interrupt-cells = <2>; |
46 | device_type = "soc"; | 46 | device_type = "soc"; |
47 | ranges = <0 e0000000 00100000>; | 47 | |
48 | reg = <e0000000 00100000>; // CCSRBAR 1M | 48 | |
49 | ranges = <00001000 e0001000 000ff000 | ||
50 | 80000000 80000000 20000000 | ||
51 | a0000000 a0000000 10000000 | ||
52 | b0000000 b0000000 00100000 | ||
53 | c0000000 c0000000 20000000 | ||
54 | b0100000 b0100000 00100000 | ||
55 | e1000000 e1000000 00010000 | ||
56 | e1010000 e1010000 00010000 | ||
57 | e1020000 e1020000 00010000>; | ||
58 | reg = <e0000000 00001000>; // CCSRBAR 1M | ||
49 | bus-frequency = <0>; // Filled out by uboot. | 59 | bus-frequency = <0>; // Filled out by uboot. |
50 | 60 | ||
51 | memory-controller@2000 { | 61 | memory-controller@2000 { |
@@ -161,8 +171,8 @@ | |||
161 | interrupt-parent = <&mpic>; | 171 | interrupt-parent = <&mpic>; |
162 | interrupts = <18 2>; | 172 | interrupts = <18 2>; |
163 | bus-range = <0 ff>; | 173 | bus-range = <0 ff>; |
164 | ranges = <02000000 0 80000000 80000000 0 10000000 | 174 | ranges = <02000000 0 c0000000 c0000000 0 20000000 |
165 | 01000000 0 00000000 e2000000 0 00800000>; | 175 | 01000000 0 00000000 e1000000 0 00010000>; |
166 | clock-frequency = <3f940aa>; | 176 | clock-frequency = <3f940aa>; |
167 | #interrupt-cells = <1>; | 177 | #interrupt-cells = <1>; |
168 | #size-cells = <2>; | 178 | #size-cells = <2>; |
@@ -178,8 +188,8 @@ | |||
178 | #address-cells = <3>; | 188 | #address-cells = <3>; |
179 | reg = <9000 1000>; | 189 | reg = <9000 1000>; |
180 | bus-range = <0 ff>; | 190 | bus-range = <0 ff>; |
181 | ranges = <02000000 0 90000000 90000000 0 10000000 | 191 | ranges = <02000000 0 80000000 80000000 0 20000000 |
182 | 01000000 0 00000000 e3000000 0 00800000>; | 192 | 01000000 0 00000000 e1010000 0 00010000>; |
183 | clock-frequency = <1fca055>; | 193 | clock-frequency = <1fca055>; |
184 | interrupt-parent = <&mpic>; | 194 | interrupt-parent = <&mpic>; |
185 | interrupts = <1a 2>; | 195 | interrupts = <1a 2>; |
@@ -202,7 +212,7 @@ | |||
202 | reg = <a000 1000>; | 212 | reg = <a000 1000>; |
203 | bus-range = <0 ff>; | 213 | bus-range = <0 ff>; |
204 | ranges = <02000000 0 a0000000 a0000000 0 10000000 | 214 | ranges = <02000000 0 a0000000 a0000000 0 10000000 |
205 | 01000000 0 00000000 e2800000 0 00800000>; | 215 | 01000000 0 00000000 e1020000 0 00010000>; |
206 | clock-frequency = <1fca055>; | 216 | clock-frequency = <1fca055>; |
207 | interrupt-parent = <&mpic>; | 217 | interrupt-parent = <&mpic>; |
208 | interrupts = <19 2>; | 218 | interrupts = <19 2>; |
@@ -224,49 +234,29 @@ | |||
224 | #address-cells = <3>; | 234 | #address-cells = <3>; |
225 | reg = <b000 1000>; | 235 | reg = <b000 1000>; |
226 | bus-range = <0 ff>; | 236 | bus-range = <0 ff>; |
227 | ranges = <02000000 0 b0000000 b0000000 0 10000000 | 237 | ranges = <02000000 0 b0000000 b0000000 0 00100000 |
228 | 01000000 0 00000000 e3800000 0 00800000>; | 238 | 01000000 0 00000000 b0100000 0 00100000>; |
229 | clock-frequency = <1fca055>; | 239 | clock-frequency = <1fca055>; |
230 | interrupt-parent = <&mpic>; | 240 | interrupt-parent = <&mpic>; |
231 | interrupts = <1b 2>; | 241 | interrupts = <1b 2>; |
232 | interrupt-map-mask = <f800 0 0 7>; | 242 | interrupt-map-mask = <fb00 0 0 0>; |
233 | interrupt-map = < | 243 | interrupt-map = < |
234 | |||
235 | // IDSEL 0x1a | ||
236 | d000 0 0 1 &i8259 6 2 | ||
237 | d000 0 0 2 &i8259 3 2 | ||
238 | d000 0 0 3 &i8259 4 2 | ||
239 | d000 0 0 4 &i8259 5 2 | ||
240 | |||
241 | // IDSEL 0x1b | ||
242 | d800 0 0 1 &i8259 5 2 | ||
243 | d800 0 0 2 &i8259 0 0 | ||
244 | d800 0 0 3 &i8259 0 0 | ||
245 | d800 0 0 4 &i8259 0 0 | ||
246 | |||
247 | // IDSEL 0x1c USB | 244 | // IDSEL 0x1c USB |
248 | e000 0 0 1 &i8259 9 2 | 245 | e000 0 0 0 &i8259 c 2 |
249 | e000 0 0 2 &i8259 a 2 | 246 | e100 0 0 0 &i8259 9 2 |
250 | e000 0 0 3 &i8259 c 2 | 247 | e200 0 0 0 &i8259 a 2 |
251 | e000 0 0 4 &i8259 7 2 | 248 | e300 0 0 0 &i8259 b 2 |
252 | 249 | ||
253 | // IDSEL 0x1d Audio | 250 | // IDSEL 0x1d Audio |
254 | e800 0 0 1 &i8259 9 2 | 251 | e800 0 0 0 &i8259 6 2 |
255 | e800 0 0 2 &i8259 a 2 | ||
256 | e800 0 0 3 &i8259 b 2 | ||
257 | e800 0 0 4 &i8259 0 0 | ||
258 | 252 | ||
259 | // IDSEL 0x1e Legacy | 253 | // IDSEL 0x1e Legacy |
260 | f000 0 0 1 &i8259 c 2 | 254 | f000 0 0 0 &i8259 7 2 |
261 | f000 0 0 2 &i8259 0 0 | 255 | f100 0 0 0 &i8259 7 2 |
262 | f000 0 0 3 &i8259 0 0 | ||
263 | f000 0 0 4 &i8259 0 0 | ||
264 | 256 | ||
265 | // IDSEL 0x1f IDE/SATA | 257 | // IDSEL 0x1f IDE/SATA |
266 | f800 0 0 1 &i8259 6 2 | 258 | f800 0 0 0 &i8259 e 2 |
267 | f800 0 0 2 &i8259 0 0 | 259 | f900 0 0 0 &i8259 5 2 |
268 | f800 0 0 3 &i8259 0 0 | ||
269 | f800 0 0 4 &i8259 0 0 | ||
270 | >; | 260 | >; |
271 | uli1575@0 { | 261 | uli1575@0 { |
272 | reg = <0 0 0 0 0>; | 262 | reg = <0 0 0 0 0>; |
@@ -274,10 +264,10 @@ | |||
274 | #address-cells = <3>; | 264 | #address-cells = <3>; |
275 | ranges = <02000000 0 b0000000 | 265 | ranges = <02000000 0 b0000000 |
276 | 02000000 0 b0000000 | 266 | 02000000 0 b0000000 |
277 | 0 10000000 | 267 | 0 00100000 |
278 | 01000000 0 00000000 | 268 | 01000000 0 00000000 |
279 | 01000000 0 00000000 | 269 | 01000000 0 00000000 |
280 | 0 00080000>; | 270 | 0 00100000>; |
281 | 271 | ||
282 | pci_bridge@0 { | 272 | pci_bridge@0 { |
283 | reg = <0 0 0 0 0>; | 273 | reg = <0 0 0 0 0>; |
@@ -285,10 +275,10 @@ | |||
285 | #address-cells = <3>; | 275 | #address-cells = <3>; |
286 | ranges = <02000000 0 b0000000 | 276 | ranges = <02000000 0 b0000000 |
287 | 02000000 0 b0000000 | 277 | 02000000 0 b0000000 |
288 | 0 20000000 | 278 | 0 00100000 |
289 | 01000000 0 00000000 | 279 | 01000000 0 00000000 |
290 | 01000000 0 00000000 | 280 | 01000000 0 00000000 |
291 | 0 00100000>; | 281 | 0 00100000>; |
292 | 282 | ||
293 | isa@1e { | 283 | isa@1e { |
294 | device_type = "isa"; | 284 | device_type = "isa"; |
@@ -296,7 +286,8 @@ | |||
296 | #size-cells = <1>; | 286 | #size-cells = <1>; |
297 | #address-cells = <2>; | 287 | #address-cells = <2>; |
298 | reg = <f000 0 0 0 0>; | 288 | reg = <f000 0 0 0 0>; |
299 | ranges = <1 0 01000000 0 0 | 289 | ranges = <1 0 |
290 | 01000000 0 0 | ||
300 | 00001000>; | 291 | 00001000>; |
301 | interrupt-parent = <&i8259>; | 292 | interrupt-parent = <&i8259>; |
302 | 293 | ||
@@ -312,8 +303,7 @@ | |||
312 | built-in; | 303 | built-in; |
313 | compatible = "chrp,iic"; | 304 | compatible = "chrp,iic"; |
314 | interrupts = <9 2>; | 305 | interrupts = <9 2>; |
315 | interrupt-parent = | 306 | interrupt-parent = <&mpic>; |
316 | <&mpic>; | ||
317 | }; | 307 | }; |
318 | 308 | ||
319 | i8042@60 { | 309 | i8042@60 { |
@@ -321,8 +311,7 @@ | |||
321 | #address-cells = <1>; | 311 | #address-cells = <1>; |
322 | reg = <1 60 1 1 64 1>; | 312 | reg = <1 60 1 1 64 1>; |
323 | interrupts = <1 3 c 3>; | 313 | interrupts = <1 3 c 3>; |
324 | interrupt-parent = | 314 | interrupt-parent = <&i8259>; |
325 | <&i8259>; | ||
326 | 315 | ||
327 | keyboard@0 { | 316 | keyboard@0 { |
328 | reg = <0>; | 317 | reg = <0>; |
@@ -336,8 +325,7 @@ | |||
336 | }; | 325 | }; |
337 | 326 | ||
338 | rtc@70 { | 327 | rtc@70 { |
339 | compatible = | 328 | compatible = "pnpPNP,b00"; |
340 | "pnpPNP,b00"; | ||
341 | reg = <1 70 2>; | 329 | reg = <1 70 2>; |
342 | }; | 330 | }; |
343 | 331 | ||
diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn.dts b/arch/powerpc/boot/dts/mpc8641_hpcn.dts index 5d82709cfcbb..b0166e5c177e 100644 --- a/arch/powerpc/boot/dts/mpc8641_hpcn.dts +++ b/arch/powerpc/boot/dts/mpc8641_hpcn.dts | |||
@@ -224,98 +224,36 @@ | |||
224 | clock-frequency = <1fca055>; | 224 | clock-frequency = <1fca055>; |
225 | interrupt-parent = <&mpic>; | 225 | interrupt-parent = <&mpic>; |
226 | interrupts = <18 2>; | 226 | interrupts = <18 2>; |
227 | interrupt-map-mask = <f800 0 0 7>; | 227 | interrupt-map-mask = <fb00 0 0 0>; |
228 | interrupt-map = < | 228 | interrupt-map = < |
229 | /* IDSEL 0x11 */ | 229 | /* IDSEL 0x11 */ |
230 | 8800 0 0 1 &i8259 3 2 | 230 | 8800 0 0 1 &i8259 9 2 |
231 | 8800 0 0 2 &i8259 4 2 | 231 | 8800 0 0 2 &i8259 a 2 |
232 | 8800 0 0 3 &i8259 5 2 | 232 | 8800 0 0 3 &i8259 b 2 |
233 | 8800 0 0 4 &i8259 6 2 | 233 | 8800 0 0 4 &i8259 c 2 |
234 | 234 | ||
235 | /* IDSEL 0x12 */ | 235 | /* IDSEL 0x12 */ |
236 | 9000 0 0 1 &i8259 4 2 | 236 | 9000 0 0 1 &i8259 a 2 |
237 | 9000 0 0 2 &i8259 5 2 | 237 | 9000 0 0 2 &i8259 b 2 |
238 | 9000 0 0 3 &i8259 6 2 | 238 | 9000 0 0 3 &i8259 c 2 |
239 | 9000 0 0 4 &i8259 3 2 | 239 | 9000 0 0 4 &i8259 9 2 |
240 | 240 | ||
241 | /* IDSEL 0x13 */ | 241 | // IDSEL 0x1c USB |
242 | 9800 0 0 1 &i8259 0 0 | 242 | e000 0 0 0 &i8259 c 2 |
243 | 9800 0 0 2 &i8259 0 0 | 243 | e100 0 0 0 &i8259 9 2 |
244 | 9800 0 0 3 &i8259 0 0 | 244 | e200 0 0 0 &i8259 a 2 |
245 | 9800 0 0 4 &i8259 0 0 | 245 | e300 0 0 0 &i8259 b 2 |
246 | 246 | ||
247 | /* IDSEL 0x14 */ | 247 | // IDSEL 0x1d Audio |
248 | a000 0 0 1 &i8259 0 0 | 248 | e800 0 0 0 &i8259 6 2 |
249 | a000 0 0 2 &i8259 0 0 | 249 | |
250 | a000 0 0 3 &i8259 0 0 | 250 | // IDSEL 0x1e Legacy |
251 | a000 0 0 4 &i8259 0 0 | 251 | f000 0 0 0 &i8259 7 2 |
252 | 252 | f100 0 0 0 &i8259 7 2 | |
253 | /* IDSEL 0x15 */ | 253 | |
254 | a800 0 0 1 &i8259 0 0 | 254 | // IDSEL 0x1f IDE/SATA |
255 | a800 0 0 2 &i8259 0 0 | 255 | f800 0 0 0 &i8259 e 2 |
256 | a800 0 0 3 &i8259 0 0 | 256 | f900 0 0 0 &i8259 5 2 |
257 | a800 0 0 4 &i8259 0 0 | ||
258 | |||
259 | /* IDSEL 0x16 */ | ||
260 | b000 0 0 1 &i8259 0 0 | ||
261 | b000 0 0 2 &i8259 0 0 | ||
262 | b000 0 0 3 &i8259 0 0 | ||
263 | b000 0 0 4 &i8259 0 0 | ||
264 | |||
265 | /* IDSEL 0x17 */ | ||
266 | b800 0 0 1 &i8259 0 0 | ||
267 | b800 0 0 2 &i8259 0 0 | ||
268 | b800 0 0 3 &i8259 0 0 | ||
269 | b800 0 0 4 &i8259 0 0 | ||
270 | |||
271 | /* IDSEL 0x18 */ | ||
272 | c000 0 0 1 &i8259 0 0 | ||
273 | c000 0 0 2 &i8259 0 0 | ||
274 | c000 0 0 3 &i8259 0 0 | ||
275 | c000 0 0 4 &i8259 0 0 | ||
276 | |||
277 | /* IDSEL 0x19 */ | ||
278 | c800 0 0 1 &i8259 0 0 | ||
279 | c800 0 0 2 &i8259 0 0 | ||
280 | c800 0 0 3 &i8259 0 0 | ||
281 | c800 0 0 4 &i8259 0 0 | ||
282 | |||
283 | /* IDSEL 0x1a */ | ||
284 | d000 0 0 1 &i8259 6 2 | ||
285 | d000 0 0 2 &i8259 3 2 | ||
286 | d000 0 0 3 &i8259 4 2 | ||
287 | d000 0 0 4 &i8259 5 2 | ||
288 | |||
289 | |||
290 | /* IDSEL 0x1b */ | ||
291 | d800 0 0 1 &i8259 5 2 | ||
292 | d800 0 0 2 &i8259 0 0 | ||
293 | d800 0 0 3 &i8259 0 0 | ||
294 | d800 0 0 4 &i8259 0 0 | ||
295 | |||
296 | /* IDSEL 0x1c */ | ||
297 | e000 0 0 1 &i8259 9 2 | ||
298 | e000 0 0 2 &i8259 a 2 | ||
299 | e000 0 0 3 &i8259 c 2 | ||
300 | e000 0 0 4 &i8259 7 2 | ||
301 | |||
302 | /* IDSEL 0x1d */ | ||
303 | e800 0 0 1 &i8259 9 2 | ||
304 | e800 0 0 2 &i8259 a 2 | ||
305 | e800 0 0 3 &i8259 b 2 | ||
306 | e800 0 0 4 &i8259 0 0 | ||
307 | |||
308 | /* IDSEL 0x1e */ | ||
309 | f000 0 0 1 &i8259 c 2 | ||
310 | f000 0 0 2 &i8259 0 0 | ||
311 | f000 0 0 3 &i8259 0 0 | ||
312 | f000 0 0 4 &i8259 0 0 | ||
313 | |||
314 | /* IDSEL 0x1f */ | ||
315 | f800 0 0 1 &i8259 6 2 | ||
316 | f800 0 0 2 &i8259 0 0 | ||
317 | f800 0 0 3 &i8259 0 0 | ||
318 | f800 0 0 4 &i8259 0 0 | ||
319 | >; | 257 | >; |
320 | uli1575@0 { | 258 | uli1575@0 { |
321 | reg = <0 0 0 0 0>; | 259 | reg = <0 0 0 0 0>; |