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-rw-r--r--arch/powerpc/boot/dts/mpc832x_rdb.dts24
1 files changed, 24 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/mpc832x_rdb.dts b/arch/powerpc/boot/dts/mpc832x_rdb.dts
index dea30910c136..4319bd70a580 100644
--- a/arch/powerpc/boot/dts/mpc832x_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc832x_rdb.dts
@@ -152,10 +152,21 @@
152 }; 152 };
153 153
154 par_io@1400 { 154 par_io@1400 {
155 #address-cells = <1>;
156 #size-cells = <1>;
155 reg = <0x1400 0x100>; 157 reg = <0x1400 0x100>;
158 ranges = <3 0x1448 0x18>;
159 compatible = "fsl,mpc8323-qe-pario";
156 device_type = "par_io"; 160 device_type = "par_io";
157 num-ports = <7>; 161 num-ports = <7>;
158 162
163 qe_pio_d: gpio-controller@1448 {
164 #gpio-cells = <2>;
165 compatible = "fsl,mpc8323-qe-pario-bank";
166 reg = <3 0x18>;
167 gpio-controller;
168 };
169
159 ucc2pio:ucc_pin@02 { 170 ucc2pio:ucc_pin@02 {
160 pio-map = < 171 pio-map = <
161 /* port pin dir open_drain assignment has_irq */ 172 /* port pin dir open_drain assignment has_irq */
@@ -225,12 +236,25 @@
225 }; 236 };
226 237
227 spi@4c0 { 238 spi@4c0 {
239 #address-cells = <1>;
240 #size-cells = <0>;
228 cell-index = <0>; 241 cell-index = <0>;
229 compatible = "fsl,spi"; 242 compatible = "fsl,spi";
230 reg = <0x4c0 0x40>; 243 reg = <0x4c0 0x40>;
231 interrupts = <2>; 244 interrupts = <2>;
232 interrupt-parent = <&qeic>; 245 interrupt-parent = <&qeic>;
246 gpios = <&qe_pio_d 13 0>;
233 mode = "cpu-qe"; 247 mode = "cpu-qe";
248
249 mmc-slot@0 {
250 compatible = "fsl,mpc8323rdb-mmc-slot",
251 "mmc-spi-slot";
252 reg = <0>;
253 gpios = <&qe_pio_d 14 1
254 &qe_pio_d 15 0>;
255 voltage-ranges = <3300 3300>;
256 spi-max-frequency = <50000000>;
257 };
234 }; 258 };
235 259
236 spi@500 { 260 spi@500 {