diff options
Diffstat (limited to 'arch/powerpc/boot/treeboot-walnut.c')
-rw-r--r-- | arch/powerpc/boot/treeboot-walnut.c | 53 |
1 files changed, 2 insertions, 51 deletions
diff --git a/arch/powerpc/boot/treeboot-walnut.c b/arch/powerpc/boot/treeboot-walnut.c index bb2c309d70fc..472e36605a52 100644 --- a/arch/powerpc/boot/treeboot-walnut.c +++ b/arch/powerpc/boot/treeboot-walnut.c | |||
@@ -20,55 +20,6 @@ | |||
20 | 20 | ||
21 | BSS_STACK(4096); | 21 | BSS_STACK(4096); |
22 | 22 | ||
23 | void ibm405gp_fixup_clocks(unsigned int sysclk, unsigned int ser_clk) | ||
24 | { | ||
25 | u32 pllmr = mfdcr(DCRN_CPC0_PLLMR); | ||
26 | u32 cpc0_cr0 = mfdcr(DCRN_405_CPC0_CR0); | ||
27 | u32 cpc0_cr1 = mfdcr(DCRN_405_CPC0_CR1); | ||
28 | u32 cpu, plb, opb, ebc, tb, uart0, uart1, m; | ||
29 | u32 fwdv, fbdv, cbdv, opdv, epdv, udiv; | ||
30 | |||
31 | fwdv = (8 - ((pllmr & 0xe0000000) >> 29)); | ||
32 | fbdv = (pllmr & 0x1e000000) >> 25; | ||
33 | cbdv = ((pllmr & 0x00060000) >> 17) + 1; | ||
34 | opdv = ((pllmr & 0x00018000) >> 15) + 1; | ||
35 | epdv = ((pllmr & 0x00001800) >> 13) + 2; | ||
36 | udiv = ((cpc0_cr0 & 0x3e) >> 1) + 1; | ||
37 | |||
38 | m = fwdv * fbdv * cbdv; | ||
39 | |||
40 | cpu = sysclk * m / fwdv; | ||
41 | plb = cpu / cbdv; | ||
42 | opb = plb / opdv; | ||
43 | ebc = plb / epdv; | ||
44 | |||
45 | if (cpc0_cr0 & 0x80) { | ||
46 | /* uart0 uses the external clock */ | ||
47 | uart0 = ser_clk; | ||
48 | } else { | ||
49 | uart0 = cpu / udiv; | ||
50 | } | ||
51 | |||
52 | if (cpc0_cr0 & 0x40) { | ||
53 | /* uart1 uses the external clock */ | ||
54 | uart1 = ser_clk; | ||
55 | } else { | ||
56 | uart1 = cpu / udiv; | ||
57 | } | ||
58 | |||
59 | /* setup the timebase clock to tick at the cpu frequency */ | ||
60 | cpc0_cr1 = cpc0_cr1 & ~0x00800000; | ||
61 | mtdcr(DCRN_405_CPC0_CR1, cpc0_cr1); | ||
62 | tb = cpu; | ||
63 | |||
64 | dt_fixup_cpu_clocks(cpu, tb, 0); | ||
65 | dt_fixup_clock("/plb", plb); | ||
66 | dt_fixup_clock("/plb/opb", opb); | ||
67 | dt_fixup_clock("/plb/ebc", ebc); | ||
68 | dt_fixup_clock("/plb/opb/serial@ef600300", uart0); | ||
69 | dt_fixup_clock("/plb/opb/serial@ef600400", uart1); | ||
70 | } | ||
71 | |||
72 | static void walnut_flashsel_fixup(void) | 23 | static void walnut_flashsel_fixup(void) |
73 | { | 24 | { |
74 | void *devp, *sram; | 25 | void *devp, *sram; |
@@ -112,7 +63,7 @@ static void walnut_flashsel_fixup(void) | |||
112 | #define WALNUT_OPENBIOS_MAC_OFF 0xfffffe0b | 63 | #define WALNUT_OPENBIOS_MAC_OFF 0xfffffe0b |
113 | static void walnut_fixups(void) | 64 | static void walnut_fixups(void) |
114 | { | 65 | { |
115 | ibm4xx_fixup_memsize(); | 66 | ibm4xx_sdram_fixup_memsize(); |
116 | ibm405gp_fixup_clocks(33330000, 0xa8c000); | 67 | ibm405gp_fixup_clocks(33330000, 0xa8c000); |
117 | ibm4xx_quiesce_eth((u32 *)0xef600800, NULL); | 68 | ibm4xx_quiesce_eth((u32 *)0xef600800, NULL); |
118 | ibm4xx_fixup_ebc_ranges("/plb/ebc"); | 69 | ibm4xx_fixup_ebc_ranges("/plb/ebc"); |
@@ -128,6 +79,6 @@ void platform_init(void) | |||
128 | simple_alloc_init(_end, avail_ram, 32, 32); | 79 | simple_alloc_init(_end, avail_ram, 32, 32); |
129 | platform_ops.fixups = walnut_fixups; | 80 | platform_ops.fixups = walnut_fixups; |
130 | platform_ops.exit = ibm40x_dbcr_reset; | 81 | platform_ops.exit = ibm40x_dbcr_reset; |
131 | ft_init(_dtb_start, _dtb_end - _dtb_start, 32); | 82 | fdt_init(_dtb_start); |
132 | serial_console_init(); | 83 | serial_console_init(); |
133 | } | 84 | } |