7 files changed, 453 insertions, 1 deletions

diff --git a/arch/powerpc/boot/dts/iss4xx-mpic.dts b/arch/powerpc/boot/dts/iss4xx-mpic.dts
new file mode 100644
index 000000000000..23e9d9b7e400
--- /dev/null
+++ b/arch/powerpc/boot/dts/iss4xx-mpic.dts
@@ -0,0 +1,155 @@
+/*
+ * Device Tree Source for IBM Embedded PPC 476 Platform
+ *
+ * Copyright 2010 Torez Smith, IBM Corporation.
+ *
+ * Based on earlier code:
+ *     Copyright (c) 2006, 2007 IBM Corp.
+ *     Josh Boyer <jwboyer@linux.vnet.ibm.com>, David Gibson <dwg@au1.ibm.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without
+ * any warranty of any kind, whether express or implied.
+ */
+
+/dts-v1/;
+
+/memreserve/ 0x01f00000 0x00100000;
+
+/ {
+        #address-cells = <2>;
+        #size-cells = <1>;
+        model = "ibm,iss-4xx";
+        compatible = "ibm,iss-4xx";
+        dcr-parent = <&{/cpus/cpu@0}>;
+
+        aliases {
+                serial0 = &UART0;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                cpu@0 {
+                        device_type = "cpu";
+                        model = "PowerPC,4xx"; // real CPU changed in sim
+                        reg = <0>;
+                        clock-frequency = <100000000>; // 100Mhz :-)
+                        timebase-frequency = <100000000>;
+                        i-cache-line-size = <32>;
+                        d-cache-line-size = <32>;
+                        i-cache-size = <32768>;
+                        d-cache-size = <32768>;
+                        dcr-controller;
+                        dcr-access-method = "native";
+                        status = "ok";
+                };
+                cpu@1 {
+                        device_type = "cpu";
+                        model = "PowerPC,4xx"; // real CPU changed in sim
+                        reg = <1>;
+                        clock-frequency = <100000000>; // 100Mhz :-)
+                        timebase-frequency = <100000000>;
+                        i-cache-line-size = <32>;
+                        d-cache-line-size = <32>;
+                        i-cache-size = <32768>;
+                        d-cache-size = <32768>;
+                        dcr-controller;
+                        dcr-access-method = "native";
+                        status = "disabled";
+                        enable-method = "spin-table";
+                        cpu-release-addr = <0 0x01f00100>;
+                };
+                cpu@2 {
+                        device_type = "cpu";
+                        model = "PowerPC,4xx"; // real CPU changed in sim
+                        reg = <2>;
+                        clock-frequency = <100000000>; // 100Mhz :-)
+                        timebase-frequency = <100000000>;
+                        i-cache-line-size = <32>;
+                        d-cache-line-size = <32>;
+                        i-cache-size = <32768>;
+                        d-cache-size = <32768>;
+                        dcr-controller;
+                        dcr-access-method = "native";
+                        status = "disabled";
+                        enable-method = "spin-table";
+                        cpu-release-addr = <0 0x01f00200>;
+                };
+                cpu@3 {
+                        device_type = "cpu";
+                        model = "PowerPC,4xx"; // real CPU changed in sim
+                        reg = <3>;
+                        clock-frequency = <100000000>; // 100Mhz :-)
+                        timebase-frequency = <100000000>;
+                        i-cache-line-size = <32>;
+                        d-cache-line-size = <32>;
+                        i-cache-size = <32768>;
+                        d-cache-size = <32768>;
+                        dcr-controller;
+                        dcr-access-method = "native";
+                        status = "disabled";
+                        enable-method = "spin-table";
+                        cpu-release-addr = <0 0x01f00300>;
+                };
+        };
+
+        memory {
+                device_type = "memory";
+                reg =  <0x00000000 0x00000000 0x00000000>; // Filled in by zImage
+
+        };
+
+        MPIC: interrupt-controller {
+                compatible = "chrp,open-pic";
+                interrupt-controller;
+                dcr-reg = <0xffc00000 0x00030000>;
+                #address-cells = <0>;
+                #size-cells = <0>;
+                #interrupt-cells = <2>;
+
+        };
+
+        plb {
+                compatible = "ibm,plb-4xx", "ibm,plb4"; /* Could be PLB6, doesn't matter */
+                #address-cells = <2>;
+                #size-cells = <1>;
+                ranges;
+                clock-frequency = <0>; // Filled in by zImage
+
+                POB0: opb {
+                        compatible = "ibm,opb-4xx", "ibm,opb";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        /* Wish there was a nicer way of specifying a full 32-bit
+                           range */
+                        ranges = <0x00000000 0x00000001 0x00000000 0x80000000
+                                  0x80000000 0x00000001 0x80000000 0x80000000>;
+                        clock-frequency = <0>; // Filled in by zImage
+                        UART0: serial@40000200 {
+                                device_type = "serial";
+                                compatible = "ns16550a";
+                                reg = <0x40000200 0x00000008>;
+                                virtual-reg = <0xe0000200>;
+                                clock-frequency = <11059200>;
+                                current-speed = <115200>;
+                                interrupt-parent = <&MPIC>;
+                                interrupts = <0x0 0x2>;
+                        };
+                };
+        };
+
+        nvrtc {
+                compatible = "ds1743-nvram", "ds1743", "rtc-ds1743";
+                reg = <0 0xEF703000 0x2000>;
+        };
+        iss-block {
+                compatible = "ibm,iss-sim-block-device";
+                reg = <0 0xEF701000 0x1000>;
+        };
+
+        chosen {
+                linux,stdout-path = "/plb/opb/serial@40000200";
+        };
+};
diff --git a/arch/powerpc/boot/dts/iss4xx.dts b/arch/powerpc/boot/dts/iss4xx.dts
new file mode 100644
index 000000000000..4ff6555c866d
--- /dev/null
+++ b/arch/powerpc/boot/dts/iss4xx.dts
@@ -0,0 +1,116 @@
+/*
+ * Device Tree Source for IBM Embedded PPC 476 Platform
+ *
+ * Copyright 2010 Torez Smith, IBM Corporation.
+ *
+ * Based on earlier code:
+ *    Copyright (c) 2006, 2007 IBM Corp.
+ *    Josh Boyer <jwboyer@linux.vnet.ibm.com>, David Gibson <dwg@au1.ibm.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without
+ * any warranty of any kind, whether express or implied.
+ */
+
+/dts-v1/;
+
+/ {
+        #address-cells = <2>;
+        #size-cells = <1>;
+        model = "ibm,iss-4xx";
+        compatible = "ibm,iss-4xx";
+        dcr-parent = <&{/cpus/cpu@0}>;
+
+        aliases {
+                serial0 = &UART0;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                cpu@0 {
+                        device_type = "cpu";
+                        model = "PowerPC,4xx"; // real CPU changed in sim
+                        reg = <0x00000000>;
+                        clock-frequency = <100000000>; // 100Mhz :-)
+                        timebase-frequency = <100000000>;
+                        i-cache-line-size = <32>; // may need fixup in sim
+                        d-cache-line-size = <32>; // may need fixup in sim
+                        i-cache-size = <32768>; /* may need fixup in sim */
+                        d-cache-size = <32768>; /* may need fixup in sim */
+                        dcr-controller;
+                        dcr-access-method = "native";
+                };
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <0x00000000 0x00000000 0x00000000>; // Filled in by zImage
+        };
+
+        UIC0: interrupt-controller0 {
+                compatible = "ibm,uic-4xx", "ibm,uic";
+                interrupt-controller;
+                cell-index = <0>;
+                dcr-reg = <0x0c0 0x009>;
+                #address-cells = <0>;
+                #size-cells = <0>;
+                #interrupt-cells = <2>;
+
+        };
+
+        UIC1: interrupt-controller1 {
+                compatible = "ibm,uic-4xx", "ibm,uic";
+                interrupt-controller;
+                cell-index = <1>;
+                dcr-reg = <0x0d0 0x009>;
+                #address-cells = <0>;
+                #size-cells = <0>;
+                #interrupt-cells = <2>;
+                interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
+                interrupt-parent = <&UIC0>;
+        };
+
+        plb {
+                compatible = "ibm,plb-4xx", "ibm,plb4"; /* Could be PLB6, doesn't matter */
+                #address-cells = <2>;
+                #size-cells = <1>;
+                ranges;
+                clock-frequency = <0>; // Filled in by zImage
+
+                POB0: opb {
+                        compatible = "ibm,opb-4xx", "ibm,opb";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        /* Wish there was a nicer way of specifying a full 32-bit
+                           range */
+                        ranges = <0x00000000 0x00000001 0x00000000 0x80000000
+                                  0x80000000 0x00000001 0x80000000 0x80000000>;
+                        clock-frequency = <0>; // Filled in by zImage
+                        UART0: serial@40000200 {
+                                device_type = "serial";
+                                compatible = "ns16550a";
+                                reg = <0x40000200 0x00000008>;
+                                virtual-reg = <0xe0000200>;
+                                clock-frequency = <11059200>;
+                                current-speed = <115200>;
+                                interrupt-parent = <&UIC0>;
+                                interrupts = <0x0 0x4>;
+                        };
+                };
+        };
+
+        nvrtc {
+                compatible = "ds1743-nvram", "ds1743", "rtc-ds1743";
+                reg = <0 0xEF703000 0x2000>;
+        };
+        iss-block {
+                compatible = "ibm,iss-sim-block-device";
+                reg = <0 0xEF701000 0x1000>;
+        };
+
+        chosen {
+                linux,stdout-path = "/plb/opb/serial@40000200";
+        };
+};
diff --git a/arch/powerpc/boot/dts/mpc8315erdb.dts b/arch/powerpc/boot/dts/mpc8315erdb.dts
index 8a3a4f3ef831..4dd08c322979 100644
--- a/arch/powerpc/boot/dts/mpc8315erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8315erdb.dts
@@ -292,7 +292,7 @@
                         fsl,num-channels = <4>;
                         fsl,channel-fifo-len = <24>;
                         fsl,exec-units-mask = <0x97c>;
-                        fsl,descriptor-types-mask = <0x3ab0abf>;
+                        fsl,descriptor-types-mask = <0x3a30abf>;
                 };
 
                 sata@18000 {
@@ -463,4 +463,18 @@
                                   0 0x00800000>;
                 };
         };
+
+        leds {
+                compatible = "gpio-leds";
+
+                pwr {
+                        gpios = <&mcu_pio 0 0>;
+                        default-state = "on";
+                };
+
+                hdd {
+                        gpios = <&mcu_pio 1 0>;
+                        linux,default-trigger = "ide-disk";
+                };
+        };
 };
diff --git a/arch/powerpc/boot/dts/mpc8377_rdb.dts b/arch/powerpc/boot/dts/mpc8377_rdb.dts
index 9e2264b10008..dbc1b988b29d 100644
--- a/arch/powerpc/boot/dts/mpc8377_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts
@@ -486,4 +486,18 @@
                                   0 0x00800000>;
                 };
         };
+
+        leds {
+                compatible = "gpio-leds";
+
+                pwr {
+                        gpios = <&mcu_pio 0 0>;
+                        default-state = "on";
+                };
+
+                hdd {
+                        gpios = <&mcu_pio 1 0>;
+                        linux,default-trigger = "ide-disk";
+                };
+        };
 };
diff --git a/arch/powerpc/boot/dts/mpc8378_rdb.dts b/arch/powerpc/boot/dts/mpc8378_rdb.dts
index 4e6a1a407bbd..3447eb9f6e88 100644
--- a/arch/powerpc/boot/dts/mpc8378_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8378_rdb.dts
@@ -470,4 +470,18 @@
                                   0 0x00800000>;
                 };
         };
+
+        leds {
+                compatible = "gpio-leds";
+
+                pwr {
+                        gpios = <&mcu_pio 0 0>;
+                        default-state = "on";
+                };
+
+                hdd {
+                        gpios = <&mcu_pio 1 0>;
+                        linux,default-trigger = "ide-disk";
+                };
+        };
 };
diff --git a/arch/powerpc/boot/dts/mpc8379_rdb.dts b/arch/powerpc/boot/dts/mpc8379_rdb.dts
index 72336d504528..15560c619b04 100644
--- a/arch/powerpc/boot/dts/mpc8379_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8379_rdb.dts
@@ -436,4 +436,18 @@
                 compatible = "fsl,mpc8349-pci";
                 device_type = "pci";
         };
+
+        leds {
+                compatible = "gpio-leds";
+
+                pwr {
+                        gpios = <&mcu_pio 0 0>;
+                        default-state = "on";
+                };
+
+                hdd {
+                        gpios = <&mcu_pio 1 0>;
+                        linux,default-trigger = "ide-disk";
+                };
+        };
 };
diff --git a/arch/powerpc/boot/dts/p1020rdb.dts b/arch/powerpc/boot/dts/p1020rdb.dts
index df5269093af8..22f64b62d7f6 100644
--- a/arch/powerpc/boot/dts/p1020rdb.dts
+++ b/arch/powerpc/boot/dts/p1020rdb.dts
@@ -19,6 +19,9 @@
         aliases {
                 serial0 = &serial0;
                 serial1 = &serial1;
+                ethernet0 = &enet0;
+                ethernet1 = &enet1;
+                ethernet2 = &enet2;
                 pci0 = &pci0;
                 pci1 = &pci1;
         };
@@ -346,6 +349,122 @@
                         };
                 };
 
+                mdio@24000 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,etsec2-mdio";
+                        reg = <0x24000 0x1000 0xb0030 0x4>;
+
+                        phy0: ethernet-phy@0 {
+                                interrupt-parent = <&mpic>;
+                                interrupts = <3 1>;
+                                reg = <0x0>;
+                        };
+
+                        phy1: ethernet-phy@1 {
+                                interrupt-parent = <&mpic>;
+                                interrupts = <2 1>;
+                                reg = <0x1>;
+                        };
+                };
+
+                mdio@25000 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,etsec2-tbi";
+                        reg = <0x25000 0x1000 0xb1030 0x4>;
+
+                        tbi0: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
+                enet0: ethernet@b0000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "fsl,etsec2";
+                        fsl,num_rx_queues = <0x8>;
+                        fsl,num_tx_queues = <0x8>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupt-parent = <&mpic>;
+                        fixed-link = <1 1 1000 0 0>;
+                        phy-connection-type = "rgmii-id";
+
+                        queue-group@0 {
+                                #address-cells = <1>;
+                                #size-cells = <1>;
+                                reg = <0xb0000 0x1000>;
+                                interrupts = <29 2 30 2 34 2>;
+                        };
+
+                        queue-group@1 {
+                                #address-cells = <1>;
+                                #size-cells = <1>;
+                                reg = <0xb4000 0x1000>;
+                                interrupts = <17 2 18 2 24 2>;
+                        };
+                };
+
+                enet1: ethernet@b1000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "fsl,etsec2";
+                        fsl,num_rx_queues = <0x8>;
+                        fsl,num_tx_queues = <0x8>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupt-parent = <&mpic>;
+                        phy-handle = <&phy0>;
+                        tbi-handle = <&tbi0>;
+                        phy-connection-type = "sgmii";
+
+                        queue-group@0 {
+                                #address-cells = <1>;
+                                #size-cells = <1>;
+                                reg = <0xb1000 0x1000>;
+                                interrupts = <35 2 36 2 40 2>;
+                        };
+
+                        queue-group@1 {
+                                #address-cells = <1>;
+                                #size-cells = <1>;
+                                reg = <0xb5000 0x1000>;
+                                interrupts = <51 2 52 2 67 2>;
+                        };
+                };
+
+                enet2: ethernet@b2000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "fsl,etsec2";
+                        fsl,num_rx_queues = <0x8>;
+                        fsl,num_tx_queues = <0x8>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupt-parent = <&mpic>;
+                        phy-handle = <&phy1>;
+                        phy-connection-type = "rgmii-id";
+
+                        queue-group@0 {
+                                #address-cells = <1>;
+                                #size-cells = <1>;
+                                reg = <0xb2000 0x1000>;
+                                interrupts = <31 2 32 2 33 2>;
+                        };
+
+                        queue-group@1 {
+                                #address-cells = <1>;
+                                #size-cells = <1>;
+                                reg = <0xb6000 0x1000>;
+                                interrupts = <25 2 26 2 27 2>;
+                        };
+                };
+
                 usb@22000 {
                         #address-cells = <1>;
                         #size-cells = <0>;
@@ -356,6 +475,11 @@
                         phy_type = "ulpi";
                 };
 
+                /* USB2 is shared with localbus, so it must be disabled
+                   by default. We can't put 'status = "disabled";' here
+                   since U-Boot doesn't clear the status property when
+                   it enables USB2. OTOH, U-Boot does create a new node
+                   when there isn't any. So, just comment it out.
                 usb@23000 {
                         #address-cells = <1>;
                         #size-cells = <0>;
@@ -365,6 +489,7 @@
                         interrupts = <46 0x2>;
                         phy_type = "ulpi";
                 };
+                */
 
                 sdhci@2e000 {
                         compatible = "fsl,p1020-esdhc", "fsl,esdhc";