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-rw-r--r--arch/powerpc/boot/dts/amigaone.dts173
-rw-r--r--arch/powerpc/boot/dts/asp834x-redboot.dts82
-rw-r--r--arch/powerpc/boot/dts/canyonlands.dts35
-rw-r--r--arch/powerpc/boot/dts/cm5200.dts49
-rw-r--r--arch/powerpc/boot/dts/digsy_mtc.dts254
-rw-r--r--arch/powerpc/boot/dts/gef_ppc9a.dts367
-rw-r--r--arch/powerpc/boot/dts/gef_sbc310.dts367
-rw-r--r--arch/powerpc/boot/dts/gef_sbc610.dts41
-rw-r--r--arch/powerpc/boot/dts/kilauea.dts7
-rw-r--r--arch/powerpc/boot/dts/ksi8560.dts79
-rw-r--r--arch/powerpc/boot/dts/lite5200.dts52
-rw-r--r--arch/powerpc/boot/dts/lite5200b.dts63
-rw-r--r--arch/powerpc/boot/dts/media5200.dts318
-rw-r--r--arch/powerpc/boot/dts/motionpro.dts42
-rw-r--r--arch/powerpc/boot/dts/mpc8313erdb.dts11
-rw-r--r--arch/powerpc/boot/dts/mpc8315erdb.dts144
-rw-r--r--arch/powerpc/boot/dts/mpc832x_rdb.dts24
-rw-r--r--arch/powerpc/boot/dts/mpc8349emitx.dts69
-rw-r--r--arch/powerpc/boot/dts/mpc8349emitxgp.dts42
-rw-r--r--arch/powerpc/boot/dts/mpc834x_mds.dts81
-rw-r--r--arch/powerpc/boot/dts/mpc8377_mds.dts211
-rw-r--r--arch/powerpc/boot/dts/mpc8377_rdb.dts229
-rw-r--r--arch/powerpc/boot/dts/mpc8378_mds.dts209
-rw-r--r--arch/powerpc/boot/dts/mpc8378_rdb.dts229
-rw-r--r--arch/powerpc/boot/dts/mpc8379_mds.dts146
-rw-r--r--arch/powerpc/boot/dts/mpc8379_rdb.dts164
-rw-r--r--arch/powerpc/boot/dts/mpc8536ds.dts78
-rw-r--r--arch/powerpc/boot/dts/mpc8540ads.dts117
-rw-r--r--arch/powerpc/boot/dts/mpc8541cds.dts78
-rw-r--r--arch/powerpc/boot/dts/mpc8544ds.dts81
-rw-r--r--arch/powerpc/boot/dts/mpc8548cds.dts156
-rw-r--r--arch/powerpc/boot/dts/mpc8555cds.dts78
-rw-r--r--arch/powerpc/boot/dts/mpc8560ads.dts102
-rw-r--r--arch/powerpc/boot/dts/mpc8568mds.dts102
-rw-r--r--arch/powerpc/boot/dts/mpc8572ds.dts160
-rw-r--r--arch/powerpc/boot/dts/mpc8572ds_36b.dts799
-rw-r--r--arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts49
-rw-r--r--arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts6
-rw-r--r--arch/powerpc/boot/dts/mpc8610_hpcd.dts2
-rw-r--r--arch/powerpc/boot/dts/mpc8641_hpcn.dts157
-rw-r--r--arch/powerpc/boot/dts/pcm030.dts182
-rw-r--r--arch/powerpc/boot/dts/pcm032.dts392
-rw-r--r--arch/powerpc/boot/dts/redwood.dts244
-rw-r--r--arch/powerpc/boot/dts/sbc8349.dts80
-rw-r--r--arch/powerpc/boot/dts/sbc8548.dts78
-rw-r--r--arch/powerpc/boot/dts/sbc8560.dts100
-rw-r--r--arch/powerpc/boot/dts/sbc8641d.dts156
-rw-r--r--arch/powerpc/boot/dts/socrates.dts338
-rw-r--r--arch/powerpc/boot/dts/stx_gp3_8560.dts78
-rw-r--r--arch/powerpc/boot/dts/tqm5200.dts32
-rw-r--r--arch/powerpc/boot/dts/tqm8540.dts122
-rw-r--r--arch/powerpc/boot/dts/tqm8541.dts95
-rw-r--r--arch/powerpc/boot/dts/tqm8548-bigflash.dts177
-rw-r--r--arch/powerpc/boot/dts/tqm8548.dts177
-rw-r--r--arch/powerpc/boot/dts/tqm8555.dts95
-rw-r--r--arch/powerpc/boot/dts/tqm8560.dts99
-rw-r--r--arch/powerpc/boot/dts/virtex440-ml507.dts124
57 files changed, 6058 insertions, 1964 deletions
diff --git a/arch/powerpc/boot/dts/amigaone.dts b/arch/powerpc/boot/dts/amigaone.dts
new file mode 100644
index 000000000000..26549fca2ed4
--- /dev/null
+++ b/arch/powerpc/boot/dts/amigaone.dts
@@ -0,0 +1,173 @@
1/*
2 * AmigaOne Device Tree Source
3 *
4 * Copyright 2008 Gerhard Pircher (gerhard_pircher@gmx.net)
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/dts-v1/;
13
14/ {
15 model = "AmigaOne";
16 compatible = "eyetech,amigaone";
17 coherency-off;
18 #address-cells = <1>;
19 #size-cells = <1>;
20
21 cpus {
22 #cpus = <1>;
23 #address-cells = <1>;
24 #size-cells = <0>;
25
26 cpu@0 {
27 device_type = "cpu";
28 reg = <0>;
29 d-cache-line-size = <32>; // 32 bytes
30 i-cache-line-size = <32>; // 32 bytes
31 d-cache-size = <32768>; // L1, 32K
32 i-cache-size = <32768>; // L1, 32K
33 timebase-frequency = <0>; // 33.3 MHz, from U-boot
34 clock-frequency = <0>; // From U-boot
35 bus-frequency = <0>; // From U-boot
36 };
37 };
38
39 memory {
40 device_type = "memory";
41 reg = <0 0>; // From U-boot
42 };
43
44 pci@80000000 {
45 device_type = "pci";
46 compatible = "mai-logic,articia-s";
47 bus-frequency = <33333333>;
48 bus-range = <0 0xff>;
49 ranges = <0x01000000 0 0x00000000 0xfe000000 0 0x00c00000 // PCI I/O
50 0x02000000 0 0x80000000 0x80000000 0 0x7d000000 // PCI memory
51 0x02000000 0 0x00000000 0xfd000000 0 0x01000000>; // PCI alias memory (ISA)
52 // Configuration address and data register.
53 reg = <0xfec00cf8 4
54 0xfee00cfc 4>;
55 8259-interrupt-acknowledge = <0xfef00000>;
56 // Do not define a interrupt-parent here, if there is no
57 // interrupt-map property.
58 #address-cells = <3>;
59 #size-cells = <2>;
60
61 isa@7 {
62 device_type = "isa";
63 compatible = "pciclass,0601";
64 vendor-id = <0x00001106>;
65 device-id = <0x00000686>;
66 revision-id = <0x00000010>;
67 class-code = <0x00060100>;
68 subsystem-id = <0>;
69 subsystem-vendor-id = <0>;
70 devsel-speed = <0x00000001>;
71 min-grant = <0>;
72 max-latency = <0>;
73 /* First 64k for I/O at 0x0 on PCI mapped to 0x0 on ISA. */
74 ranges = <0x00000001 0 0x01000000 0 0x00000000 0x00010000>;
75 interrupt-parent = <&i8259>;
76 #interrupt-cells = <2>;
77 #address-cells = <2>;
78 #size-cells = <1>;
79
80 dma-controller@0 {
81 compatible = "pnpPNP,200";
82 reg = <1 0x00000000 0x00000020
83 1 0x00000080 0x00000010
84 1 0x000000c0 0x00000020>;
85 };
86
87 i8259: interrupt-controller@20 {
88 device_type = "interrupt-controller";
89 compatible = "pnpPNP,000";
90 interrupt-controller;
91 reg = <1 0x00000020 0x00000002
92 1 0x000000a0 0x00000002
93 1 0x000004d0 0x00000002>;
94 reserved-interrupts = <2>;
95 #interrupt-cells = <2>;
96 };
97
98 timer@40 {
99 // Also adds pcspkr to platform devices.
100 compatible = "pnpPNP,100";
101 reg = <1 0x00000040 0x00000020>;
102 };
103
104 8042@60 {
105 device_type = "8042";
106 reg = <1 0x00000060 0x00000001
107 1 0x00000064 0x00000001>;
108 interrupts = <1 3 12 3>;
109 #address-cells = <1>;
110 #size-cells = <0>;
111
112 keyboard@0 {
113 compatible = "pnpPNP,303";
114 reg = <0>;
115 };
116
117 mouse@1 {
118 compatible = "pnpPNP,f03";
119 reg = <1>;
120 };
121 };
122
123 rtc@70 {
124 compatible = "pnpPNP,b00";
125 reg = <1 0x00000070 0x00000002>;
126 interrupts = <8 3>;
127 };
128
129 serial@3f8 {
130 device_type = "serial";
131 compatible = "pnpPNP,501","pnpPNP,500";
132 reg = <1 0x000003f8 0x00000008>;
133 interrupts = <4 3>;
134 clock-frequency = <1843200>;
135 current-speed = <115200>;
136 };
137
138 serial@2f8 {
139 device_type = "serial";
140 compatible = "pnpPNP,501","pnpPNP,500";
141 reg = <1 0x000002f8 0x00000008>;
142 interrupts = <3 3>;
143 clock-frequency = <1843200>;
144 current-speed = <115200>;
145 };
146
147 parallel@378 {
148 device_type = "parallel";
149 // No ECP support for now, otherwise add "pnpPNP,401".
150 compatible = "pnpPNP,400";
151 reg = <1 0x00000378 0x00000003
152 1 0x00000778 0x00000003>;
153 };
154
155 fdc@3f0 {
156 device_type = "fdc";
157 compatible = "pnpPNP,700";
158 reg = <1 0x000003f0 0x00000008>;
159 interrupts = <6 3>;
160 #address-cells = <1>;
161 #size-cells = <0>;
162
163 disk@0 {
164 reg = <0>;
165 };
166 };
167 };
168 };
169
170 chosen {
171 linux,stdout-path = "/pci@80000000/isa@7/serial@3f8";
172 };
173};
diff --git a/arch/powerpc/boot/dts/asp834x-redboot.dts b/arch/powerpc/boot/dts/asp834x-redboot.dts
index 524af7ef9f26..7da84fd7be93 100644
--- a/arch/powerpc/boot/dts/asp834x-redboot.dts
+++ b/arch/powerpc/boot/dts/asp834x-redboot.dts
@@ -181,70 +181,76 @@
181 phy_type = "ulpi"; 181 phy_type = "ulpi";
182 }; 182 };
183 183
184 mdio@24520 {
185 #address-cells = <1>;
186 #size-cells = <0>;
187 compatible = "fsl,gianfar-mdio";
188 reg = <0x24520 0x20>;
189
190 phy0: ethernet-phy@0 {
191 interrupt-parent = <&ipic>;
192 interrupts = <17 0x8>;
193 reg = <0x1>;
194 device_type = "ethernet-phy";
195 };
196 phy1: ethernet-phy@1 {
197 interrupt-parent = <&ipic>;
198 interrupts = <18 0x8>;
199 reg = <0x2>;
200 device_type = "ethernet-phy";
201 };
202
203 tbi0: tbi-phy@11 {
204 reg = <0x11>;
205 device_type = "tbi-phy";
206 };
207 };
208
209 mdio@25520 {
210 #address-cells = <1>;
211 #size-cells = <0>;
212 compatible = "fsl,gianfar-tbi";
213 reg = <0x25520 0x20>;
214
215 tbi1: tbi-phy@11 {
216 reg = <0x11>;
217 device_type = "tbi-phy";
218 };
219 };
220
221
222 enet0: ethernet@24000 { 184 enet0: ethernet@24000 {
185 #address-cells = <1>;
186 #size-cells = <1>;
223 cell-index = <0>; 187 cell-index = <0>;
224 device_type = "network"; 188 device_type = "network";
225 model = "TSEC"; 189 model = "TSEC";
226 compatible = "gianfar"; 190 compatible = "gianfar";
227 reg = <0x24000 0x1000>; 191 reg = <0x24000 0x1000>;
192 ranges = <0x0 0x24000 0x1000>;
228 local-mac-address = [ 00 08 e5 11 32 33 ]; 193 local-mac-address = [ 00 08 e5 11 32 33 ];
229 interrupts = <32 0x8 33 0x8 34 0x8>; 194 interrupts = <32 0x8 33 0x8 34 0x8>;
230 interrupt-parent = <&ipic>; 195 interrupt-parent = <&ipic>;
231 tbi-handle = <&tbi0>; 196 tbi-handle = <&tbi0>;
232 phy-handle = <&phy0>; 197 phy-handle = <&phy0>;
233 linux,network-index = <0>; 198 linux,network-index = <0>;
199
200 mdio@520 {
201 #address-cells = <1>;
202 #size-cells = <0>;
203 compatible = "fsl,gianfar-mdio";
204 reg = <0x520 0x20>;
205
206 phy0: ethernet-phy@0 {
207 interrupt-parent = <&ipic>;
208 interrupts = <17 0x8>;
209 reg = <0x1>;
210 device_type = "ethernet-phy";
211 };
212
213 phy1: ethernet-phy@1 {
214 interrupt-parent = <&ipic>;
215 interrupts = <18 0x8>;
216 reg = <0x2>;
217 device_type = "ethernet-phy";
218 };
219
220 tbi0: tbi-phy@11 {
221 reg = <0x11>;
222 device_type = "tbi-phy";
223 };
224 };
234 }; 225 };
235 226
236 enet1: ethernet@25000 { 227 enet1: ethernet@25000 {
228 #address-cells = <1>;
229 #size-cells = <1>;
237 cell-index = <1>; 230 cell-index = <1>;
238 device_type = "network"; 231 device_type = "network";
239 model = "TSEC"; 232 model = "TSEC";
240 compatible = "gianfar"; 233 compatible = "gianfar";
241 reg = <0x25000 0x1000>; 234 reg = <0x25000 0x1000>;
235 ranges = <0x0 0x25000 0x1000>;
242 local-mac-address = [ 00 08 e5 11 32 34 ]; 236 local-mac-address = [ 00 08 e5 11 32 34 ];
243 interrupts = <35 0x8 36 0x8 37 0x8>; 237 interrupts = <35 0x8 36 0x8 37 0x8>;
244 interrupt-parent = <&ipic>; 238 interrupt-parent = <&ipic>;
245 tbi-handle = <&tbi1>; 239 tbi-handle = <&tbi1>;
246 phy-handle = <&phy1>; 240 phy-handle = <&phy1>;
247 linux,network-index = <1>; 241 linux,network-index = <1>;
242
243 mdio@520 {
244 #address-cells = <1>;
245 #size-cells = <0>;
246 compatible = "fsl,gianfar-tbi";
247 reg = <0x520 0x20>;
248
249 tbi1: tbi-phy@11 {
250 reg = <0x11>;
251 device_type = "tbi-phy";
252 };
253 };
248 }; 254 };
249 255
250 serial0: serial@4500 { 256 serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/canyonlands.dts b/arch/powerpc/boot/dts/canyonlands.dts
index 8b5ba8261a36..5fd1ad09bdf2 100644
--- a/arch/powerpc/boot/dts/canyonlands.dts
+++ b/arch/powerpc/boot/dts/canyonlands.dts
@@ -127,6 +127,13 @@
127 dcr-reg = <0x010 0x002>; 127 dcr-reg = <0x010 0x002>;
128 }; 128 };
129 129
130 CRYPTO: crypto@180000 {
131 compatible = "amcc,ppc460ex-crypto", "amcc,ppc4xx-crypto";
132 reg = <4 0x00180000 0x80400>;
133 interrupt-parent = <&UIC0>;
134 interrupts = <0x1d 0x4>;
135 };
136
130 MAL0: mcmal { 137 MAL0: mcmal {
131 compatible = "ibm,mcmal-460ex", "ibm,mcmal2"; 138 compatible = "ibm,mcmal-460ex", "ibm,mcmal2";
132 dcr-reg = <0x180 0x062>; 139 dcr-reg = <0x180 0x062>;
@@ -142,6 +149,20 @@
142 /*RXDE*/ 0x5 0x4>; 149 /*RXDE*/ 0x5 0x4>;
143 }; 150 };
144 151
152 USB0: ehci@bffd0400 {
153 compatible = "ibm,usb-ehci-460ex", "usb-ehci";
154 interrupt-parent = <&UIC2>;
155 interrupts = <0x1d 4>;
156 reg = <4 0xbffd0400 0x90 4 0xbffd0490 0x70>;
157 };
158
159 USB1: usb@bffd0000 {
160 compatible = "ohci-le";
161 reg = <4 0xbffd0000 0x60>;
162 interrupt-parent = <&UIC2>;
163 interrupts = <0x1e 4>;
164 };
165
145 POB0: opb { 166 POB0: opb {
146 compatible = "ibm,opb-460ex", "ibm,opb"; 167 compatible = "ibm,opb-460ex", "ibm,opb";
147 #address-cells = <1>; 168 #address-cells = <1>;
@@ -245,6 +266,20 @@
245 reg = <0xef600700 0x00000014>; 266 reg = <0xef600700 0x00000014>;
246 interrupt-parent = <&UIC0>; 267 interrupt-parent = <&UIC0>;
247 interrupts = <0x2 0x4>; 268 interrupts = <0x2 0x4>;
269 #address-cells = <1>;
270 #size-cells = <0>;
271 rtc@68 {
272 compatible = "stm,m41t80";
273 reg = <0x68>;
274 interrupt-parent = <&UIC2>;
275 interrupts = <0x19 0x8>;
276 };
277 sttm@48 {
278 compatible = "ad,ad7414";
279 reg = <0x48>;
280 interrupt-parent = <&UIC1>;
281 interrupts = <0x14 0x8>;
282 };
248 }; 283 };
249 284
250 IIC1: i2c@ef600800 { 285 IIC1: i2c@ef600800 {
diff --git a/arch/powerpc/boot/dts/cm5200.dts b/arch/powerpc/boot/dts/cm5200.dts
index 2f74cc4e093e..cee8080aa245 100644
--- a/arch/powerpc/boot/dts/cm5200.dts
+++ b/arch/powerpc/boot/dts/cm5200.dts
@@ -17,6 +17,7 @@
17 compatible = "schindler,cm5200"; 17 compatible = "schindler,cm5200";
18 #address-cells = <1>; 18 #address-cells = <1>;
19 #size-cells = <1>; 19 #size-cells = <1>;
20 interrupt-parent = <&mpc5200_pic>;
20 21
21 cpus { 22 cpus {
22 #address-cells = <1>; 23 #address-cells = <1>;
@@ -66,7 +67,6 @@
66 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 67 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
67 reg = <0x600 0x10>; 68 reg = <0x600 0x10>;
68 interrupts = <1 9 0>; 69 interrupts = <1 9 0>;
69 interrupt-parent = <&mpc5200_pic>;
70 fsl,has-wdt; 70 fsl,has-wdt;
71 }; 71 };
72 72
@@ -74,84 +74,76 @@
74 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 74 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
75 reg = <0x610 0x10>; 75 reg = <0x610 0x10>;
76 interrupts = <1 10 0>; 76 interrupts = <1 10 0>;
77 interrupt-parent = <&mpc5200_pic>;
78 }; 77 };
79 78
80 timer@620 { // General Purpose Timer 79 timer@620 { // General Purpose Timer
81 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 80 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
82 reg = <0x620 0x10>; 81 reg = <0x620 0x10>;
83 interrupts = <1 11 0>; 82 interrupts = <1 11 0>;
84 interrupt-parent = <&mpc5200_pic>;
85 }; 83 };
86 84
87 timer@630 { // General Purpose Timer 85 timer@630 { // General Purpose Timer
88 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 86 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
89 reg = <0x630 0x10>; 87 reg = <0x630 0x10>;
90 interrupts = <1 12 0>; 88 interrupts = <1 12 0>;
91 interrupt-parent = <&mpc5200_pic>;
92 }; 89 };
93 90
94 timer@640 { // General Purpose Timer 91 timer@640 { // General Purpose Timer
95 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 92 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
96 reg = <0x640 0x10>; 93 reg = <0x640 0x10>;
97 interrupts = <1 13 0>; 94 interrupts = <1 13 0>;
98 interrupt-parent = <&mpc5200_pic>;
99 }; 95 };
100 96
101 timer@650 { // General Purpose Timer 97 timer@650 { // General Purpose Timer
102 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 98 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
103 reg = <0x650 0x10>; 99 reg = <0x650 0x10>;
104 interrupts = <1 14 0>; 100 interrupts = <1 14 0>;
105 interrupt-parent = <&mpc5200_pic>;
106 }; 101 };
107 102
108 timer@660 { // General Purpose Timer 103 timer@660 { // General Purpose Timer
109 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 104 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
110 reg = <0x660 0x10>; 105 reg = <0x660 0x10>;
111 interrupts = <1 15 0>; 106 interrupts = <1 15 0>;
112 interrupt-parent = <&mpc5200_pic>;
113 }; 107 };
114 108
115 timer@670 { // General Purpose Timer 109 timer@670 { // General Purpose Timer
116 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 110 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
117 reg = <0x670 0x10>; 111 reg = <0x670 0x10>;
118 interrupts = <1 16 0>; 112 interrupts = <1 16 0>;
119 interrupt-parent = <&mpc5200_pic>;
120 }; 113 };
121 114
122 rtc@800 { // Real time clock 115 rtc@800 { // Real time clock
123 compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc"; 116 compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
124 reg = <0x800 0x100>; 117 reg = <0x800 0x100>;
125 interrupts = <1 5 0 1 6 0>; 118 interrupts = <1 5 0 1 6 0>;
126 interrupt-parent = <&mpc5200_pic>;
127 }; 119 };
128 120
129 gpio@b00 { 121 gpio_simple: gpio@b00 {
130 compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio"; 122 compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
131 reg = <0xb00 0x40>; 123 reg = <0xb00 0x40>;
132 interrupts = <1 7 0>; 124 interrupts = <1 7 0>;
133 interrupt-parent = <&mpc5200_pic>; 125 gpio-controller;
126 #gpio-cells = <2>;
134 }; 127 };
135 128
136 gpio@c00 { 129 gpio_wkup: gpio@c00 {
137 compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup"; 130 compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
138 reg = <0xc00 0x40>; 131 reg = <0xc00 0x40>;
139 interrupts = <1 8 0 0 3 0>; 132 interrupts = <1 8 0 0 3 0>;
140 interrupt-parent = <&mpc5200_pic>; 133 gpio-controller;
134 #gpio-cells = <2>;
141 }; 135 };
142 136
143 spi@f00 { 137 spi@f00 {
144 compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi"; 138 compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
145 reg = <0xf00 0x20>; 139 reg = <0xf00 0x20>;
146 interrupts = <2 13 0 2 14 0>; 140 interrupts = <2 13 0 2 14 0>;
147 interrupt-parent = <&mpc5200_pic>;
148 }; 141 };
149 142
150 usb@1000 { 143 usb@1000 {
151 compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be"; 144 compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
152 reg = <0x1000 0xff>; 145 reg = <0x1000 0xff>;
153 interrupts = <2 6 0>; 146 interrupts = <2 6 0>;
154 interrupt-parent = <&mpc5200_pic>;
155 }; 147 };
156 148
157 dma-controller@1200 { 149 dma-controller@1200 {
@@ -161,7 +153,6 @@
161 3 4 0 3 5 0 3 6 0 3 7 0 153 3 4 0 3 5 0 3 6 0 3 7 0
162 3 8 0 3 9 0 3 10 0 3 11 0 154 3 8 0 3 9 0 3 10 0 3 11 0
163 3 12 0 3 13 0 3 14 0 3 15 0>; 155 3 12 0 3 13 0 3 14 0 3 15 0>;
164 interrupt-parent = <&mpc5200_pic>;
165 }; 156 };
166 157
167 xlb@1f00 { 158 xlb@1f00 {
@@ -170,48 +161,34 @@
170 }; 161 };
171 162
172 serial@2000 { // PSC1 163 serial@2000 { // PSC1
173 device_type = "serial";
174 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; 164 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
175 port-number = <0>; // Logical port assignment
176 reg = <0x2000 0x100>; 165 reg = <0x2000 0x100>;
177 interrupts = <2 1 0>; 166 interrupts = <2 1 0>;
178 interrupt-parent = <&mpc5200_pic>;
179 }; 167 };
180 168
181 serial@2200 { // PSC2 169 serial@2200 { // PSC2
182 device_type = "serial"; 170 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
183 compatible = "fsl,mpc5200-psc-uart";
184 port-number = <1>; // Logical port assignment
185 reg = <0x2200 0x100>; 171 reg = <0x2200 0x100>;
186 interrupts = <2 2 0>; 172 interrupts = <2 2 0>;
187 interrupt-parent = <&mpc5200_pic>;
188 }; 173 };
189 174
190 serial@2400 { // PSC3 175 serial@2400 { // PSC3
191 device_type = "serial"; 176 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
192 compatible = "fsl,mpc5200-psc-uart";
193 port-number = <2>; // Logical port assignment
194 reg = <0x2400 0x100>; 177 reg = <0x2400 0x100>;
195 interrupts = <2 3 0>; 178 interrupts = <2 3 0>;
196 interrupt-parent = <&mpc5200_pic>;
197 }; 179 };
198 180
199 serial@2c00 { // PSC6 181 serial@2c00 { // PSC6
200 device_type = "serial";
201 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; 182 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
202 port-number = <5>; // Logical port assignment
203 reg = <0x2c00 0x100>; 183 reg = <0x2c00 0x100>;
204 interrupts = <2 4 0>; 184 interrupts = <2 4 0>;
205 interrupt-parent = <&mpc5200_pic>;
206 }; 185 };
207 186
208 ethernet@3000 { 187 ethernet@3000 {
209 device_type = "network";
210 compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec"; 188 compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
211 reg = <0x3000 0x400>; 189 reg = <0x3000 0x400>;
212 local-mac-address = [ 00 00 00 00 00 00 ]; 190 local-mac-address = [ 00 00 00 00 00 00 ];
213 interrupts = <2 5 0>; 191 interrupts = <2 5 0>;
214 interrupt-parent = <&mpc5200_pic>;
215 phy-handle = <&phy0>; 192 phy-handle = <&phy0>;
216 }; 193 };
217 194
@@ -221,10 +198,8 @@
221 compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio"; 198 compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
222 reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts 199 reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
223 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. 200 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
224 interrupt-parent = <&mpc5200_pic>;
225 201
226 phy0: ethernet-phy@0 { 202 phy0: ethernet-phy@0 {
227 device_type = "ethernet-phy";
228 reg = <0>; 203 reg = <0>;
229 }; 204 };
230 }; 205 };
@@ -235,7 +210,6 @@
235 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; 210 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
236 reg = <0x3d40 0x40>; 211 reg = <0x3d40 0x40>;
237 interrupts = <2 16 0>; 212 interrupts = <2 16 0>;
238 interrupt-parent = <&mpc5200_pic>;
239 fsl5200-clocking; 213 fsl5200-clocking;
240 }; 214 };
241 215
@@ -245,9 +219,8 @@
245 }; 219 };
246 }; 220 };
247 221
248 lpb { 222 localbus {
249 model = "fsl,lpb"; 223 compatible = "fsl,mpc5200b-lpb","simple-bus";
250 compatible = "fsl,lpb";
251 #address-cells = <2>; 224 #address-cells = <2>;
252 #size-cells = <1>; 225 #size-cells = <1>;
253 ranges = <0 0 0xfc000000 0x2000000>; 226 ranges = <0 0 0xfc000000 0x2000000>;
diff --git a/arch/powerpc/boot/dts/digsy_mtc.dts b/arch/powerpc/boot/dts/digsy_mtc.dts
new file mode 100644
index 000000000000..4c36186ef946
--- /dev/null
+++ b/arch/powerpc/boot/dts/digsy_mtc.dts
@@ -0,0 +1,254 @@
1/*
2 * Digsy MTC board Device Tree Source
3 *
4 * Copyright (C) 2009 Semihalf
5 *
6 * Based on the CM5200 by M. Balakowicz
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14/dts-v1/;
15
16/ {
17 model = "intercontrol,digsy-mtc";
18 compatible = "intercontrol,digsy-mtc";
19 #address-cells = <1>;
20 #size-cells = <1>;
21 interrupt-parent = <&mpc5200_pic>;
22
23 cpus {
24 #address-cells = <1>;
25 #size-cells = <0>;
26
27 PowerPC,5200@0 {
28 device_type = "cpu";
29 reg = <0>;
30 d-cache-line-size = <32>;
31 i-cache-line-size = <32>;
32 d-cache-size = <0x4000>; // L1, 16K
33 i-cache-size = <0x4000>; // L1, 16K
34 timebase-frequency = <0>; // from bootloader
35 bus-frequency = <0>; // from bootloader
36 clock-frequency = <0>; // from bootloader
37 };
38 };
39
40 memory {
41 device_type = "memory";
42 reg = <0x00000000 0x02000000>; // 32MB
43 };
44
45 soc5200@f0000000 {
46 #address-cells = <1>;
47 #size-cells = <1>;
48 compatible = "fsl,mpc5200b-immr";
49 ranges = <0 0xf0000000 0x0000c000>;
50 reg = <0xf0000000 0x00000100>;
51 bus-frequency = <0>; // from bootloader
52 system-frequency = <0>; // from bootloader
53
54 cdm@200 {
55 compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
56 reg = <0x200 0x38>;
57 };
58
59 mpc5200_pic: interrupt-controller@500 {
60 // 5200 interrupts are encoded into two levels;
61 interrupt-controller;
62 #interrupt-cells = <3>;
63 compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
64 reg = <0x500 0x80>;
65 };
66
67 timer@600 { // General Purpose Timer
68 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
69 reg = <0x600 0x10>;
70 interrupts = <1 9 0>;
71 fsl,has-wdt;
72 };
73
74 timer@610 { // General Purpose Timer
75 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
76 reg = <0x610 0x10>;
77 interrupts = <1 10 0>;
78 };
79
80 timer@620 { // General Purpose Timer
81 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
82 reg = <0x620 0x10>;
83 interrupts = <1 11 0>;
84 };
85
86 timer@630 { // General Purpose Timer
87 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
88 reg = <0x630 0x10>;
89 interrupts = <1 12 0>;
90 };
91
92 timer@640 { // General Purpose Timer
93 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
94 reg = <0x640 0x10>;
95 interrupts = <1 13 0>;
96 };
97
98 timer@650 { // General Purpose Timer
99 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
100 reg = <0x650 0x10>;
101 interrupts = <1 14 0>;
102 };
103
104 timer@660 { // General Purpose Timer
105 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
106 reg = <0x660 0x10>;
107 interrupts = <1 15 0>;
108 };
109
110 timer@670 { // General Purpose Timer
111 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
112 reg = <0x670 0x10>;
113 interrupts = <1 16 0>;
114 };
115
116 gpio_simple: gpio@b00 {
117 compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
118 reg = <0xb00 0x40>;
119 interrupts = <1 7 0>;
120 gpio-controller;
121 #gpio-cells = <2>;
122 };
123
124 gpio_wkup: gpio@c00 {
125 compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
126 reg = <0xc00 0x40>;
127 interrupts = <1 8 0 0 3 0>;
128 gpio-controller;
129 #gpio-cells = <2>;
130 };
131
132 spi@f00 {
133 compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
134 reg = <0xf00 0x20>;
135 interrupts = <2 13 0 2 14 0>;
136 };
137
138 usb@1000 {
139 compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
140 reg = <0x1000 0xff>;
141 interrupts = <2 6 0>;
142 };
143
144 dma-controller@1200 {
145 compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
146 reg = <0x1200 0x80>;
147 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
148 3 4 0 3 5 0 3 6 0 3 7 0
149 3 8 0 3 9 0 3 10 0 3 11 0
150 3 12 0 3 13 0 3 14 0 3 15 0>;
151 };
152
153 xlb@1f00 {
154 compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
155 reg = <0x1f00 0x100>;
156 };
157
158 serial@2600 { // PSC4
159 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
160 reg = <0x2600 0x100>;
161 interrupts = <2 11 0>;
162 };
163
164 serial@2800 { // PSC5
165 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
166 reg = <0x2800 0x100>;
167 interrupts = <2 12 0>;
168 };
169
170 ethernet@3000 {
171 compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
172 reg = <0x3000 0x400>;
173 local-mac-address = [ 00 00 00 00 00 00 ];
174 interrupts = <2 5 0>;
175 phy-handle = <&phy0>;
176 };
177
178 mdio@3000 {
179 #address-cells = <1>;
180 #size-cells = <0>;
181 compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
182 reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
183 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
184
185 phy0: ethernet-phy@0 {
186 reg = <0>;
187 };
188 };
189
190 ata@3a00 {
191 compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
192 reg = <0x3a00 0x100>;
193 interrupts = <2 7 0>;
194 };
195
196 i2c@3d00 {
197 #address-cells = <1>;
198 #size-cells = <0>;
199 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
200 reg = <0x3d00 0x40>;
201 interrupts = <2 15 0>;
202 fsl5200-clocking;
203
204 rtc@50 {
205 compatible = "at,24c08";
206 reg = <0x50>;
207 };
208
209 rtc@68 {
210 compatible = "dallas,ds1339";
211 reg = <0x68>;
212 };
213 };
214
215 sram@8000 {
216 compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
217 reg = <0x8000 0x4000>;
218 };
219 };
220
221 lpb {
222 compatible = "fsl,mpc5200b-lpb","simple-bus";
223 #address-cells = <2>;
224 #size-cells = <1>;
225 ranges = <0 0 0xff000000 0x1000000>;
226
227 // 16-bit flash device at LocalPlus Bus CS0
228 flash@0,0 {
229 compatible = "cfi-flash";
230 reg = <0 0 0x1000000>;
231 bank-width = <2>;
232 device-width = <2>;
233 #size-cells = <1>;
234 #address-cells = <1>;
235
236 partition@0 {
237 label = "kernel";
238 reg = <0x0 0x00200000>;
239 };
240 partition@200000 {
241 label = "root";
242 reg = <0x00200000 0x00300000>;
243 };
244 partition@500000 {
245 label = "user";
246 reg = <0x00500000 0x00a00000>;
247 };
248 partition@f00000 {
249 label = "u-boot";
250 reg = <0x00f00000 0x100000>;
251 };
252 };
253 };
254};
diff --git a/arch/powerpc/boot/dts/gef_ppc9a.dts b/arch/powerpc/boot/dts/gef_ppc9a.dts
new file mode 100644
index 000000000000..d47ad0718759
--- /dev/null
+++ b/arch/powerpc/boot/dts/gef_ppc9a.dts
@@ -0,0 +1,367 @@
1/*
2 * GE Fanuc PPC9A Device Tree Source
3 *
4 * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * Based on: SBS CM6 Device Tree Source
12 * Copyright 2007 SBS Technologies GmbH & Co. KG
13 * And: mpc8641_hpcn.dts (MPC8641 HPCN Device Tree Source)
14 * Copyright 2006 Freescale Semiconductor Inc.
15 */
16
17/*
18 * Compiled with dtc -I dts -O dtb -o gef_ppc9a.dtb gef_ppc9a.dts
19 */
20
21/dts-v1/;
22
23/ {
24 model = "GEF_PPC9A";
25 compatible = "gef,ppc9a";
26 #address-cells = <1>;
27 #size-cells = <1>;
28
29 aliases {
30 ethernet0 = &enet0;
31 ethernet1 = &enet1;
32 serial0 = &serial0;
33 serial1 = &serial1;
34 pci0 = &pci0;
35 };
36
37 cpus {
38 #address-cells = <1>;
39 #size-cells = <0>;
40
41 PowerPC,8641@0 {
42 device_type = "cpu";
43 reg = <0>;
44 d-cache-line-size = <32>; // 32 bytes
45 i-cache-line-size = <32>; // 32 bytes
46 d-cache-size = <32768>; // L1, 32K
47 i-cache-size = <32768>; // L1, 32K
48 timebase-frequency = <0>; // From uboot
49 bus-frequency = <0>; // From uboot
50 clock-frequency = <0>; // From uboot
51 };
52 PowerPC,8641@1 {
53 device_type = "cpu";
54 reg = <1>;
55 d-cache-line-size = <32>; // 32 bytes
56 i-cache-line-size = <32>; // 32 bytes
57 d-cache-size = <32768>; // L1, 32K
58 i-cache-size = <32768>; // L1, 32K
59 timebase-frequency = <0>; // From uboot
60 bus-frequency = <0>; // From uboot
61 clock-frequency = <0>; // From uboot
62 };
63 };
64
65 memory {
66 device_type = "memory";
67 reg = <0x0 0x40000000>; // set by uboot
68 };
69
70 localbus@fef05000 {
71 #address-cells = <2>;
72 #size-cells = <1>;
73 compatible = "fsl,mpc8641-localbus", "simple-bus";
74 reg = <0xfef05000 0x1000>;
75 interrupts = <19 2>;
76 interrupt-parent = <&mpic>;
77
78 ranges = <0 0 0xff000000 0x01000000 // 16MB Boot flash
79 1 0 0xe8000000 0x08000000 // Paged Flash 0
80 2 0 0xe0000000 0x08000000 // Paged Flash 1
81 3 0 0xfc100000 0x00020000 // NVRAM
82 4 0 0xfc000000 0x00008000 // FPGA
83 5 0 0xfc008000 0x00008000 // AFIX FPGA
84 6 0 0xfd000000 0x00800000 // IO FPGA (8-bit)
85 7 0 0xfd800000 0x00800000>; // IO FPGA (32-bit)
86
87 /* flash@0,0 is a mirror of part of the memory in flash@1,0
88 flash@0,0 {
89 compatible = "gef,ppc9a-firmware-mirror", "cfi-flash";
90 reg = <0x0 0x0 0x1000000>;
91 bank-width = <4>;
92 device-width = <2>;
93 #address-cells = <1>;
94 #size-cells = <1>;
95 partition@0 {
96 label = "firmware";
97 reg = <0x0 0x1000000>;
98 read-only;
99 };
100 };
101 */
102
103 flash@1,0 {
104 compatible = "gef,ppc9a-paged-flash", "cfi-flash";
105 reg = <0x1 0x0 0x8000000>;
106 bank-width = <4>;
107 device-width = <2>;
108 #address-cells = <1>;
109 #size-cells = <1>;
110 partition@0 {
111 label = "user";
112 reg = <0x0 0x7800000>;
113 };
114 partition@7800000 {
115 label = "firmware";
116 reg = <0x7800000 0x800000>;
117 read-only;
118 };
119 };
120
121 fpga@4,0 {
122 compatible = "gef,ppc9a-fpga-regs";
123 reg = <0x4 0x0 0x40>;
124 };
125
126 wdt@4,2000 {
127 compatible = "gef,ppc9a-fpga-wdt", "gef,fpga-wdt-1.00",
128 "gef,fpga-wdt";
129 reg = <0x4 0x2000 0x8>;
130 interrupts = <0x1a 0x4>;
131 interrupt-parent = <&gef_pic>;
132 };
133 /* Second watchdog available, driver currently supports one.
134 wdt@4,2010 {
135 compatible = "gef,ppc9a-fpga-wdt", "gef,fpga-wdt-1.00",
136 "gef,fpga-wdt";
137 reg = <0x4 0x2010 0x8>;
138 interrupts = <0x1b 0x4>;
139 interrupt-parent = <&gef_pic>;
140 };
141 */
142 gef_pic: pic@4,4000 {
143 #interrupt-cells = <1>;
144 interrupt-controller;
145 compatible = "gef,ppc9a-fpga-pic", "gef,fpga-pic-1.00";
146 reg = <0x4 0x4000 0x20>;
147 interrupts = <0x8
148 0x9>;
149 interrupt-parent = <&mpic>;
150
151 };
152 gef_gpio: gpio@7,14000 {
153 #gpio-cells = <2>;
154 compatible = "gef,ppc9a-gpio", "gef,sbc610-gpio";
155 reg = <0x7 0x14000 0x24>;
156 gpio-controller;
157 };
158 };
159
160 soc@fef00000 {
161 #address-cells = <1>;
162 #size-cells = <1>;
163 #interrupt-cells = <2>;
164 compatible = "fsl,mpc8641-soc", "simple-bus";
165 ranges = <0x0 0xfef00000 0x00100000>;
166 reg = <0xfef00000 0x100000>; // CCSRBAR 1M
167 bus-frequency = <33333333>;
168
169 i2c1: i2c@3000 {
170 #address-cells = <1>;
171 #size-cells = <0>;
172 compatible = "fsl-i2c";
173 reg = <0x3000 0x100>;
174 interrupts = <0x2b 0x2>;
175 interrupt-parent = <&mpic>;
176 dfsrr;
177
178 hwmon@48 {
179 compatible = "national,lm92";
180 reg = <0x48>;
181 };
182
183 hwmon@4c {
184 compatible = "adi,adt7461";
185 reg = <0x4c>;
186 };
187
188 rtc@51 {
189 compatible = "epson,rx8581";
190 reg = <0x00000051>;
191 };
192
193 eti@6b {
194 compatible = "dallas,ds1682";
195 reg = <0x6b>;
196 };
197 };
198
199 i2c2: i2c@3100 {
200 #address-cells = <1>;
201 #size-cells = <0>;
202 compatible = "fsl-i2c";
203 reg = <0x3100 0x100>;
204 interrupts = <0x2b 0x2>;
205 interrupt-parent = <&mpic>;
206 dfsrr;
207 };
208
209 dma@21300 {
210 #address-cells = <1>;
211 #size-cells = <1>;
212 compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma";
213 reg = <0x21300 0x4>;
214 ranges = <0x0 0x21100 0x200>;
215 cell-index = <0>;
216 dma-channel@0 {
217 compatible = "fsl,mpc8641-dma-channel",
218 "fsl,eloplus-dma-channel";
219 reg = <0x0 0x80>;
220 cell-index = <0>;
221 interrupt-parent = <&mpic>;
222 interrupts = <20 2>;
223 };
224 dma-channel@80 {
225 compatible = "fsl,mpc8641-dma-channel",
226 "fsl,eloplus-dma-channel";
227 reg = <0x80 0x80>;
228 cell-index = <1>;
229 interrupt-parent = <&mpic>;
230 interrupts = <21 2>;
231 };
232 dma-channel@100 {
233 compatible = "fsl,mpc8641-dma-channel",
234 "fsl,eloplus-dma-channel";
235 reg = <0x100 0x80>;
236 cell-index = <2>;
237 interrupt-parent = <&mpic>;
238 interrupts = <22 2>;
239 };
240 dma-channel@180 {
241 compatible = "fsl,mpc8641-dma-channel",
242 "fsl,eloplus-dma-channel";
243 reg = <0x180 0x80>;
244 cell-index = <3>;
245 interrupt-parent = <&mpic>;
246 interrupts = <23 2>;
247 };
248 };
249
250 enet0: ethernet@24000 {
251 #address-cells = <1>;
252 #size-cells = <1>;
253 device_type = "network";
254 model = "eTSEC";
255 compatible = "gianfar";
256 reg = <0x24000 0x1000>;
257 ranges = <0x0 0x24000 0x1000>;
258 local-mac-address = [ 00 00 00 00 00 00 ];
259 interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
260 interrupt-parent = <&mpic>;
261 phy-handle = <&phy0>;
262 phy-connection-type = "gmii";
263
264 mdio@520 {
265 #address-cells = <1>;
266 #size-cells = <0>;
267 compatible = "fsl,gianfar-mdio";
268 reg = <0x520 0x20>;
269
270 phy0: ethernet-phy@0 {
271 interrupt-parent = <&gef_pic>;
272 interrupts = <0x9 0x4>;
273 reg = <1>;
274 };
275 phy2: ethernet-phy@2 {
276 interrupt-parent = <&gef_pic>;
277 interrupts = <0x8 0x4>;
278 reg = <3>;
279 };
280 };
281 };
282
283 enet1: ethernet@26000 {
284 device_type = "network";
285 model = "eTSEC";
286 compatible = "gianfar";
287 reg = <0x26000 0x1000>;
288 local-mac-address = [ 00 00 00 00 00 00 ];
289 interrupts = <0x1f 0x2 0x20 0x2 0x21 0x2>;
290 interrupt-parent = <&mpic>;
291 phy-handle = <&phy2>;
292 phy-connection-type = "gmii";
293 };
294
295 serial0: serial@4500 {
296 cell-index = <0>;
297 device_type = "serial";
298 compatible = "ns16550";
299 reg = <0x4500 0x100>;
300 clock-frequency = <0>;
301 interrupts = <0x2a 0x2>;
302 interrupt-parent = <&mpic>;
303 };
304
305 serial1: serial@4600 {
306 cell-index = <1>;
307 device_type = "serial";
308 compatible = "ns16550";
309 reg = <0x4600 0x100>;
310 clock-frequency = <0>;
311 interrupts = <0x1c 0x2>;
312 interrupt-parent = <&mpic>;
313 };
314
315 mpic: pic@40000 {
316 clock-frequency = <0>;
317 interrupt-controller;
318 #address-cells = <0>;
319 #interrupt-cells = <2>;
320 reg = <0x40000 0x40000>;
321 compatible = "chrp,open-pic";
322 device_type = "open-pic";
323 };
324
325 global-utilities@e0000 {
326 compatible = "fsl,mpc8641-guts";
327 reg = <0xe0000 0x1000>;
328 fsl,has-rstcr;
329 };
330 };
331
332 pci0: pcie@fef08000 {
333 compatible = "fsl,mpc8641-pcie";
334 device_type = "pci";
335 #interrupt-cells = <1>;
336 #size-cells = <2>;
337 #address-cells = <3>;
338 reg = <0xfef08000 0x1000>;
339 bus-range = <0x0 0xff>;
340 ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x40000000
341 0x01000000 0x0 0x00000000 0xfe000000 0x0 0x00400000>;
342 clock-frequency = <33333333>;
343 interrupt-parent = <&mpic>;
344 interrupts = <0x18 0x2>;
345 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
346 interrupt-map = <
347 0x0000 0x0 0x0 0x1 &mpic 0x0 0x1
348 0x0000 0x0 0x0 0x2 &mpic 0x1 0x1
349 0x0000 0x0 0x0 0x3 &mpic 0x2 0x1
350 0x0000 0x0 0x0 0x4 &mpic 0x3 0x1
351 >;
352
353 pcie@0 {
354 reg = <0 0 0 0 0>;
355 #size-cells = <2>;
356 #address-cells = <3>;
357 device_type = "pci";
358 ranges = <0x02000000 0x0 0x80000000
359 0x02000000 0x0 0x80000000
360 0x0 0x40000000
361
362 0x01000000 0x0 0x00000000
363 0x01000000 0x0 0x00000000
364 0x0 0x00400000>;
365 };
366 };
367};
diff --git a/arch/powerpc/boot/dts/gef_sbc310.dts b/arch/powerpc/boot/dts/gef_sbc310.dts
new file mode 100644
index 000000000000..1569117e5ddc
--- /dev/null
+++ b/arch/powerpc/boot/dts/gef_sbc310.dts
@@ -0,0 +1,367 @@
1/*
2 * GE Fanuc SBC310 Device Tree Source
3 *
4 * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * Based on: SBS CM6 Device Tree Source
12 * Copyright 2007 SBS Technologies GmbH & Co. KG
13 * And: mpc8641_hpcn.dts (MPC8641 HPCN Device Tree Source)
14 * Copyright 2006 Freescale Semiconductor Inc.
15 */
16
17/*
18 * Compiled with dtc -I dts -O dtb -o gef_sbc310.dtb gef_sbc310.dts
19 */
20
21/dts-v1/;
22
23/ {
24 model = "GEF_SBC310";
25 compatible = "gef,sbc310";
26 #address-cells = <1>;
27 #size-cells = <1>;
28
29 aliases {
30 ethernet0 = &enet0;
31 ethernet1 = &enet1;
32 serial0 = &serial0;
33 serial1 = &serial1;
34 pci0 = &pci0;
35 };
36
37 cpus {
38 #address-cells = <1>;
39 #size-cells = <0>;
40
41 PowerPC,8641@0 {
42 device_type = "cpu";
43 reg = <0>;
44 d-cache-line-size = <32>; // 32 bytes
45 i-cache-line-size = <32>; // 32 bytes
46 d-cache-size = <32768>; // L1, 32K
47 i-cache-size = <32768>; // L1, 32K
48 timebase-frequency = <0>; // From uboot
49 bus-frequency = <0>; // From uboot
50 clock-frequency = <0>; // From uboot
51 };
52 PowerPC,8641@1 {
53 device_type = "cpu";
54 reg = <1>;
55 d-cache-line-size = <32>; // 32 bytes
56 i-cache-line-size = <32>; // 32 bytes
57 d-cache-size = <32768>; // L1, 32K
58 i-cache-size = <32768>; // L1, 32K
59 timebase-frequency = <0>; // From uboot
60 bus-frequency = <0>; // From uboot
61 clock-frequency = <0>; // From uboot
62 };
63 };
64
65 memory {
66 device_type = "memory";
67 reg = <0x0 0x40000000>; // set by uboot
68 };
69
70 localbus@fef05000 {
71 #address-cells = <2>;
72 #size-cells = <1>;
73 compatible = "fsl,mpc8641-localbus", "simple-bus";
74 reg = <0xfef05000 0x1000>;
75 interrupts = <19 2>;
76 interrupt-parent = <&mpic>;
77
78 ranges = <0 0 0xff000000 0x01000000 // 16MB Boot flash
79 1 0 0xe0000000 0x08000000 // Paged Flash 0
80 2 0 0xe8000000 0x08000000 // Paged Flash 1
81 3 0 0xfc100000 0x00020000 // NVRAM
82 4 0 0xfc000000 0x00010000>; // FPGA
83
84 /* flash@0,0 is a mirror of part of the memory in flash@1,0
85 flash@0,0 {
86 compatible = "cfi-flash";
87 reg = <0 0 0x01000000>;
88 bank-width = <2>;
89 device-width = <2>;
90 #address-cells = <1>;
91 #size-cells = <1>;
92 partition@0 {
93 label = "firmware";
94 reg = <0x00000000 0x01000000>;
95 read-only;
96 };
97 };
98 */
99
100 flash@1,0 {
101 compatible = "cfi-flash";
102 reg = <1 0 0x8000000>;
103 bank-width = <2>;
104 device-width = <2>;
105 #address-cells = <1>;
106 #size-cells = <1>;
107 partition@0 {
108 label = "user";
109 reg = <0x00000000 0x07800000>;
110 };
111 partition@7800000 {
112 label = "firmware";
113 reg = <0x07800000 0x00800000>;
114 read-only;
115 };
116 };
117
118 fpga@4,0 {
119 compatible = "gef,fpga-regs";
120 reg = <0x4 0x0 0x40>;
121 };
122
123 wdt@4,2000 {
124 #interrupt-cells = <2>;
125 device_type = "watchdog";
126 compatible = "gef,fpga-wdt";
127 reg = <0x4 0x2000 0x8>;
128 interrupts = <0x1a 0x4>;
129 interrupt-parent = <&gef_pic>;
130 };
131/*
132 wdt@4,2010 {
133 #interrupt-cells = <2>;
134 device_type = "watchdog";
135 compatible = "gef,fpga-wdt";
136 reg = <0x4 0x2010 0x8>;
137 interrupts = <0x1b 0x4>;
138 interrupt-parent = <&gef_pic>;
139 };
140*/
141 gef_pic: pic@4,4000 {
142 #interrupt-cells = <1>;
143 interrupt-controller;
144 compatible = "gef,fpga-pic";
145 reg = <0x4 0x4000 0x20>;
146 interrupts = <0x8
147 0x9>;
148 interrupt-parent = <&mpic>;
149
150 };
151 gef_gpio: gpio@4,8000 {
152 #gpio-cells = <2>;
153 compatible = "gef,sbc310-gpio";
154 reg = <0x4 0x8000 0x24>;
155 gpio-controller;
156 };
157 };
158
159 soc@fef00000 {
160 #address-cells = <1>;
161 #size-cells = <1>;
162 #interrupt-cells = <2>;
163 device_type = "soc";
164 compatible = "simple-bus";
165 ranges = <0x0 0xfef00000 0x00100000>;
166 reg = <0xfef00000 0x100000>; // CCSRBAR 1M
167 bus-frequency = <33333333>;
168
169 i2c1: i2c@3000 {
170 #address-cells = <1>;
171 #size-cells = <0>;
172 compatible = "fsl-i2c";
173 reg = <0x3000 0x100>;
174 interrupts = <0x2b 0x2>;
175 interrupt-parent = <&mpic>;
176 dfsrr;
177
178 rtc@51 {
179 compatible = "epson,rx8581";
180 reg = <0x00000051>;
181 };
182 };
183
184 i2c2: i2c@3100 {
185 #address-cells = <1>;
186 #size-cells = <0>;
187 compatible = "fsl-i2c";
188 reg = <0x3100 0x100>;
189 interrupts = <0x2b 0x2>;
190 interrupt-parent = <&mpic>;
191 dfsrr;
192
193 hwmon@48 {
194 compatible = "national,lm92";
195 reg = <0x48>;
196 };
197
198 hwmon@4c {
199 compatible = "adi,adt7461";
200 reg = <0x4c>;
201 };
202
203 eti@6b {
204 compatible = "dallas,ds1682";
205 reg = <0x6b>;
206 };
207 };
208
209 dma@21300 {
210 #address-cells = <1>;
211 #size-cells = <1>;
212 compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma";
213 reg = <0x21300 0x4>;
214 ranges = <0x0 0x21100 0x200>;
215 cell-index = <0>;
216 dma-channel@0 {
217 compatible = "fsl,mpc8641-dma-channel",
218 "fsl,eloplus-dma-channel";
219 reg = <0x0 0x80>;
220 cell-index = <0>;
221 interrupt-parent = <&mpic>;
222 interrupts = <20 2>;
223 };
224 dma-channel@80 {
225 compatible = "fsl,mpc8641-dma-channel",
226 "fsl,eloplus-dma-channel";
227 reg = <0x80 0x80>;
228 cell-index = <1>;
229 interrupt-parent = <&mpic>;
230 interrupts = <21 2>;
231 };
232 dma-channel@100 {
233 compatible = "fsl,mpc8641-dma-channel",
234 "fsl,eloplus-dma-channel";
235 reg = <0x100 0x80>;
236 cell-index = <2>;
237 interrupt-parent = <&mpic>;
238 interrupts = <22 2>;
239 };
240 dma-channel@180 {
241 compatible = "fsl,mpc8641-dma-channel",
242 "fsl,eloplus-dma-channel";
243 reg = <0x180 0x80>;
244 cell-index = <3>;
245 interrupt-parent = <&mpic>;
246 interrupts = <23 2>;
247 };
248 };
249
250 enet0: ethernet@24000 {
251 #address-cells = <1>;
252 #size-cells = <1>;
253 device_type = "network";
254 model = "eTSEC";
255 compatible = "gianfar";
256 reg = <0x24000 0x1000>;
257 ranges = <0x0 0x24000 0x1000>;
258 local-mac-address = [ 00 00 00 00 00 00 ];
259 interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
260 interrupt-parent = <&mpic>;
261 phy-handle = <&phy0>;
262 phy-connection-type = "gmii";
263
264 mdio@520 {
265 #address-cells = <1>;
266 #size-cells = <0>;
267 compatible = "fsl,gianfar-mdio";
268 reg = <0x520 0x20>;
269
270 phy0: ethernet-phy@0 {
271 interrupt-parent = <&gef_pic>;
272 interrupts = <0x9 0x4>;
273 reg = <1>;
274 };
275 phy2: ethernet-phy@2 {
276 interrupt-parent = <&gef_pic>;
277 interrupts = <0x8 0x4>;
278 reg = <3>;
279 };
280 };
281 };
282
283 enet1: ethernet@26000 {
284 device_type = "network";
285 model = "eTSEC";
286 compatible = "gianfar";
287 reg = <0x26000 0x1000>;
288 local-mac-address = [ 00 00 00 00 00 00 ];
289 interrupts = <0x1f 0x2 0x20 0x2 0x21 0x2>;
290 interrupt-parent = <&mpic>;
291 phy-handle = <&phy2>;
292 phy-connection-type = "gmii";
293 };
294
295 serial0: serial@4500 {
296 cell-index = <0>;
297 device_type = "serial";
298 compatible = "ns16550";
299 reg = <0x4500 0x100>;
300 clock-frequency = <0>;
301 interrupts = <0x2a 0x2>;
302 interrupt-parent = <&mpic>;
303 };
304
305 serial1: serial@4600 {
306 cell-index = <1>;
307 device_type = "serial";
308 compatible = "ns16550";
309 reg = <0x4600 0x100>;
310 clock-frequency = <0>;
311 interrupts = <0x1c 0x2>;
312 interrupt-parent = <&mpic>;
313 };
314
315 mpic: pic@40000 {
316 clock-frequency = <0>;
317 interrupt-controller;
318 #address-cells = <0>;
319 #interrupt-cells = <2>;
320 reg = <0x40000 0x40000>;
321 compatible = "chrp,open-pic";
322 device_type = "open-pic";
323 };
324
325 global-utilities@e0000 {
326 compatible = "fsl,mpc8641-guts";
327 reg = <0xe0000 0x1000>;
328 fsl,has-rstcr;
329 };
330 };
331
332 pci0: pcie@fef08000 {
333 compatible = "fsl,mpc8641-pcie";
334 device_type = "pci";
335 #interrupt-cells = <1>;
336 #size-cells = <2>;
337 #address-cells = <3>;
338 reg = <0xfef08000 0x1000>;
339 bus-range = <0x0 0xff>;
340 ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x40000000
341 0x01000000 0x0 0x00000000 0xfe000000 0x0 0x00400000>;
342 clock-frequency = <33333333>;
343 interrupt-parent = <&mpic>;
344 interrupts = <0x18 0x2>;
345 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
346 interrupt-map = <
347 0x0000 0x0 0x0 0x1 &mpic 0x0 0x2
348 0x0000 0x0 0x0 0x2 &mpic 0x1 0x2
349 0x0000 0x0 0x0 0x3 &mpic 0x2 0x2
350 0x0000 0x0 0x0 0x4 &mpic 0x3 0x2
351 >;
352
353 pcie@0 {
354 reg = <0 0 0 0 0>;
355 #size-cells = <2>;
356 #address-cells = <3>;
357 device_type = "pci";
358 ranges = <0x02000000 0x0 0x80000000
359 0x02000000 0x0 0x80000000
360 0x0 0x40000000
361
362 0x01000000 0x0 0x00000000
363 0x01000000 0x0 0x00000000
364 0x0 0x00400000>;
365 };
366 };
367};
diff --git a/arch/powerpc/boot/dts/gef_sbc610.dts b/arch/powerpc/boot/dts/gef_sbc610.dts
index e78c355c7bac..6582dbd36da7 100644
--- a/arch/powerpc/boot/dts/gef_sbc610.dts
+++ b/arch/powerpc/boot/dts/gef_sbc610.dts
@@ -71,7 +71,7 @@
71 #address-cells = <2>; 71 #address-cells = <2>;
72 #size-cells = <1>; 72 #size-cells = <1>;
73 compatible = "fsl,mpc8641-localbus", "simple-bus"; 73 compatible = "fsl,mpc8641-localbus", "simple-bus";
74 reg = <0xf8005000 0x1000>; 74 reg = <0xfef05000 0x1000>;
75 interrupts = <19 2>; 75 interrupts = <19 2>;
76 interrupt-parent = <&mpic>; 76 interrupt-parent = <&mpic>;
77 77
@@ -202,34 +202,37 @@
202 }; 202 };
203 }; 203 };
204 204
205 mdio@24520 {
206 #address-cells = <1>;
207 #size-cells = <0>;
208 compatible = "fsl,gianfar-mdio";
209 reg = <0x24520 0x20>;
210
211 phy0: ethernet-phy@0 {
212 interrupt-parent = <&gef_pic>;
213 interrupts = <0x9 0x4>;
214 reg = <1>;
215 };
216 phy2: ethernet-phy@2 {
217 interrupt-parent = <&gef_pic>;
218 interrupts = <0x8 0x4>;
219 reg = <3>;
220 };
221 };
222
223 enet0: ethernet@24000 { 205 enet0: ethernet@24000 {
206 #address-cells = <1>;
207 #size-cells = <1>;
224 device_type = "network"; 208 device_type = "network";
225 model = "eTSEC"; 209 model = "eTSEC";
226 compatible = "gianfar"; 210 compatible = "gianfar";
227 reg = <0x24000 0x1000>; 211 reg = <0x24000 0x1000>;
212 ranges = <0x0 0x24000 0x1000>;
228 local-mac-address = [ 00 00 00 00 00 00 ]; 213 local-mac-address = [ 00 00 00 00 00 00 ];
229 interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>; 214 interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
230 interrupt-parent = <&mpic>; 215 interrupt-parent = <&mpic>;
231 phy-handle = <&phy0>; 216 phy-handle = <&phy0>;
232 phy-connection-type = "gmii"; 217 phy-connection-type = "gmii";
218
219 mdio@520 {
220 #address-cells = <1>;
221 #size-cells = <0>;
222 compatible = "fsl,gianfar-mdio";
223 reg = <0x520 0x20>;
224
225 phy0: ethernet-phy@0 {
226 interrupt-parent = <&gef_pic>;
227 interrupts = <0x9 0x4>;
228 reg = <1>;
229 };
230 phy2: ethernet-phy@2 {
231 interrupt-parent = <&gef_pic>;
232 interrupts = <0x8 0x4>;
233 reg = <3>;
234 };
235 };
233 }; 236 };
234 237
235 enet1: ethernet@26000 { 238 enet1: ethernet@26000 {
diff --git a/arch/powerpc/boot/dts/kilauea.dts b/arch/powerpc/boot/dts/kilauea.dts
index 2804444812e5..5e6b08ff6f67 100644
--- a/arch/powerpc/boot/dts/kilauea.dts
+++ b/arch/powerpc/boot/dts/kilauea.dts
@@ -97,6 +97,13 @@
97 0x6 0x4>; /* ECC SEC Error */ 97 0x6 0x4>; /* ECC SEC Error */
98 }; 98 };
99 99
100 CRYPTO: crypto@ef700000 {
101 compatible = "amcc,ppc405ex-crypto", "amcc,ppc4xx-crypto";
102 reg = <0xef700000 0x80400>;
103 interrupt-parent = <&UIC0>;
104 interrupts = <0x17 0x2>;
105 };
106
100 MAL0: mcmal { 107 MAL0: mcmal {
101 compatible = "ibm,mcmal-405ex", "ibm,mcmal2"; 108 compatible = "ibm,mcmal-405ex", "ibm,mcmal2";
102 dcr-reg = <0x180 0x062>; 109 dcr-reg = <0x180 0x062>;
diff --git a/arch/powerpc/boot/dts/ksi8560.dts b/arch/powerpc/boot/dts/ksi8560.dts
index 3bfff47418db..308fe7c29dea 100644
--- a/arch/powerpc/boot/dts/ksi8560.dts
+++ b/arch/powerpc/boot/dts/ksi8560.dts
@@ -124,67 +124,72 @@
124 }; 124 };
125 }; 125 };
126 126
127 mdio@24520 { /* For TSECs */
128 #address-cells = <1>;
129 #size-cells = <0>;
130 compatible = "fsl,gianfar-mdio";
131 reg = <0x24520 0x20>;
132
133 PHY1: ethernet-phy@1 {
134 interrupt-parent = <&mpic>;
135 reg = <0x1>;
136 device_type = "ethernet-phy";
137 };
138
139 PHY2: ethernet-phy@2 {
140 interrupt-parent = <&mpic>;
141 reg = <0x2>;
142 device_type = "ethernet-phy";
143 };
144
145 tbi0: tbi-phy@11 {
146 reg = <0x11>;
147 device_type = "tbi-phy";
148 };
149 };
150
151 mdio@25520 {
152 #address-cells = <1>;
153 #size-cells = <0>;
154 compatible = "fsl,gianfar-tbi";
155 reg = <0x25520 0x20>;
156
157 tbi1: tbi-phy@11 {
158 reg = <0x11>;
159 device_type = "tbi-phy";
160 };
161 };
162
163
164 enet0: ethernet@24000 { 127 enet0: ethernet@24000 {
128 #address-cells = <1>;
129 #size-cells = <1>;
165 device_type = "network"; 130 device_type = "network";
166 model = "TSEC"; 131 model = "TSEC";
167 compatible = "gianfar"; 132 compatible = "gianfar";
168 reg = <0x24000 0x1000>; 133 reg = <0x24000 0x1000>;
134 ranges = <0x0 0x24000 0x1000>;
169 /* Mac address filled in by bootwrapper */ 135 /* Mac address filled in by bootwrapper */
170 local-mac-address = [ 00 00 00 00 00 00 ]; 136 local-mac-address = [ 00 00 00 00 00 00 ];
171 interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>; 137 interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
172 interrupt-parent = <&mpic>; 138 interrupt-parent = <&mpic>;
173 tbi-handle = <&tbi0>; 139 tbi-handle = <&tbi0>;
174 phy-handle = <&PHY1>; 140 phy-handle = <&PHY1>;
141
142 mdio@520 { /* For TSECs */
143 #address-cells = <1>;
144 #size-cells = <0>;
145 compatible = "fsl,gianfar-mdio";
146 reg = <0x520 0x20>;
147
148 PHY1: ethernet-phy@1 {
149 interrupt-parent = <&mpic>;
150 reg = <0x1>;
151 device_type = "ethernet-phy";
152 };
153
154 PHY2: ethernet-phy@2 {
155 interrupt-parent = <&mpic>;
156 reg = <0x2>;
157 device_type = "ethernet-phy";
158 };
159
160 tbi0: tbi-phy@11 {
161 reg = <0x11>;
162 device_type = "tbi-phy";
163 };
164 };
175 }; 165 };
176 166
177 enet1: ethernet@25000 { 167 enet1: ethernet@25000 {
168 #address-cells = <1>;
169 #size-cells = <1>;
178 device_type = "network"; 170 device_type = "network";
179 model = "TSEC"; 171 model = "TSEC";
180 compatible = "gianfar"; 172 compatible = "gianfar";
181 reg = <0x25000 0x1000>; 173 reg = <0x25000 0x1000>;
174 ranges = <0x0 0x25000 0x1000>;
182 /* Mac address filled in by bootwrapper */ 175 /* Mac address filled in by bootwrapper */
183 local-mac-address = [ 00 00 00 00 00 00 ]; 176 local-mac-address = [ 00 00 00 00 00 00 ];
184 interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>; 177 interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>;
185 interrupt-parent = <&mpic>; 178 interrupt-parent = <&mpic>;
186 tbi-handle = <&tbi1>; 179 tbi-handle = <&tbi1>;
187 phy-handle = <&PHY2>; 180 phy-handle = <&PHY2>;
181
182 mdio@520 {
183 #address-cells = <1>;
184 #size-cells = <0>;
185 compatible = "fsl,gianfar-tbi";
186 reg = <0x520 0x20>;
187
188 tbi1: tbi-phy@11 {
189 reg = <0x11>;
190 device_type = "tbi-phy";
191 };
192 };
188 }; 193 };
189 194
190 mpic: pic@40000 { 195 mpic: pic@40000 {
diff --git a/arch/powerpc/boot/dts/lite5200.dts b/arch/powerpc/boot/dts/lite5200.dts
index 3f7a5dce8de0..de30b3f9eb26 100644
--- a/arch/powerpc/boot/dts/lite5200.dts
+++ b/arch/powerpc/boot/dts/lite5200.dts
@@ -17,6 +17,7 @@
17 compatible = "fsl,lite5200"; 17 compatible = "fsl,lite5200";
18 #address-cells = <1>; 18 #address-cells = <1>;
19 #size-cells = <1>; 19 #size-cells = <1>;
20 interrupt-parent = <&mpc5200_pic>;
20 21
21 cpus { 22 cpus {
22 #address-cells = <1>; 23 #address-cells = <1>;
@@ -58,96 +59,74 @@
58 // 5200 interrupts are encoded into two levels; 59 // 5200 interrupts are encoded into two levels;
59 interrupt-controller; 60 interrupt-controller;
60 #interrupt-cells = <3>; 61 #interrupt-cells = <3>;
61 device_type = "interrupt-controller";
62 compatible = "fsl,mpc5200-pic"; 62 compatible = "fsl,mpc5200-pic";
63 reg = <0x500 0x80>; 63 reg = <0x500 0x80>;
64 }; 64 };
65 65
66 timer@600 { // General Purpose Timer 66 timer@600 { // General Purpose Timer
67 compatible = "fsl,mpc5200-gpt"; 67 compatible = "fsl,mpc5200-gpt";
68 cell-index = <0>;
69 reg = <0x600 0x10>; 68 reg = <0x600 0x10>;
70 interrupts = <1 9 0>; 69 interrupts = <1 9 0>;
71 interrupt-parent = <&mpc5200_pic>;
72 fsl,has-wdt; 70 fsl,has-wdt;
73 }; 71 };
74 72
75 timer@610 { // General Purpose Timer 73 timer@610 { // General Purpose Timer
76 compatible = "fsl,mpc5200-gpt"; 74 compatible = "fsl,mpc5200-gpt";
77 cell-index = <1>;
78 reg = <0x610 0x10>; 75 reg = <0x610 0x10>;
79 interrupts = <1 10 0>; 76 interrupts = <1 10 0>;
80 interrupt-parent = <&mpc5200_pic>;
81 }; 77 };
82 78
83 timer@620 { // General Purpose Timer 79 timer@620 { // General Purpose Timer
84 compatible = "fsl,mpc5200-gpt"; 80 compatible = "fsl,mpc5200-gpt";
85 cell-index = <2>;
86 reg = <0x620 0x10>; 81 reg = <0x620 0x10>;
87 interrupts = <1 11 0>; 82 interrupts = <1 11 0>;
88 interrupt-parent = <&mpc5200_pic>;
89 }; 83 };
90 84
91 timer@630 { // General Purpose Timer 85 timer@630 { // General Purpose Timer
92 compatible = "fsl,mpc5200-gpt"; 86 compatible = "fsl,mpc5200-gpt";
93 cell-index = <3>;
94 reg = <0x630 0x10>; 87 reg = <0x630 0x10>;
95 interrupts = <1 12 0>; 88 interrupts = <1 12 0>;
96 interrupt-parent = <&mpc5200_pic>;
97 }; 89 };
98 90
99 timer@640 { // General Purpose Timer 91 timer@640 { // General Purpose Timer
100 compatible = "fsl,mpc5200-gpt"; 92 compatible = "fsl,mpc5200-gpt";
101 cell-index = <4>;
102 reg = <0x640 0x10>; 93 reg = <0x640 0x10>;
103 interrupts = <1 13 0>; 94 interrupts = <1 13 0>;
104 interrupt-parent = <&mpc5200_pic>;
105 }; 95 };
106 96
107 timer@650 { // General Purpose Timer 97 timer@650 { // General Purpose Timer
108 compatible = "fsl,mpc5200-gpt"; 98 compatible = "fsl,mpc5200-gpt";
109 cell-index = <5>;
110 reg = <0x650 0x10>; 99 reg = <0x650 0x10>;
111 interrupts = <1 14 0>; 100 interrupts = <1 14 0>;
112 interrupt-parent = <&mpc5200_pic>;
113 }; 101 };
114 102
115 timer@660 { // General Purpose Timer 103 timer@660 { // General Purpose Timer
116 compatible = "fsl,mpc5200-gpt"; 104 compatible = "fsl,mpc5200-gpt";
117 cell-index = <6>;
118 reg = <0x660 0x10>; 105 reg = <0x660 0x10>;
119 interrupts = <1 15 0>; 106 interrupts = <1 15 0>;
120 interrupt-parent = <&mpc5200_pic>;
121 }; 107 };
122 108
123 timer@670 { // General Purpose Timer 109 timer@670 { // General Purpose Timer
124 compatible = "fsl,mpc5200-gpt"; 110 compatible = "fsl,mpc5200-gpt";
125 cell-index = <7>;
126 reg = <0x670 0x10>; 111 reg = <0x670 0x10>;
127 interrupts = <1 16 0>; 112 interrupts = <1 16 0>;
128 interrupt-parent = <&mpc5200_pic>;
129 }; 113 };
130 114
131 rtc@800 { // Real time clock 115 rtc@800 { // Real time clock
132 compatible = "fsl,mpc5200-rtc"; 116 compatible = "fsl,mpc5200-rtc";
133 reg = <0x800 0x100>; 117 reg = <0x800 0x100>;
134 interrupts = <1 5 0 1 6 0>; 118 interrupts = <1 5 0 1 6 0>;
135 interrupt-parent = <&mpc5200_pic>;
136 }; 119 };
137 120
138 can@900 { 121 can@900 {
139 compatible = "fsl,mpc5200-mscan"; 122 compatible = "fsl,mpc5200-mscan";
140 cell-index = <0>;
141 interrupts = <2 17 0>; 123 interrupts = <2 17 0>;
142 interrupt-parent = <&mpc5200_pic>;
143 reg = <0x900 0x80>; 124 reg = <0x900 0x80>;
144 }; 125 };
145 126
146 can@980 { 127 can@980 {
147 compatible = "fsl,mpc5200-mscan"; 128 compatible = "fsl,mpc5200-mscan";
148 cell-index = <1>;
149 interrupts = <2 18 0>; 129 interrupts = <2 18 0>;
150 interrupt-parent = <&mpc5200_pic>;
151 reg = <0x980 0x80>; 130 reg = <0x980 0x80>;
152 }; 131 };
153 132
@@ -155,39 +134,33 @@
155 compatible = "fsl,mpc5200-gpio"; 134 compatible = "fsl,mpc5200-gpio";
156 reg = <0xb00 0x40>; 135 reg = <0xb00 0x40>;
157 interrupts = <1 7 0>; 136 interrupts = <1 7 0>;
158 interrupt-parent = <&mpc5200_pic>;
159 }; 137 };
160 138
161 gpio@c00 { 139 gpio@c00 {
162 compatible = "fsl,mpc5200-gpio-wkup"; 140 compatible = "fsl,mpc5200-gpio-wkup";
163 reg = <0xc00 0x40>; 141 reg = <0xc00 0x40>;
164 interrupts = <1 8 0 0 3 0>; 142 interrupts = <1 8 0 0 3 0>;
165 interrupt-parent = <&mpc5200_pic>;
166 }; 143 };
167 144
168 spi@f00 { 145 spi@f00 {
169 compatible = "fsl,mpc5200-spi"; 146 compatible = "fsl,mpc5200-spi";
170 reg = <0xf00 0x20>; 147 reg = <0xf00 0x20>;
171 interrupts = <2 13 0 2 14 0>; 148 interrupts = <2 13 0 2 14 0>;
172 interrupt-parent = <&mpc5200_pic>;
173 }; 149 };
174 150
175 usb@1000 { 151 usb@1000 {
176 compatible = "fsl,mpc5200-ohci","ohci-be"; 152 compatible = "fsl,mpc5200-ohci","ohci-be";
177 reg = <0x1000 0xff>; 153 reg = <0x1000 0xff>;
178 interrupts = <2 6 0>; 154 interrupts = <2 6 0>;
179 interrupt-parent = <&mpc5200_pic>;
180 }; 155 };
181 156
182 dma-controller@1200 { 157 dma-controller@1200 {
183 device_type = "dma-controller";
184 compatible = "fsl,mpc5200-bestcomm"; 158 compatible = "fsl,mpc5200-bestcomm";
185 reg = <0x1200 0x80>; 159 reg = <0x1200 0x80>;
186 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 160 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
187 3 4 0 3 5 0 3 6 0 3 7 0 161 3 4 0 3 5 0 3 6 0 3 7 0
188 3 8 0 3 9 0 3 10 0 3 11 0 162 3 8 0 3 9 0 3 10 0 3 11 0
189 3 12 0 3 13 0 3 14 0 3 15 0>; 163 3 12 0 3 13 0 3 14 0 3 15 0>;
190 interrupt-parent = <&mpc5200_pic>;
191 }; 164 };
192 165
193 xlb@1f00 { 166 xlb@1f00 {
@@ -196,13 +169,10 @@
196 }; 169 };
197 170
198 serial@2000 { // PSC1 171 serial@2000 { // PSC1
199 device_type = "serial";
200 compatible = "fsl,mpc5200-psc-uart"; 172 compatible = "fsl,mpc5200-psc-uart";
201 port-number = <0>; // Logical port assignment
202 cell-index = <0>; 173 cell-index = <0>;
203 reg = <0x2000 0x100>; 174 reg = <0x2000 0x100>;
204 interrupts = <2 1 0>; 175 interrupts = <2 1 0>;
205 interrupt-parent = <&mpc5200_pic>;
206 }; 176 };
207 177
208 // PSC2 in ac97 mode example 178 // PSC2 in ac97 mode example
@@ -211,7 +181,6 @@
211 // cell-index = <1>; 181 // cell-index = <1>;
212 // reg = <0x2200 0x100>; 182 // reg = <0x2200 0x100>;
213 // interrupts = <2 2 0>; 183 // interrupts = <2 2 0>;
214 // interrupt-parent = <&mpc5200_pic>;
215 //}; 184 //};
216 185
217 // PSC3 in CODEC mode example 186 // PSC3 in CODEC mode example
@@ -220,27 +189,22 @@
220 // cell-index = <2>; 189 // cell-index = <2>;
221 // reg = <0x2400 0x100>; 190 // reg = <0x2400 0x100>;
222 // interrupts = <2 3 0>; 191 // interrupts = <2 3 0>;
223 // interrupt-parent = <&mpc5200_pic>;
224 //}; 192 //};
225 193
226 // PSC4 in uart mode example 194 // PSC4 in uart mode example
227 //serial@2600 { // PSC4 195 //serial@2600 { // PSC4
228 // device_type = "serial";
229 // compatible = "fsl,mpc5200-psc-uart"; 196 // compatible = "fsl,mpc5200-psc-uart";
230 // cell-index = <3>; 197 // cell-index = <3>;
231 // reg = <0x2600 0x100>; 198 // reg = <0x2600 0x100>;
232 // interrupts = <2 11 0>; 199 // interrupts = <2 11 0>;
233 // interrupt-parent = <&mpc5200_pic>;
234 //}; 200 //};
235 201
236 // PSC5 in uart mode example 202 // PSC5 in uart mode example
237 //serial@2800 { // PSC5 203 //serial@2800 { // PSC5
238 // device_type = "serial";
239 // compatible = "fsl,mpc5200-psc-uart"; 204 // compatible = "fsl,mpc5200-psc-uart";
240 // cell-index = <4>; 205 // cell-index = <4>;
241 // reg = <0x2800 0x100>; 206 // reg = <0x2800 0x100>;
242 // interrupts = <2 12 0>; 207 // interrupts = <2 12 0>;
243 // interrupt-parent = <&mpc5200_pic>;
244 //}; 208 //};
245 209
246 // PSC6 in spi mode example 210 // PSC6 in spi mode example
@@ -249,16 +213,13 @@
249 // cell-index = <5>; 213 // cell-index = <5>;
250 // reg = <0x2c00 0x100>; 214 // reg = <0x2c00 0x100>;
251 // interrupts = <2 4 0>; 215 // interrupts = <2 4 0>;
252 // interrupt-parent = <&mpc5200_pic>;
253 //}; 216 //};
254 217
255 ethernet@3000 { 218 ethernet@3000 {
256 device_type = "network";
257 compatible = "fsl,mpc5200-fec"; 219 compatible = "fsl,mpc5200-fec";
258 reg = <0x3000 0x400>; 220 reg = <0x3000 0x400>;
259 local-mac-address = [ 00 00 00 00 00 00 ]; 221 local-mac-address = [ 00 00 00 00 00 00 ];
260 interrupts = <2 5 0>; 222 interrupts = <2 5 0>;
261 interrupt-parent = <&mpc5200_pic>;
262 phy-handle = <&phy0>; 223 phy-handle = <&phy0>;
263 }; 224 };
264 225
@@ -268,30 +229,24 @@
268 compatible = "fsl,mpc5200-mdio"; 229 compatible = "fsl,mpc5200-mdio";
269 reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts 230 reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
270 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. 231 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
271 interrupt-parent = <&mpc5200_pic>;
272 232
273 phy0: ethernet-phy@1 { 233 phy0: ethernet-phy@1 {
274 device_type = "ethernet-phy";
275 reg = <1>; 234 reg = <1>;
276 }; 235 };
277 }; 236 };
278 237
279 ata@3a00 { 238 ata@3a00 {
280 device_type = "ata";
281 compatible = "fsl,mpc5200-ata"; 239 compatible = "fsl,mpc5200-ata";
282 reg = <0x3a00 0x100>; 240 reg = <0x3a00 0x100>;
283 interrupts = <2 7 0>; 241 interrupts = <2 7 0>;
284 interrupt-parent = <&mpc5200_pic>;
285 }; 242 };
286 243
287 i2c@3d00 { 244 i2c@3d00 {
288 #address-cells = <1>; 245 #address-cells = <1>;
289 #size-cells = <0>; 246 #size-cells = <0>;
290 compatible = "fsl,mpc5200-i2c","fsl-i2c"; 247 compatible = "fsl,mpc5200-i2c","fsl-i2c";
291 cell-index = <0>;
292 reg = <0x3d00 0x40>; 248 reg = <0x3d00 0x40>;
293 interrupts = <2 15 0>; 249 interrupts = <2 15 0>;
294 interrupt-parent = <&mpc5200_pic>;
295 fsl5200-clocking; 250 fsl5200-clocking;
296 }; 251 };
297 252
@@ -299,14 +254,12 @@
299 #address-cells = <1>; 254 #address-cells = <1>;
300 #size-cells = <0>; 255 #size-cells = <0>;
301 compatible = "fsl,mpc5200-i2c","fsl-i2c"; 256 compatible = "fsl,mpc5200-i2c","fsl-i2c";
302 cell-index = <1>;
303 reg = <0x3d40 0x40>; 257 reg = <0x3d40 0x40>;
304 interrupts = <2 16 0>; 258 interrupts = <2 16 0>;
305 interrupt-parent = <&mpc5200_pic>;
306 fsl5200-clocking; 259 fsl5200-clocking;
307 }; 260 };
308 sram@8000 { 261 sram@8000 {
309 compatible = "fsl,mpc5200-sram","sram"; 262 compatible = "fsl,mpc5200-sram";
310 reg = <0x8000 0x4000>; 263 reg = <0x8000 0x4000>;
311 }; 264 };
312 }; 265 };
@@ -325,7 +278,6 @@
325 0xc000 0 0 4 &mpc5200_pic 0 0 3>; 278 0xc000 0 0 4 &mpc5200_pic 0 0 3>;
326 clock-frequency = <0>; // From boot loader 279 clock-frequency = <0>; // From boot loader
327 interrupts = <2 8 0 2 9 0 2 10 0>; 280 interrupts = <2 8 0 2 9 0 2 10 0>;
328 interrupt-parent = <&mpc5200_pic>;
329 bus-range = <0 0>; 281 bus-range = <0 0>;
330 ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000 282 ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000
331 0x02000000 0 0xa0000000 0xa0000000 0 0x10000000 283 0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
diff --git a/arch/powerpc/boot/dts/lite5200b.dts b/arch/powerpc/boot/dts/lite5200b.dts
index 63e3bb48e843..c63e3566479e 100644
--- a/arch/powerpc/boot/dts/lite5200b.dts
+++ b/arch/powerpc/boot/dts/lite5200b.dts
@@ -17,6 +17,7 @@
17 compatible = "fsl,lite5200b"; 17 compatible = "fsl,lite5200b";
18 #address-cells = <1>; 18 #address-cells = <1>;
19 #size-cells = <1>; 19 #size-cells = <1>;
20 interrupt-parent = <&mpc5200_pic>;
20 21
21 cpus { 22 cpus {
22 #address-cells = <1>; 23 #address-cells = <1>;
@@ -58,136 +59,112 @@
58 // 5200 interrupts are encoded into two levels; 59 // 5200 interrupts are encoded into two levels;
59 interrupt-controller; 60 interrupt-controller;
60 #interrupt-cells = <3>; 61 #interrupt-cells = <3>;
61 device_type = "interrupt-controller";
62 compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic"; 62 compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
63 reg = <0x500 0x80>; 63 reg = <0x500 0x80>;
64 }; 64 };
65 65
66 timer@600 { // General Purpose Timer 66 timer@600 { // General Purpose Timer
67 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 67 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
68 cell-index = <0>;
69 reg = <0x600 0x10>; 68 reg = <0x600 0x10>;
70 interrupts = <1 9 0>; 69 interrupts = <1 9 0>;
71 interrupt-parent = <&mpc5200_pic>;
72 fsl,has-wdt; 70 fsl,has-wdt;
73 }; 71 };
74 72
75 timer@610 { // General Purpose Timer 73 timer@610 { // General Purpose Timer
76 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 74 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
77 cell-index = <1>;
78 reg = <0x610 0x10>; 75 reg = <0x610 0x10>;
79 interrupts = <1 10 0>; 76 interrupts = <1 10 0>;
80 interrupt-parent = <&mpc5200_pic>;
81 }; 77 };
82 78
83 timer@620 { // General Purpose Timer 79 timer@620 { // General Purpose Timer
84 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 80 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
85 cell-index = <2>;
86 reg = <0x620 0x10>; 81 reg = <0x620 0x10>;
87 interrupts = <1 11 0>; 82 interrupts = <1 11 0>;
88 interrupt-parent = <&mpc5200_pic>;
89 }; 83 };
90 84
91 timer@630 { // General Purpose Timer 85 timer@630 { // General Purpose Timer
92 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 86 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
93 cell-index = <3>;
94 reg = <0x630 0x10>; 87 reg = <0x630 0x10>;
95 interrupts = <1 12 0>; 88 interrupts = <1 12 0>;
96 interrupt-parent = <&mpc5200_pic>;
97 }; 89 };
98 90
99 timer@640 { // General Purpose Timer 91 timer@640 { // General Purpose Timer
100 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 92 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
101 cell-index = <4>;
102 reg = <0x640 0x10>; 93 reg = <0x640 0x10>;
103 interrupts = <1 13 0>; 94 interrupts = <1 13 0>;
104 interrupt-parent = <&mpc5200_pic>;
105 }; 95 };
106 96
107 timer@650 { // General Purpose Timer 97 timer@650 { // General Purpose Timer
108 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 98 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
109 cell-index = <5>;
110 reg = <0x650 0x10>; 99 reg = <0x650 0x10>;
111 interrupts = <1 14 0>; 100 interrupts = <1 14 0>;
112 interrupt-parent = <&mpc5200_pic>;
113 }; 101 };
114 102
115 timer@660 { // General Purpose Timer 103 timer@660 { // General Purpose Timer
116 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 104 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
117 cell-index = <6>;
118 reg = <0x660 0x10>; 105 reg = <0x660 0x10>;
119 interrupts = <1 15 0>; 106 interrupts = <1 15 0>;
120 interrupt-parent = <&mpc5200_pic>;
121 }; 107 };
122 108
123 timer@670 { // General Purpose Timer 109 timer@670 { // General Purpose Timer
124 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 110 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
125 cell-index = <7>;
126 reg = <0x670 0x10>; 111 reg = <0x670 0x10>;
127 interrupts = <1 16 0>; 112 interrupts = <1 16 0>;
128 interrupt-parent = <&mpc5200_pic>;
129 }; 113 };
130 114
131 rtc@800 { // Real time clock 115 rtc@800 { // Real time clock
132 compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc"; 116 compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
133 reg = <0x800 0x100>; 117 reg = <0x800 0x100>;
134 interrupts = <1 5 0 1 6 0>; 118 interrupts = <1 5 0 1 6 0>;
135 interrupt-parent = <&mpc5200_pic>;
136 }; 119 };
137 120
138 can@900 { 121 can@900 {
139 compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan"; 122 compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
140 cell-index = <0>;
141 interrupts = <2 17 0>; 123 interrupts = <2 17 0>;
142 interrupt-parent = <&mpc5200_pic>;
143 reg = <0x900 0x80>; 124 reg = <0x900 0x80>;
144 }; 125 };
145 126
146 can@980 { 127 can@980 {
147 compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan"; 128 compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
148 cell-index = <1>;
149 interrupts = <2 18 0>; 129 interrupts = <2 18 0>;
150 interrupt-parent = <&mpc5200_pic>;
151 reg = <0x980 0x80>; 130 reg = <0x980 0x80>;
152 }; 131 };
153 132
154 gpio@b00 { 133 gpio_simple: gpio@b00 {
155 compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio"; 134 compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
156 reg = <0xb00 0x40>; 135 reg = <0xb00 0x40>;
157 interrupts = <1 7 0>; 136 interrupts = <1 7 0>;
158 interrupt-parent = <&mpc5200_pic>; 137 gpio-controller;
138 #gpio-cells = <2>;
159 }; 139 };
160 140
161 gpio@c00 { 141 gpio_wkup: gpio@c00 {
162 compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup"; 142 compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
163 reg = <0xc00 0x40>; 143 reg = <0xc00 0x40>;
164 interrupts = <1 8 0 0 3 0>; 144 interrupts = <1 8 0 0 3 0>;
165 interrupt-parent = <&mpc5200_pic>; 145 gpio-controller;
146 #gpio-cells = <2>;
166 }; 147 };
167 148
168 spi@f00 { 149 spi@f00 {
169 compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi"; 150 compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
170 reg = <0xf00 0x20>; 151 reg = <0xf00 0x20>;
171 interrupts = <2 13 0 2 14 0>; 152 interrupts = <2 13 0 2 14 0>;
172 interrupt-parent = <&mpc5200_pic>;
173 }; 153 };
174 154
175 usb@1000 { 155 usb@1000 {
176 compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be"; 156 compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
177 reg = <0x1000 0xff>; 157 reg = <0x1000 0xff>;
178 interrupts = <2 6 0>; 158 interrupts = <2 6 0>;
179 interrupt-parent = <&mpc5200_pic>;
180 }; 159 };
181 160
182 dma-controller@1200 { 161 dma-controller@1200 {
183 device_type = "dma-controller";
184 compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm"; 162 compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
185 reg = <0x1200 0x80>; 163 reg = <0x1200 0x80>;
186 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 164 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
187 3 4 0 3 5 0 3 6 0 3 7 0 165 3 4 0 3 5 0 3 6 0 3 7 0
188 3 8 0 3 9 0 3 10 0 3 11 0 166 3 8 0 3 9 0 3 10 0 3 11 0
189 3 12 0 3 13 0 3 14 0 3 15 0>; 167 3 12 0 3 13 0 3 14 0 3 15 0>;
190 interrupt-parent = <&mpc5200_pic>;
191 }; 168 };
192 169
193 xlb@1f00 { 170 xlb@1f00 {
@@ -196,13 +173,10 @@
196 }; 173 };
197 174
198 serial@2000 { // PSC1 175 serial@2000 { // PSC1
199 device_type = "serial";
200 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; 176 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
201 port-number = <0>; // Logical port assignment
202 cell-index = <0>; 177 cell-index = <0>;
203 reg = <0x2000 0x100>; 178 reg = <0x2000 0x100>;
204 interrupts = <2 1 0>; 179 interrupts = <2 1 0>;
205 interrupt-parent = <&mpc5200_pic>;
206 }; 180 };
207 181
208 // PSC2 in ac97 mode example 182 // PSC2 in ac97 mode example
@@ -211,7 +185,6 @@
211 // cell-index = <1>; 185 // cell-index = <1>;
212 // reg = <0x2200 0x100>; 186 // reg = <0x2200 0x100>;
213 // interrupts = <2 2 0>; 187 // interrupts = <2 2 0>;
214 // interrupt-parent = <&mpc5200_pic>;
215 //}; 188 //};
216 189
217 // PSC3 in CODEC mode example 190 // PSC3 in CODEC mode example
@@ -220,27 +193,22 @@
220 // cell-index = <2>; 193 // cell-index = <2>;
221 // reg = <0x2400 0x100>; 194 // reg = <0x2400 0x100>;
222 // interrupts = <2 3 0>; 195 // interrupts = <2 3 0>;
223 // interrupt-parent = <&mpc5200_pic>;
224 //}; 196 //};
225 197
226 // PSC4 in uart mode example 198 // PSC4 in uart mode example
227 //serial@2600 { // PSC4 199 //serial@2600 { // PSC4
228 // device_type = "serial";
229 // compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; 200 // compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
230 // cell-index = <3>; 201 // cell-index = <3>;
231 // reg = <0x2600 0x100>; 202 // reg = <0x2600 0x100>;
232 // interrupts = <2 11 0>; 203 // interrupts = <2 11 0>;
233 // interrupt-parent = <&mpc5200_pic>;
234 //}; 204 //};
235 205
236 // PSC5 in uart mode example 206 // PSC5 in uart mode example
237 //serial@2800 { // PSC5 207 //serial@2800 { // PSC5
238 // device_type = "serial";
239 // compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; 208 // compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
240 // cell-index = <4>; 209 // cell-index = <4>;
241 // reg = <0x2800 0x100>; 210 // reg = <0x2800 0x100>;
242 // interrupts = <2 12 0>; 211 // interrupts = <2 12 0>;
243 // interrupt-parent = <&mpc5200_pic>;
244 //}; 212 //};
245 213
246 // PSC6 in spi mode example 214 // PSC6 in spi mode example
@@ -249,49 +217,40 @@
249 // cell-index = <5>; 217 // cell-index = <5>;
250 // reg = <0x2c00 0x100>; 218 // reg = <0x2c00 0x100>;
251 // interrupts = <2 4 0>; 219 // interrupts = <2 4 0>;
252 // interrupt-parent = <&mpc5200_pic>;
253 //}; 220 //};
254 221
255 ethernet@3000 { 222 ethernet@3000 {
256 device_type = "network";
257 compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec"; 223 compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
258 reg = <0x3000 0x400>; 224 reg = <0x3000 0x400>;
259 local-mac-address = [ 00 00 00 00 00 00 ]; 225 local-mac-address = [ 00 00 00 00 00 00 ];
260 interrupts = <2 5 0>; 226 interrupts = <2 5 0>;
261 interrupt-parent = <&mpc5200_pic>;
262 phy-handle = <&phy0>; 227 phy-handle = <&phy0>;
263 }; 228 };
264 229
265 mdio@3000 { 230 mdio@3000 {
266 #address-cells = <1>; 231 #address-cells = <1>;
267 #size-cells = <0>; 232 #size-cells = <0>;
268 compatible = "fsl,mpc5200b-mdio", "fsl,mpc5200-mdio"; 233 compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
269 reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts 234 reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
270 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. 235 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
271 interrupt-parent = <&mpc5200_pic>;
272 236
273 phy0: ethernet-phy@0 { 237 phy0: ethernet-phy@0 {
274 device_type = "ethernet-phy";
275 reg = <0>; 238 reg = <0>;
276 }; 239 };
277 }; 240 };
278 241
279 ata@3a00 { 242 ata@3a00 {
280 device_type = "ata";
281 compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata"; 243 compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
282 reg = <0x3a00 0x100>; 244 reg = <0x3a00 0x100>;
283 interrupts = <2 7 0>; 245 interrupts = <2 7 0>;
284 interrupt-parent = <&mpc5200_pic>;
285 }; 246 };
286 247
287 i2c@3d00 { 248 i2c@3d00 {
288 #address-cells = <1>; 249 #address-cells = <1>;
289 #size-cells = <0>; 250 #size-cells = <0>;
290 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; 251 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
291 cell-index = <0>;
292 reg = <0x3d00 0x40>; 252 reg = <0x3d00 0x40>;
293 interrupts = <2 15 0>; 253 interrupts = <2 15 0>;
294 interrupt-parent = <&mpc5200_pic>;
295 fsl5200-clocking; 254 fsl5200-clocking;
296 }; 255 };
297 256
@@ -299,14 +258,13 @@
299 #address-cells = <1>; 258 #address-cells = <1>;
300 #size-cells = <0>; 259 #size-cells = <0>;
301 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; 260 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
302 cell-index = <1>;
303 reg = <0x3d40 0x40>; 261 reg = <0x3d40 0x40>;
304 interrupts = <2 16 0>; 262 interrupts = <2 16 0>;
305 interrupt-parent = <&mpc5200_pic>;
306 fsl5200-clocking; 263 fsl5200-clocking;
307 }; 264 };
265
308 sram@8000 { 266 sram@8000 {
309 compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram","sram"; 267 compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
310 reg = <0x8000 0x4000>; 268 reg = <0x8000 0x4000>;
311 }; 269 };
312 }; 270 };
@@ -330,7 +288,6 @@
330 0xc800 0 0 4 &mpc5200_pic 0 0 3>; 288 0xc800 0 0 4 &mpc5200_pic 0 0 3>;
331 clock-frequency = <0>; // From boot loader 289 clock-frequency = <0>; // From boot loader
332 interrupts = <2 8 0 2 9 0 2 10 0>; 290 interrupts = <2 8 0 2 9 0 2 10 0>;
333 interrupt-parent = <&mpc5200_pic>;
334 bus-range = <0 0>; 291 bus-range = <0 0>;
335 ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000 292 ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000
336 0x02000000 0 0xa0000000 0xa0000000 0 0x10000000 293 0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
diff --git a/arch/powerpc/boot/dts/media5200.dts b/arch/powerpc/boot/dts/media5200.dts
new file mode 100644
index 000000000000..e297d8b41875
--- /dev/null
+++ b/arch/powerpc/boot/dts/media5200.dts
@@ -0,0 +1,318 @@
1/*
2 * Freescale Media5200 board Device Tree Source
3 *
4 * Copyright 2009 Secret Lab Technologies Ltd.
5 * Grant Likely <grant.likely@secretlab.ca>
6 * Steven Cavanagh <scavanagh@secretlab.ca>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14/dts-v1/;
15
16/ {
17 model = "fsl,media5200";
18 compatible = "fsl,media5200";
19 #address-cells = <1>;
20 #size-cells = <1>;
21 interrupt-parent = <&mpc5200_pic>;
22
23 aliases {
24 console = &console;
25 ethernet0 = &eth0;
26 };
27
28 chosen {
29 linux,stdout-path = &console;
30 };
31
32 cpus {
33 #address-cells = <1>;
34 #size-cells = <0>;
35
36 PowerPC,5200@0 {
37 device_type = "cpu";
38 reg = <0>;
39 d-cache-line-size = <32>;
40 i-cache-line-size = <32>;
41 d-cache-size = <0x4000>; // L1, 16K
42 i-cache-size = <0x4000>; // L1, 16K
43 timebase-frequency = <33000000>; // 33 MHz, these were configured by U-Boot
44 bus-frequency = <132000000>; // 132 MHz
45 clock-frequency = <396000000>; // 396 MHz
46 };
47 };
48
49 memory {
50 device_type = "memory";
51 reg = <0x00000000 0x08000000>; // 128MB RAM
52 };
53
54 soc@f0000000 {
55 #address-cells = <1>;
56 #size-cells = <1>;
57 compatible = "fsl,mpc5200b-immr";
58 ranges = <0 0xf0000000 0x0000c000>;
59 reg = <0xf0000000 0x00000100>;
60 bus-frequency = <132000000>;// 132 MHz
61 system-frequency = <0>; // from bootloader
62
63 cdm@200 {
64 compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
65 reg = <0x200 0x38>;
66 };
67
68 mpc5200_pic: interrupt-controller@500 {
69 // 5200 interrupts are encoded into two levels;
70 interrupt-controller;
71 #interrupt-cells = <3>;
72 compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
73 reg = <0x500 0x80>;
74 };
75
76 timer@600 { // General Purpose Timer
77 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
78 reg = <0x600 0x10>;
79 interrupts = <1 9 0>;
80 fsl,has-wdt;
81 };
82
83 timer@610 { // General Purpose Timer
84 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
85 reg = <0x610 0x10>;
86 interrupts = <1 10 0>;
87 };
88
89 timer@620 { // General Purpose Timer
90 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
91 reg = <0x620 0x10>;
92 interrupts = <1 11 0>;
93 };
94
95 timer@630 { // General Purpose Timer
96 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
97 reg = <0x630 0x10>;
98 interrupts = <1 12 0>;
99 };
100
101 timer@640 { // General Purpose Timer
102 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
103 reg = <0x640 0x10>;
104 interrupts = <1 13 0>;
105 };
106
107 timer@650 { // General Purpose Timer
108 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
109 reg = <0x650 0x10>;
110 interrupts = <1 14 0>;
111 };
112
113 timer@660 { // General Purpose Timer
114 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
115 reg = <0x660 0x10>;
116 interrupts = <1 15 0>;
117 };
118
119 timer@670 { // General Purpose Timer
120 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
121 reg = <0x670 0x10>;
122 interrupts = <1 16 0>;
123 };
124
125 rtc@800 { // Real time clock
126 compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
127 reg = <0x800 0x100>;
128 interrupts = <1 5 0 1 6 0>;
129 };
130
131 can@900 {
132 compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
133 interrupts = <2 17 0>;
134 reg = <0x900 0x80>;
135 };
136
137 can@980 {
138 compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
139 interrupts = <2 18 0>;
140 reg = <0x980 0x80>;
141 };
142
143 gpio_simple: gpio@b00 {
144 compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
145 reg = <0xb00 0x40>;
146 interrupts = <1 7 0>;
147 gpio-controller;
148 #gpio-cells = <2>;
149 };
150
151 gpio_wkup: gpio@c00 {
152 compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
153 reg = <0xc00 0x40>;
154 interrupts = <1 8 0 0 3 0>;
155 gpio-controller;
156 #gpio-cells = <2>;
157 };
158
159 spi@f00 {
160 compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
161 reg = <0xf00 0x20>;
162 interrupts = <2 13 0 2 14 0>;
163 };
164
165 usb@1000 {
166 compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
167 reg = <0x1000 0x100>;
168 interrupts = <2 6 0>;
169 };
170
171 dma-controller@1200 {
172 compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
173 reg = <0x1200 0x80>;
174 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
175 3 4 0 3 5 0 3 6 0 3 7 0
176 3 8 0 3 9 0 3 10 0 3 11 0
177 3 12 0 3 13 0 3 14 0 3 15 0>;
178 };
179
180 xlb@1f00 {
181 compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
182 reg = <0x1f00 0x100>;
183 };
184
185 // PSC6 in uart mode
186 console: serial@2c00 { // PSC6
187 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
188 cell-index = <5>;
189 port-number = <0>; // Logical port assignment
190 reg = <0x2c00 0x100>;
191 interrupts = <2 4 0>;
192 };
193
194 eth0: ethernet@3000 {
195 compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
196 reg = <0x3000 0x400>;
197 local-mac-address = [ 00 00 00 00 00 00 ];
198 interrupts = <2 5 0>;
199 phy-handle = <&phy0>;
200 };
201
202 mdio@3000 {
203 #address-cells = <1>;
204 #size-cells = <0>;
205 compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
206 reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
207 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
208
209 phy0: ethernet-phy@0 {
210 reg = <0>;
211 };
212 };
213
214 ata@3a00 {
215 compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
216 reg = <0x3a00 0x100>;
217 interrupts = <2 7 0>;
218 };
219
220 i2c@3d00 {
221 #address-cells = <1>;
222 #size-cells = <0>;
223 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
224 reg = <0x3d00 0x40>;
225 interrupts = <2 15 0>;
226 fsl5200-clocking;
227 };
228
229 i2c@3d40 {
230 #address-cells = <1>;
231 #size-cells = <0>;
232 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
233 reg = <0x3d40 0x40>;
234 interrupts = <2 16 0>;
235 fsl5200-clocking;
236 };
237
238 sram@8000 {
239 compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
240 reg = <0x8000 0x4000>;
241 };
242 };
243
244 pci@f0000d00 {
245 #interrupt-cells = <1>;
246 #size-cells = <2>;
247 #address-cells = <3>;
248 device_type = "pci";
249 compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci";
250 reg = <0xf0000d00 0x100>;
251 interrupt-map-mask = <0xf800 0 0 7>;
252 interrupt-map = <0xc000 0 0 1 &media5200_fpga 0 2 // 1st slot
253 0xc000 0 0 2 &media5200_fpga 0 3
254 0xc000 0 0 3 &media5200_fpga 0 4
255 0xc000 0 0 4 &media5200_fpga 0 5
256
257 0xc800 0 0 1 &media5200_fpga 0 3 // 2nd slot
258 0xc800 0 0 2 &media5200_fpga 0 4
259 0xc800 0 0 3 &media5200_fpga 0 5
260 0xc800 0 0 4 &media5200_fpga 0 2
261
262 0xd000 0 0 1 &media5200_fpga 0 4 // miniPCI
263 0xd000 0 0 2 &media5200_fpga 0 5
264
265 0xe000 0 0 1 &media5200_fpga 0 5 // CoralIP
266 >;
267 clock-frequency = <0>; // From boot loader
268 interrupts = <2 8 0 2 9 0 2 10 0>;
269 interrupt-parent = <&mpc5200_pic>;
270 bus-range = <0 0>;
271 ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000
272 0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
273 0x01000000 0 0x00000000 0xb0000000 0 0x01000000>;
274 };
275
276 localbus {
277 compatible = "fsl,mpc5200b-lpb","simple-bus";
278 #address-cells = <2>;
279 #size-cells = <1>;
280
281 ranges = < 0 0 0xfc000000 0x02000000
282 1 0 0xfe000000 0x02000000
283 2 0 0xf0010000 0x00010000
284 3 0 0xf0020000 0x00010000 >;
285
286 flash@0,0 {
287 compatible = "amd,am29lv28ml", "cfi-flash";
288 reg = <0 0x0 0x2000000>; // 32 MB
289 bank-width = <4>; // Width in bytes of the flash bank
290 device-width = <2>; // Two devices on each bank
291 };
292
293 flash@1,0 {
294 compatible = "amd,am29lv28ml", "cfi-flash";
295 reg = <1 0 0x2000000>; // 32 MB
296 bank-width = <4>; // Width in bytes of the flash bank
297 device-width = <2>; // Two devices on each bank
298 };
299
300 media5200_fpga: fpga@2,0 {
301 compatible = "fsl,media5200-fpga";
302 interrupt-controller;
303 #interrupt-cells = <2>; // 0:bank 1:id; no type field
304 reg = <2 0 0x10000>;
305
306 interrupt-parent = <&mpc5200_pic>;
307 interrupts = <0 0 3 // IRQ bank 0
308 1 1 3>; // IRQ bank 1
309 };
310
311 uart@3,0 {
312 compatible = "ti,tl16c752bpt";
313 reg = <3 0 0x10000>;
314 interrupt-parent = <&media5200_fpga>;
315 interrupts = <0 0 0 1>; // 2 irqs
316 };
317 };
318};
diff --git a/arch/powerpc/boot/dts/motionpro.dts b/arch/powerpc/boot/dts/motionpro.dts
index 52ba6f98b273..7be8ca038676 100644
--- a/arch/powerpc/boot/dts/motionpro.dts
+++ b/arch/powerpc/boot/dts/motionpro.dts
@@ -17,6 +17,7 @@
17 compatible = "promess,motionpro"; 17 compatible = "promess,motionpro";
18 #address-cells = <1>; 18 #address-cells = <1>;
19 #size-cells = <1>; 19 #size-cells = <1>;
20 interrupt-parent = <&mpc5200_pic>;
20 21
21 cpus { 22 cpus {
22 #address-cells = <1>; 23 #address-cells = <1>;
@@ -66,7 +67,6 @@
66 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 67 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
67 reg = <0x600 0x10>; 68 reg = <0x600 0x10>;
68 interrupts = <1 9 0>; 69 interrupts = <1 9 0>;
69 interrupt-parent = <&mpc5200_pic>;
70 fsl,has-wdt; 70 fsl,has-wdt;
71 }; 71 };
72 72
@@ -74,35 +74,30 @@
74 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 74 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
75 reg = <0x610 0x10>; 75 reg = <0x610 0x10>;
76 interrupts = <1 10 0>; 76 interrupts = <1 10 0>;
77 interrupt-parent = <&mpc5200_pic>;
78 }; 77 };
79 78
80 timer@620 { // General Purpose Timer 79 timer@620 { // General Purpose Timer
81 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 80 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
82 reg = <0x620 0x10>; 81 reg = <0x620 0x10>;
83 interrupts = <1 11 0>; 82 interrupts = <1 11 0>;
84 interrupt-parent = <&mpc5200_pic>;
85 }; 83 };
86 84
87 timer@630 { // General Purpose Timer 85 timer@630 { // General Purpose Timer
88 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 86 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
89 reg = <0x630 0x10>; 87 reg = <0x630 0x10>;
90 interrupts = <1 12 0>; 88 interrupts = <1 12 0>;
91 interrupt-parent = <&mpc5200_pic>;
92 }; 89 };
93 90
94 timer@640 { // General Purpose Timer 91 timer@640 { // General Purpose Timer
95 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 92 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
96 reg = <0x640 0x10>; 93 reg = <0x640 0x10>;
97 interrupts = <1 13 0>; 94 interrupts = <1 13 0>;
98 interrupt-parent = <&mpc5200_pic>;
99 }; 95 };
100 96
101 timer@650 { // General Purpose Timer 97 timer@650 { // General Purpose Timer
102 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 98 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
103 reg = <0x650 0x10>; 99 reg = <0x650 0x10>;
104 interrupts = <1 14 0>; 100 interrupts = <1 14 0>;
105 interrupt-parent = <&mpc5200_pic>;
106 }; 101 };
107 102
108 motionpro-led@660 { // Motion-PRO status LED 103 motionpro-led@660 { // Motion-PRO status LED
@@ -110,7 +105,6 @@
110 label = "motionpro-statusled"; 105 label = "motionpro-statusled";
111 reg = <0x660 0x10>; 106 reg = <0x660 0x10>;
112 interrupts = <1 15 0>; 107 interrupts = <1 15 0>;
113 interrupt-parent = <&mpc5200_pic>;
114 blink-delay = <100>; // 100 msec 108 blink-delay = <100>; // 100 msec
115 }; 109 };
116 110
@@ -119,49 +113,46 @@
119 label = "motionpro-readyled"; 113 label = "motionpro-readyled";
120 reg = <0x670 0x10>; 114 reg = <0x670 0x10>;
121 interrupts = <1 16 0>; 115 interrupts = <1 16 0>;
122 interrupt-parent = <&mpc5200_pic>;
123 }; 116 };
124 117
125 rtc@800 { // Real time clock 118 rtc@800 { // Real time clock
126 compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc"; 119 compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
127 reg = <0x800 0x100>; 120 reg = <0x800 0x100>;
128 interrupts = <1 5 0 1 6 0>; 121 interrupts = <1 5 0 1 6 0>;
129 interrupt-parent = <&mpc5200_pic>;
130 }; 122 };
131 123
132 can@980 { 124 can@980 {
133 compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan"; 125 compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
134 interrupts = <2 18 0>; 126 interrupts = <2 18 0>;
135 interrupt-parent = <&mpc5200_pic>;
136 reg = <0x980 0x80>; 127 reg = <0x980 0x80>;
137 }; 128 };
138 129
139 gpio@b00 { 130 gpio_simple: gpio@b00 {
140 compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio"; 131 compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
141 reg = <0xb00 0x40>; 132 reg = <0xb00 0x40>;
142 interrupts = <1 7 0>; 133 interrupts = <1 7 0>;
143 interrupt-parent = <&mpc5200_pic>; 134 gpio-controller;
135 #gpio-cells = <2>;
144 }; 136 };
145 137
146 gpio@c00 { 138 gpio_wkup: gpio@c00 {
147 compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup"; 139 compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
148 reg = <0xc00 0x40>; 140 reg = <0xc00 0x40>;
149 interrupts = <1 8 0 0 3 0>; 141 interrupts = <1 8 0 0 3 0>;
150 interrupt-parent = <&mpc5200_pic>; 142 gpio-controller;
143 #gpio-cells = <2>;
151 }; 144 };
152 145
153 spi@f00 { 146 spi@f00 {
154 compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi"; 147 compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
155 reg = <0xf00 0x20>; 148 reg = <0xf00 0x20>;
156 interrupts = <2 13 0 2 14 0>; 149 interrupts = <2 13 0 2 14 0>;
157 interrupt-parent = <&mpc5200_pic>;
158 }; 150 };
159 151
160 usb@1000 { 152 usb@1000 {
161 compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be"; 153 compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
162 reg = <0x1000 0xff>; 154 reg = <0x1000 0xff>;
163 interrupts = <2 6 0>; 155 interrupts = <2 6 0>;
164 interrupt-parent = <&mpc5200_pic>;
165 }; 156 };
166 157
167 dma-controller@1200 { 158 dma-controller@1200 {
@@ -171,7 +162,6 @@
171 3 4 0 3 5 0 3 6 0 3 7 0 162 3 4 0 3 5 0 3 6 0 3 7 0
172 3 8 0 3 9 0 3 10 0 3 11 0 163 3 8 0 3 9 0 3 10 0 3 11 0
173 3 12 0 3 13 0 3 14 0 3 15 0>; 164 3 12 0 3 13 0 3 14 0 3 15 0>;
174 interrupt-parent = <&mpc5200_pic>;
175 }; 165 };
176 166
177 xlb@1f00 { 167 xlb@1f00 {
@@ -180,12 +170,9 @@
180 }; 170 };
181 171
182 serial@2000 { // PSC1 172 serial@2000 { // PSC1
183 device_type = "serial";
184 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; 173 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
185 port-number = <0>; // Logical port assignment
186 reg = <0x2000 0x100>; 174 reg = <0x2000 0x100>;
187 interrupts = <2 1 0>; 175 interrupts = <2 1 0>;
188 interrupt-parent = <&mpc5200_pic>;
189 }; 176 };
190 177
191 // PSC2 in spi master mode 178 // PSC2 in spi master mode
@@ -194,26 +181,20 @@
194 cell-index = <1>; 181 cell-index = <1>;
195 reg = <0x2200 0x100>; 182 reg = <0x2200 0x100>;
196 interrupts = <2 2 0>; 183 interrupts = <2 2 0>;
197 interrupt-parent = <&mpc5200_pic>;
198 }; 184 };
199 185
200 // PSC5 in uart mode 186 // PSC5 in uart mode
201 serial@2800 { // PSC5 187 serial@2800 { // PSC5
202 device_type = "serial";
203 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; 188 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
204 port-number = <4>; // Logical port assignment
205 reg = <0x2800 0x100>; 189 reg = <0x2800 0x100>;
206 interrupts = <2 12 0>; 190 interrupts = <2 12 0>;
207 interrupt-parent = <&mpc5200_pic>;
208 }; 191 };
209 192
210 ethernet@3000 { 193 ethernet@3000 {
211 device_type = "network";
212 compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec"; 194 compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
213 reg = <0x3000 0x400>; 195 reg = <0x3000 0x400>;
214 local-mac-address = [ 00 00 00 00 00 00 ]; 196 local-mac-address = [ 00 00 00 00 00 00 ];
215 interrupts = <2 5 0>; 197 interrupts = <2 5 0>;
216 interrupt-parent = <&mpc5200_pic>;
217 phy-handle = <&phy0>; 198 phy-handle = <&phy0>;
218 }; 199 };
219 200
@@ -223,10 +204,8 @@
223 compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio"; 204 compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
224 reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts 205 reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
225 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. 206 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
226 interrupt-parent = <&mpc5200_pic>;
227 207
228 phy0: ethernet-phy@2 { 208 phy0: ethernet-phy@2 {
229 device_type = "ethernet-phy";
230 reg = <2>; 209 reg = <2>;
231 }; 210 };
232 }; 211 };
@@ -235,7 +214,6 @@
235 compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata"; 214 compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
236 reg = <0x3a00 0x100>; 215 reg = <0x3a00 0x100>;
237 interrupts = <2 7 0>; 216 interrupts = <2 7 0>;
238 interrupt-parent = <&mpc5200_pic>;
239 }; 217 };
240 218
241 i2c@3d40 { 219 i2c@3d40 {
@@ -244,7 +222,6 @@
244 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; 222 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
245 reg = <0x3d40 0x40>; 223 reg = <0x3d40 0x40>;
246 interrupts = <2 16 0>; 224 interrupts = <2 16 0>;
247 interrupt-parent = <&mpc5200_pic>;
248 fsl5200-clocking; 225 fsl5200-clocking;
249 226
250 rtc@68 { 227 rtc@68 {
@@ -259,8 +236,8 @@
259 }; 236 };
260 }; 237 };
261 238
262 lpb { 239 localbus {
263 compatible = "fsl,lpb"; 240 compatible = "fsl,mpc5200b-lpb","simple-bus";
264 #address-cells = <2>; 241 #address-cells = <2>;
265 #size-cells = <1>; 242 #size-cells = <1>;
266 ranges = <0 0 0xff000000 0x01000000 243 ranges = <0 0 0xff000000 0x01000000
@@ -273,7 +250,6 @@
273 compatible = "promess,motionpro-kollmorgen"; 250 compatible = "promess,motionpro-kollmorgen";
274 reg = <1 0 0x10000>; 251 reg = <1 0 0x10000>;
275 interrupts = <1 1 0>; 252 interrupts = <1 1 0>;
276 interrupt-parent = <&mpc5200_pic>;
277 }; 253 };
278 254
279 // 8-bit board CPLD on LocalPlus Bus CS2 255 // 8-bit board CPLD on LocalPlus Bus CS2
diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts b/arch/powerpc/boot/dts/mpc8313erdb.dts
index 3ebf7ec0484c..761faa7b6964 100644
--- a/arch/powerpc/boot/dts/mpc8313erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8313erdb.dts
@@ -180,7 +180,7 @@
180 #address-cells = <1>; 180 #address-cells = <1>;
181 #size-cells = <1>; 181 #size-cells = <1>;
182 sleep = <&pmc 0x20000000>; 182 sleep = <&pmc 0x20000000>;
183 ranges; 183 ranges = <0x0 0x24000 0x1000>;
184 184
185 cell-index = <0>; 185 cell-index = <0>;
186 device_type = "network"; 186 device_type = "network";
@@ -195,11 +195,11 @@
195 fixed-link = <1 1 1000 0 0>; 195 fixed-link = <1 1 1000 0 0>;
196 fsl,magic-packet; 196 fsl,magic-packet;
197 197
198 mdio@24520 { 198 mdio@520 {
199 #address-cells = <1>; 199 #address-cells = <1>;
200 #size-cells = <0>; 200 #size-cells = <0>;
201 compatible = "fsl,gianfar-mdio"; 201 compatible = "fsl,gianfar-mdio";
202 reg = <0x24520 0x20>; 202 reg = <0x520 0x20>;
203 phy4: ethernet-phy@4 { 203 phy4: ethernet-phy@4 {
204 interrupt-parent = <&ipic>; 204 interrupt-parent = <&ipic>;
205 interrupts = <20 0x8>; 205 interrupts = <20 0x8>;
@@ -221,6 +221,7 @@
221 model = "eTSEC"; 221 model = "eTSEC";
222 compatible = "gianfar"; 222 compatible = "gianfar";
223 reg = <0x25000 0x1000>; 223 reg = <0x25000 0x1000>;
224 ranges = <0x0 0x25000 0x1000>;
224 local-mac-address = [ 00 00 00 00 00 00 ]; 225 local-mac-address = [ 00 00 00 00 00 00 ];
225 interrupts = <34 0x8 33 0x8 32 0x8>; 226 interrupts = <34 0x8 33 0x8 32 0x8>;
226 interrupt-parent = <&ipic>; 227 interrupt-parent = <&ipic>;
@@ -229,11 +230,11 @@
229 sleep = <&pmc 0x10000000>; 230 sleep = <&pmc 0x10000000>;
230 fsl,magic-packet; 231 fsl,magic-packet;
231 232
232 mdio@25520 { 233 mdio@520 {
233 #address-cells = <1>; 234 #address-cells = <1>;
234 #size-cells = <0>; 235 #size-cells = <0>;
235 compatible = "fsl,gianfar-tbi"; 236 compatible = "fsl,gianfar-tbi";
236 reg = <0x25520 0x20>; 237 reg = <0x520 0x20>;
237 238
238 tbi1: tbi-phy@11 { 239 tbi1: tbi-phy@11 {
239 reg = <0x11>; 240 reg = <0x11>;
diff --git a/arch/powerpc/boot/dts/mpc8315erdb.dts b/arch/powerpc/boot/dts/mpc8315erdb.dts
index 71784165b77e..3f4c5fb988a0 100644
--- a/arch/powerpc/boot/dts/mpc8315erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8315erdb.dts
@@ -22,6 +22,8 @@
22 serial0 = &serial0; 22 serial0 = &serial0;
23 serial1 = &serial1; 23 serial1 = &serial1;
24 pci0 = &pci0; 24 pci0 = &pci0;
25 pci1 = &pci1;
26 pci2 = &pci2;
25 }; 27 };
26 28
27 cpus { 29 cpus {
@@ -188,66 +190,74 @@
188 phy_type = "utmi"; 190 phy_type = "utmi";
189 }; 191 };
190 192
191 mdio@24520 {
192 #address-cells = <1>;
193 #size-cells = <0>;
194 compatible = "fsl,gianfar-mdio";
195 reg = <0x24520 0x20>;
196 phy0: ethernet-phy@0 {
197 interrupt-parent = <&ipic>;
198 interrupts = <20 0x8>;
199 reg = <0x0>;
200 device_type = "ethernet-phy";
201 };
202 phy1: ethernet-phy@1 {
203 interrupt-parent = <&ipic>;
204 interrupts = <19 0x8>;
205 reg = <0x1>;
206 device_type = "ethernet-phy";
207 };
208 tbi0: tbi-phy@11 {
209 reg = <0x11>;
210 device_type = "tbi-phy";
211 };
212 };
213
214 mdio@25520 {
215 #address-cells = <1>;
216 #size-cells = <0>;
217 compatible = "fsl,gianfar-tbi";
218 reg = <0x25520 0x20>;
219
220 tbi1: tbi-phy@11 {
221 reg = <0x11>;
222 device_type = "tbi-phy";
223 };
224 };
225
226
227 enet0: ethernet@24000 { 193 enet0: ethernet@24000 {
194 #address-cells = <1>;
195 #size-cells = <1>;
228 cell-index = <0>; 196 cell-index = <0>;
229 device_type = "network"; 197 device_type = "network";
230 model = "eTSEC"; 198 model = "eTSEC";
231 compatible = "gianfar"; 199 compatible = "gianfar";
232 reg = <0x24000 0x1000>; 200 reg = <0x24000 0x1000>;
201 ranges = <0x0 0x24000 0x1000>;
233 local-mac-address = [ 00 00 00 00 00 00 ]; 202 local-mac-address = [ 00 00 00 00 00 00 ];
234 interrupts = <32 0x8 33 0x8 34 0x8>; 203 interrupts = <32 0x8 33 0x8 34 0x8>;
235 interrupt-parent = <&ipic>; 204 interrupt-parent = <&ipic>;
236 tbi-handle = <&tbi0>; 205 tbi-handle = <&tbi0>;
237 phy-handle = < &phy0 >; 206 phy-handle = < &phy0 >;
207
208 mdio@520 {
209 #address-cells = <1>;
210 #size-cells = <0>;
211 compatible = "fsl,gianfar-mdio";
212 reg = <0x520 0x20>;
213
214 phy0: ethernet-phy@0 {
215 interrupt-parent = <&ipic>;
216 interrupts = <20 0x8>;
217 reg = <0x0>;
218 device_type = "ethernet-phy";
219 };
220
221 phy1: ethernet-phy@1 {
222 interrupt-parent = <&ipic>;
223 interrupts = <19 0x8>;
224 reg = <0x1>;
225 device_type = "ethernet-phy";
226 };
227
228 tbi0: tbi-phy@11 {
229 reg = <0x11>;
230 device_type = "tbi-phy";
231 };
232 };
238 }; 233 };
239 234
240 enet1: ethernet@25000 { 235 enet1: ethernet@25000 {
236 #address-cells = <1>;
237 #size-cells = <1>;
241 cell-index = <1>; 238 cell-index = <1>;
242 device_type = "network"; 239 device_type = "network";
243 model = "eTSEC"; 240 model = "eTSEC";
244 compatible = "gianfar"; 241 compatible = "gianfar";
245 reg = <0x25000 0x1000>; 242 reg = <0x25000 0x1000>;
243 ranges = <0x0 0x25000 0x1000>;
246 local-mac-address = [ 00 00 00 00 00 00 ]; 244 local-mac-address = [ 00 00 00 00 00 00 ];
247 interrupts = <35 0x8 36 0x8 37 0x8>; 245 interrupts = <35 0x8 36 0x8 37 0x8>;
248 interrupt-parent = <&ipic>; 246 interrupt-parent = <&ipic>;
249 tbi-handle = <&tbi1>; 247 tbi-handle = <&tbi1>;
250 phy-handle = < &phy1 >; 248 phy-handle = < &phy1 >;
249
250 mdio@520 {
251 #address-cells = <1>;
252 #size-cells = <0>;
253 compatible = "fsl,gianfar-tbi";
254 reg = <0x520 0x20>;
255
256 tbi1: tbi-phy@11 {
257 reg = <0x11>;
258 device_type = "tbi-phy";
259 };
260 };
251 }; 261 };
252 262
253 serial0: serial@4500 { 263 serial0: serial@4500 {
@@ -349,4 +359,66 @@
349 compatible = "fsl,mpc8349-pci"; 359 compatible = "fsl,mpc8349-pci";
350 device_type = "pci"; 360 device_type = "pci";
351 }; 361 };
362
363 pci1: pcie@e0009000 {
364 #address-cells = <3>;
365 #size-cells = <2>;
366 #interrupt-cells = <1>;
367 device_type = "pci";
368 compatible = "fsl,mpc8315-pcie", "fsl,mpc8314-pcie";
369 reg = <0xe0009000 0x00001000>;
370 ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
371 0x01000000 0 0x00000000 0xb1000000 0 0x00800000>;
372 bus-range = <0 255>;
373 interrupt-map-mask = <0xf800 0 0 7>;
374 interrupt-map = <0 0 0 1 &ipic 1 8
375 0 0 0 2 &ipic 1 8
376 0 0 0 3 &ipic 1 8
377 0 0 0 4 &ipic 1 8>;
378 clock-frequency = <0>;
379
380 pcie@0 {
381 #address-cells = <3>;
382 #size-cells = <2>;
383 device_type = "pci";
384 reg = <0 0 0 0 0>;
385 ranges = <0x02000000 0 0xa0000000
386 0x02000000 0 0xa0000000
387 0 0x10000000
388 0x01000000 0 0x00000000
389 0x01000000 0 0x00000000
390 0 0x00800000>;
391 };
392 };
393
394 pci2: pcie@e000a000 {
395 #address-cells = <3>;
396 #size-cells = <2>;
397 #interrupt-cells = <1>;
398 device_type = "pci";
399 compatible = "fsl,mpc8315-pcie", "fsl,mpc8314-pcie";
400 reg = <0xe000a000 0x00001000>;
401 ranges = <0x02000000 0 0xc0000000 0xc0000000 0 0x10000000
402 0x01000000 0 0x00000000 0xd1000000 0 0x00800000>;
403 bus-range = <0 255>;
404 interrupt-map-mask = <0xf800 0 0 7>;
405 interrupt-map = <0 0 0 1 &ipic 2 8
406 0 0 0 2 &ipic 2 8
407 0 0 0 3 &ipic 2 8
408 0 0 0 4 &ipic 2 8>;
409 clock-frequency = <0>;
410
411 pcie@0 {
412 #address-cells = <3>;
413 #size-cells = <2>;
414 device_type = "pci";
415 reg = <0 0 0 0 0>;
416 ranges = <0x02000000 0 0xc0000000
417 0x02000000 0 0xc0000000
418 0 0x10000000
419 0x01000000 0 0x00000000
420 0x01000000 0 0x00000000
421 0 0x00800000>;
422 };
423 };
352}; 424};
diff --git a/arch/powerpc/boot/dts/mpc832x_rdb.dts b/arch/powerpc/boot/dts/mpc832x_rdb.dts
index dea30910c136..4319bd70a580 100644
--- a/arch/powerpc/boot/dts/mpc832x_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc832x_rdb.dts
@@ -152,10 +152,21 @@
152 }; 152 };
153 153
154 par_io@1400 { 154 par_io@1400 {
155 #address-cells = <1>;
156 #size-cells = <1>;
155 reg = <0x1400 0x100>; 157 reg = <0x1400 0x100>;
158 ranges = <3 0x1448 0x18>;
159 compatible = "fsl,mpc8323-qe-pario";
156 device_type = "par_io"; 160 device_type = "par_io";
157 num-ports = <7>; 161 num-ports = <7>;
158 162
163 qe_pio_d: gpio-controller@1448 {
164 #gpio-cells = <2>;
165 compatible = "fsl,mpc8323-qe-pario-bank";
166 reg = <3 0x18>;
167 gpio-controller;
168 };
169
159 ucc2pio:ucc_pin@02 { 170 ucc2pio:ucc_pin@02 {
160 pio-map = < 171 pio-map = <
161 /* port pin dir open_drain assignment has_irq */ 172 /* port pin dir open_drain assignment has_irq */
@@ -225,12 +236,25 @@
225 }; 236 };
226 237
227 spi@4c0 { 238 spi@4c0 {
239 #address-cells = <1>;
240 #size-cells = <0>;
228 cell-index = <0>; 241 cell-index = <0>;
229 compatible = "fsl,spi"; 242 compatible = "fsl,spi";
230 reg = <0x4c0 0x40>; 243 reg = <0x4c0 0x40>;
231 interrupts = <2>; 244 interrupts = <2>;
232 interrupt-parent = <&qeic>; 245 interrupt-parent = <&qeic>;
246 gpios = <&qe_pio_d 13 0>;
233 mode = "cpu-qe"; 247 mode = "cpu-qe";
248
249 mmc-slot@0 {
250 compatible = "fsl,mpc8323rdb-mmc-slot",
251 "mmc-spi-slot";
252 reg = <0>;
253 gpios = <&qe_pio_d 14 1
254 &qe_pio_d 15 0>;
255 voltage-ranges = <3300 3300>;
256 spi-max-frequency = <50000000>;
257 };
234 }; 258 };
235 259
236 spi@500 { 260 spi@500 {
diff --git a/arch/powerpc/boot/dts/mpc8349emitx.dts b/arch/powerpc/boot/dts/mpc8349emitx.dts
index b5eda94a8e2a..1ae38f0ddef8 100644
--- a/arch/powerpc/boot/dts/mpc8349emitx.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitx.dts
@@ -170,57 +170,52 @@
170 phy_type = "ulpi"; 170 phy_type = "ulpi";
171 }; 171 };
172 172
173 mdio@24520 {
174 #address-cells = <1>;
175 #size-cells = <0>;
176 compatible = "fsl,gianfar-mdio";
177 reg = <0x24520 0x20>;
178
179 /* Vitesse 8201 */
180 phy1c: ethernet-phy@1c {
181 interrupt-parent = <&ipic>;
182 interrupts = <18 0x8>;
183 reg = <0x1c>;
184 device_type = "ethernet-phy";
185 };
186 tbi0: tbi-phy@11 {
187 reg = <0x11>;
188 device_type = "tbi-phy";
189 };
190 };
191
192 mdio@25520 {
193 #address-cells = <1>;
194 #size-cells = <0>;
195 compatible = "fsl,gianfar-tbi";
196 reg = <0x25520 0x20>;
197
198 tbi1: tbi-phy@11 {
199 reg = <0x11>;
200 device_type = "tbi-phy";
201 };
202 };
203
204 enet0: ethernet@24000 { 173 enet0: ethernet@24000 {
174 #address-cells = <1>;
175 #size-cells = <1>;
205 cell-index = <0>; 176 cell-index = <0>;
206 device_type = "network"; 177 device_type = "network";
207 model = "TSEC"; 178 model = "TSEC";
208 compatible = "gianfar"; 179 compatible = "gianfar";
209 reg = <0x24000 0x1000>; 180 reg = <0x24000 0x1000>;
181 ranges = <0x0 0x24000 0x1000>;
210 local-mac-address = [ 00 00 00 00 00 00 ]; 182 local-mac-address = [ 00 00 00 00 00 00 ];
211 interrupts = <32 0x8 33 0x8 34 0x8>; 183 interrupts = <32 0x8 33 0x8 34 0x8>;
212 interrupt-parent = <&ipic>; 184 interrupt-parent = <&ipic>;
213 tbi-handle = <&tbi0>; 185 tbi-handle = <&tbi0>;
214 phy-handle = <&phy1c>; 186 phy-handle = <&phy1c>;
215 linux,network-index = <0>; 187 linux,network-index = <0>;
188
189 mdio@520 {
190 #address-cells = <1>;
191 #size-cells = <0>;
192 compatible = "fsl,gianfar-mdio";
193 reg = <0x520 0x20>;
194
195 /* Vitesse 8201 */
196 phy1c: ethernet-phy@1c {
197 interrupt-parent = <&ipic>;
198 interrupts = <18 0x8>;
199 reg = <0x1c>;
200 device_type = "ethernet-phy";
201 };
202
203 tbi0: tbi-phy@11 {
204 reg = <0x11>;
205 device_type = "tbi-phy";
206 };
207 };
216 }; 208 };
217 209
218 enet1: ethernet@25000 { 210 enet1: ethernet@25000 {
211 #address-cells = <1>;
212 #size-cells = <1>;
219 cell-index = <1>; 213 cell-index = <1>;
220 device_type = "network"; 214 device_type = "network";
221 model = "TSEC"; 215 model = "TSEC";
222 compatible = "gianfar"; 216 compatible = "gianfar";
223 reg = <0x25000 0x1000>; 217 reg = <0x25000 0x1000>;
218 ranges = <0x0 0x25000 0x1000>;
224 local-mac-address = [ 00 00 00 00 00 00 ]; 219 local-mac-address = [ 00 00 00 00 00 00 ];
225 interrupts = <35 0x8 36 0x8 37 0x8>; 220 interrupts = <35 0x8 36 0x8 37 0x8>;
226 interrupt-parent = <&ipic>; 221 interrupt-parent = <&ipic>;
@@ -228,6 +223,18 @@
228 fixed-link = <1 1 1000 0 0>; 223 fixed-link = <1 1 1000 0 0>;
229 linux,network-index = <1>; 224 linux,network-index = <1>;
230 tbi-handle = <&tbi1>; 225 tbi-handle = <&tbi1>;
226
227 mdio@520 {
228 #address-cells = <1>;
229 #size-cells = <0>;
230 compatible = "fsl,gianfar-tbi";
231 reg = <0x520 0x20>;
232
233 tbi1: tbi-phy@11 {
234 reg = <0x11>;
235 device_type = "tbi-phy";
236 };
237 };
231 }; 238 };
232 239
233 serial0: serial@4500 { 240 serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/mpc8349emitxgp.dts b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
index c87a6015e165..662abe1fb804 100644
--- a/arch/powerpc/boot/dts/mpc8349emitxgp.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
@@ -149,37 +149,41 @@
149 phy_type = "ulpi"; 149 phy_type = "ulpi";
150 }; 150 };
151 151
152 mdio@24520 {
153 #address-cells = <1>;
154 #size-cells = <0>;
155 compatible = "fsl,gianfar-mdio";
156 reg = <0x24520 0x20>;
157
158 /* Vitesse 8201 */
159 phy1c: ethernet-phy@1c {
160 interrupt-parent = <&ipic>;
161 interrupts = <18 0x8>;
162 reg = <0x1c>;
163 device_type = "ethernet-phy";
164 };
165 tbi0: tbi-phy@11 {
166 reg = <0x11>;
167 device_type = "tbi-phy";
168 };
169 };
170
171 enet0: ethernet@24000 { 152 enet0: ethernet@24000 {
153 #address-cells = <1>;
154 #size-cells = <1>;
172 cell-index = <0>; 155 cell-index = <0>;
173 device_type = "network"; 156 device_type = "network";
174 model = "TSEC"; 157 model = "TSEC";
175 compatible = "gianfar"; 158 compatible = "gianfar";
176 reg = <0x24000 0x1000>; 159 reg = <0x24000 0x1000>;
160 ranges = <0x0 0x24000 0x1000>;
177 local-mac-address = [ 00 00 00 00 00 00 ]; 161 local-mac-address = [ 00 00 00 00 00 00 ];
178 interrupts = <32 0x8 33 0x8 34 0x8>; 162 interrupts = <32 0x8 33 0x8 34 0x8>;
179 interrupt-parent = <&ipic>; 163 interrupt-parent = <&ipic>;
180 tbi-handle = <&tbi0>; 164 tbi-handle = <&tbi0>;
181 phy-handle = <&phy1c>; 165 phy-handle = <&phy1c>;
182 linux,network-index = <0>; 166 linux,network-index = <0>;
167
168 mdio@520 {
169 #address-cells = <1>;
170 #size-cells = <0>;
171 compatible = "fsl,gianfar-mdio";
172 reg = <0x520 0x20>;
173
174 /* Vitesse 8201 */
175 phy1c: ethernet-phy@1c {
176 interrupt-parent = <&ipic>;
177 interrupts = <18 0x8>;
178 reg = <0x1c>;
179 device_type = "ethernet-phy";
180 };
181
182 tbi0: tbi-phy@11 {
183 reg = <0x11>;
184 device_type = "tbi-phy";
185 };
186 };
183 }; 187 };
184 188
185 serial0: serial@4500 { 189 serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/mpc834x_mds.dts b/arch/powerpc/boot/dts/mpc834x_mds.dts
index d9adba01c09c..d9f0a2325fa4 100644
--- a/arch/powerpc/boot/dts/mpc834x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc834x_mds.dts
@@ -167,69 +167,76 @@
167 phy_type = "ulpi"; 167 phy_type = "ulpi";
168 }; 168 };
169 169
170 mdio@24520 {
171 #address-cells = <1>;
172 #size-cells = <0>;
173 compatible = "fsl,gianfar-mdio";
174 reg = <0x24520 0x20>;
175
176 phy0: ethernet-phy@0 {
177 interrupt-parent = <&ipic>;
178 interrupts = <17 0x8>;
179 reg = <0x0>;
180 device_type = "ethernet-phy";
181 };
182 phy1: ethernet-phy@1 {
183 interrupt-parent = <&ipic>;
184 interrupts = <18 0x8>;
185 reg = <0x1>;
186 device_type = "ethernet-phy";
187 };
188 tbi0: tbi-phy@11 {
189 reg = <0x11>;
190 device_type = "tbi-phy";
191 };
192 };
193
194 mdio@25520 {
195 #address-cells = <1>;
196 #size-cells = <0>;
197 compatible = "fsl,gianfar-tbi";
198 reg = <0x25520 0x20>;
199
200 tbi1: tbi-phy@11 {
201 reg = <0x11>;
202 device_type = "tbi-phy";
203 };
204 };
205
206
207 enet0: ethernet@24000 { 170 enet0: ethernet@24000 {
171 #address-cells = <1>;
172 #size-cells = <1>;
208 cell-index = <0>; 173 cell-index = <0>;
209 device_type = "network"; 174 device_type = "network";
210 model = "TSEC"; 175 model = "TSEC";
211 compatible = "gianfar"; 176 compatible = "gianfar";
212 reg = <0x24000 0x1000>; 177 reg = <0x24000 0x1000>;
178 ranges = <0x0 0x24000 0x1000>;
213 local-mac-address = [ 00 00 00 00 00 00 ]; 179 local-mac-address = [ 00 00 00 00 00 00 ];
214 interrupts = <32 0x8 33 0x8 34 0x8>; 180 interrupts = <32 0x8 33 0x8 34 0x8>;
215 interrupt-parent = <&ipic>; 181 interrupt-parent = <&ipic>;
216 tbi-handle = <&tbi0>; 182 tbi-handle = <&tbi0>;
217 phy-handle = <&phy0>; 183 phy-handle = <&phy0>;
218 linux,network-index = <0>; 184 linux,network-index = <0>;
185
186 mdio@520 {
187 #address-cells = <1>;
188 #size-cells = <0>;
189 compatible = "fsl,gianfar-mdio";
190 reg = <0x520 0x20>;
191
192 phy0: ethernet-phy@0 {
193 interrupt-parent = <&ipic>;
194 interrupts = <17 0x8>;
195 reg = <0x0>;
196 device_type = "ethernet-phy";
197 };
198
199 phy1: ethernet-phy@1 {
200 interrupt-parent = <&ipic>;
201 interrupts = <18 0x8>;
202 reg = <0x1>;
203 device_type = "ethernet-phy";
204 };
205
206 tbi0: tbi-phy@11 {
207 reg = <0x11>;
208 device_type = "tbi-phy";
209 };
210 };
219 }; 211 };
220 212
221 enet1: ethernet@25000 { 213 enet1: ethernet@25000 {
214 #address-cells = <1>;
215 #size-cells = <1>;
222 cell-index = <1>; 216 cell-index = <1>;
223 device_type = "network"; 217 device_type = "network";
224 model = "TSEC"; 218 model = "TSEC";
225 compatible = "gianfar"; 219 compatible = "gianfar";
226 reg = <0x25000 0x1000>; 220 reg = <0x25000 0x1000>;
221 ranges = <0x0 0x25000 0x1000>;
227 local-mac-address = [ 00 00 00 00 00 00 ]; 222 local-mac-address = [ 00 00 00 00 00 00 ];
228 interrupts = <35 0x8 36 0x8 37 0x8>; 223 interrupts = <35 0x8 36 0x8 37 0x8>;
229 interrupt-parent = <&ipic>; 224 interrupt-parent = <&ipic>;
230 tbi-handle = <&tbi1>; 225 tbi-handle = <&tbi1>;
231 phy-handle = <&phy1>; 226 phy-handle = <&phy1>;
232 linux,network-index = <1>; 227 linux,network-index = <1>;
228
229 mdio@520 {
230 #address-cells = <1>;
231 #size-cells = <0>;
232 compatible = "fsl,gianfar-tbi";
233 reg = <0x520 0x20>;
234
235 tbi1: tbi-phy@11 {
236 reg = <0x11>;
237 device_type = "tbi-phy";
238 };
239 };
233 }; 240 };
234 241
235 serial0: serial@4500 { 242 serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/mpc8377_mds.dts b/arch/powerpc/boot/dts/mpc8377_mds.dts
index 1d14d7052e6d..963708017e6c 100644
--- a/arch/powerpc/boot/dts/mpc8377_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8377_mds.dts
@@ -23,6 +23,8 @@
23 serial0 = &serial0; 23 serial0 = &serial0;
24 serial1 = &serial1; 24 serial1 = &serial1;
25 pci0 = &pci0; 25 pci0 = &pci0;
26 pci1 = &pci1;
27 pci2 = &pci2;
26 }; 28 };
27 29
28 cpus { 30 cpus {
@@ -127,21 +129,38 @@
127 reg = <0x200 0x100>; 129 reg = <0x200 0x100>;
128 }; 130 };
129 131
130 i2c@3000 { 132 sleep-nexus {
131 #address-cells = <1>; 133 #address-cells = <1>;
132 #size-cells = <0>; 134 #size-cells = <1>;
133 cell-index = <0>; 135 compatible = "simple-bus";
134 compatible = "fsl-i2c"; 136 sleep = <&pmc 0x0c000000>;
135 reg = <0x3000 0x100>; 137 ranges;
136 interrupts = <14 0x8>; 138
137 interrupt-parent = <&ipic>; 139 i2c@3000 {
138 dfsrr; 140 #address-cells = <1>;
141 #size-cells = <0>;
142 cell-index = <0>;
143 compatible = "fsl-i2c";
144 reg = <0x3000 0x100>;
145 interrupts = <14 0x8>;
146 interrupt-parent = <&ipic>;
147 dfsrr;
148
149 rtc@68 {
150 compatible = "dallas,ds1374";
151 reg = <0x68>;
152 interrupts = <19 0x8>;
153 interrupt-parent = <&ipic>;
154 };
155 };
139 156
140 rtc@68 { 157 sdhci@2e000 {
141 compatible = "dallas,ds1374"; 158 compatible = "fsl,mpc8377-esdhc", "fsl,mpc8379-esdhc";
142 reg = <0x68>; 159 reg = <0x2e000 0x1000>;
143 interrupts = <19 0x8>; 160 interrupts = <42 0x8>;
144 interrupt-parent = <&ipic>; 161 interrupt-parent = <&ipic>;
162 /* Filled in by U-Boot */
163 clock-frequency = <0>;
145 }; 164 };
146 }; 165 };
147 166
@@ -174,70 +193,83 @@
174 interrupts = <38 0x8>; 193 interrupts = <38 0x8>;
175 dr_mode = "host"; 194 dr_mode = "host";
176 phy_type = "ulpi"; 195 phy_type = "ulpi";
196 sleep = <&pmc 0x00c00000>;
177 }; 197 };
178 198
179 mdio@24520 {
180 #address-cells = <1>;
181 #size-cells = <0>;
182 compatible = "fsl,gianfar-mdio";
183 reg = <0x24520 0x20>;
184 phy2: ethernet-phy@2 {
185 interrupt-parent = <&ipic>;
186 interrupts = <17 0x8>;
187 reg = <0x2>;
188 device_type = "ethernet-phy";
189 };
190 phy3: ethernet-phy@3 {
191 interrupt-parent = <&ipic>;
192 interrupts = <18 0x8>;
193 reg = <0x3>;
194 device_type = "ethernet-phy";
195 };
196 tbi0: tbi-phy@11 {
197 reg = <0x11>;
198 device_type = "tbi-phy";
199 };
200 };
201
202 mdio@25520 {
203 #address-cells = <1>;
204 #size-cells = <0>;
205 compatible = "fsl,gianfar-tbi";
206 reg = <0x25520 0x20>;
207
208 tbi1: tbi-phy@11 {
209 reg = <0x11>;
210 device_type = "tbi-phy";
211 };
212 };
213
214
215 enet0: ethernet@24000 { 199 enet0: ethernet@24000 {
200 #address-cells = <1>;
201 #size-cells = <1>;
216 cell-index = <0>; 202 cell-index = <0>;
217 device_type = "network"; 203 device_type = "network";
218 model = "eTSEC"; 204 model = "eTSEC";
219 compatible = "gianfar"; 205 compatible = "gianfar";
220 reg = <0x24000 0x1000>; 206 reg = <0x24000 0x1000>;
207 ranges = <0x0 0x24000 0x1000>;
221 local-mac-address = [ 00 00 00 00 00 00 ]; 208 local-mac-address = [ 00 00 00 00 00 00 ];
222 interrupts = <32 0x8 33 0x8 34 0x8>; 209 interrupts = <32 0x8 33 0x8 34 0x8>;
223 phy-connection-type = "mii"; 210 phy-connection-type = "mii";
224 interrupt-parent = <&ipic>; 211 interrupt-parent = <&ipic>;
225 tbi-handle = <&tbi0>; 212 tbi-handle = <&tbi0>;
226 phy-handle = <&phy2>; 213 phy-handle = <&phy2>;
214 sleep = <&pmc 0xc0000000>;
215 fsl,magic-packet;
216
217 mdio@520 {
218 #address-cells = <1>;
219 #size-cells = <0>;
220 compatible = "fsl,gianfar-mdio";
221 reg = <0x520 0x20>;
222
223 phy2: ethernet-phy@2 {
224 interrupt-parent = <&ipic>;
225 interrupts = <17 0x8>;
226 reg = <0x2>;
227 device_type = "ethernet-phy";
228 };
229
230 phy3: ethernet-phy@3 {
231 interrupt-parent = <&ipic>;
232 interrupts = <18 0x8>;
233 reg = <0x3>;
234 device_type = "ethernet-phy";
235 };
236
237 tbi0: tbi-phy@11 {
238 reg = <0x11>;
239 device_type = "tbi-phy";
240 };
241 };
227 }; 242 };
228 243
229 enet1: ethernet@25000 { 244 enet1: ethernet@25000 {
245 #address-cells = <1>;
246 #size-cells = <1>;
230 cell-index = <1>; 247 cell-index = <1>;
231 device_type = "network"; 248 device_type = "network";
232 model = "eTSEC"; 249 model = "eTSEC";
233 compatible = "gianfar"; 250 compatible = "gianfar";
234 reg = <0x25000 0x1000>; 251 reg = <0x25000 0x1000>;
252 ranges = <0x0 0x25000 0x1000>;
235 local-mac-address = [ 00 00 00 00 00 00 ]; 253 local-mac-address = [ 00 00 00 00 00 00 ];
236 interrupts = <35 0x8 36 0x8 37 0x8>; 254 interrupts = <35 0x8 36 0x8 37 0x8>;
237 phy-connection-type = "mii"; 255 phy-connection-type = "mii";
238 interrupt-parent = <&ipic>; 256 interrupt-parent = <&ipic>;
239 tbi-handle = <&tbi1>; 257 tbi-handle = <&tbi1>;
240 phy-handle = <&phy3>; 258 phy-handle = <&phy3>;
259 sleep = <&pmc 0x30000000>;
260 fsl,magic-packet;
261
262 mdio@520 {
263 #address-cells = <1>;
264 #size-cells = <0>;
265 compatible = "fsl,gianfar-tbi";
266 reg = <0x520 0x20>;
267
268 tbi1: tbi-phy@11 {
269 reg = <0x11>;
270 device_type = "tbi-phy";
271 };
272 };
241 }; 273 };
242 274
243 serial0: serial@4500 { 275 serial0: serial@4500 {
@@ -309,14 +341,7 @@
309 fsl,channel-fifo-len = <24>; 341 fsl,channel-fifo-len = <24>;
310 fsl,exec-units-mask = <0x9fe>; 342 fsl,exec-units-mask = <0x9fe>;
311 fsl,descriptor-types-mask = <0x3ab0ebf>; 343 fsl,descriptor-types-mask = <0x3ab0ebf>;
312 }; 344 sleep = <&pmc 0x03000000>;
313
314 sdhc@2e000 {
315 model = "eSDHC";
316 compatible = "fsl,esdhc";
317 reg = <0x2e000 0x1000>;
318 interrupts = <42 0x8>;
319 interrupt-parent = <&ipic>;
320 }; 345 };
321 346
322 sata@18000 { 347 sata@18000 {
@@ -324,6 +349,7 @@
324 reg = <0x18000 0x1000>; 349 reg = <0x18000 0x1000>;
325 interrupts = <44 0x8>; 350 interrupts = <44 0x8>;
326 interrupt-parent = <&ipic>; 351 interrupt-parent = <&ipic>;
352 sleep = <&pmc 0x000000c0>;
327 }; 353 };
328 354
329 sata@19000 { 355 sata@19000 {
@@ -331,6 +357,7 @@
331 reg = <0x19000 0x1000>; 357 reg = <0x19000 0x1000>;
332 interrupts = <45 0x8>; 358 interrupts = <45 0x8>;
333 interrupt-parent = <&ipic>; 359 interrupt-parent = <&ipic>;
360 sleep = <&pmc 0x00000030>;
334 }; 361 };
335 362
336 /* IPIC 363 /* IPIC
@@ -346,6 +373,13 @@
346 #interrupt-cells = <2>; 373 #interrupt-cells = <2>;
347 reg = <0x700 0x100>; 374 reg = <0x700 0x100>;
348 }; 375 };
376
377 pmc: power@b00 {
378 compatible = "fsl,mpc8377-pmc", "fsl,mpc8349-pmc";
379 reg = <0xb00 0x100 0xa00 0x100>;
380 interrupts = <80 0x8>;
381 interrupt-parent = <&ipic>;
382 };
349 }; 383 };
350 384
351 pci0: pci@e0008500 { 385 pci0: pci@e0008500 {
@@ -400,6 +434,7 @@
400 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 434 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
401 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 435 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
402 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>; 436 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
437 sleep = <&pmc 0x00010000>;
403 clock-frequency = <0>; 438 clock-frequency = <0>;
404 #interrupt-cells = <1>; 439 #interrupt-cells = <1>;
405 #size-cells = <2>; 440 #size-cells = <2>;
@@ -409,4 +444,68 @@
409 compatible = "fsl,mpc8349-pci"; 444 compatible = "fsl,mpc8349-pci";
410 device_type = "pci"; 445 device_type = "pci";
411 }; 446 };
447
448 pci1: pcie@e0009000 {
449 #address-cells = <3>;
450 #size-cells = <2>;
451 #interrupt-cells = <1>;
452 device_type = "pci";
453 compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
454 reg = <0xe0009000 0x00001000>;
455 ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000
456 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>;
457 bus-range = <0 255>;
458 interrupt-map-mask = <0xf800 0 0 7>;
459 interrupt-map = <0 0 0 1 &ipic 1 8
460 0 0 0 2 &ipic 1 8
461 0 0 0 3 &ipic 1 8
462 0 0 0 4 &ipic 1 8>;
463 sleep = <&pmc 0x00300000>;
464 clock-frequency = <0>;
465
466 pcie@0 {
467 #address-cells = <3>;
468 #size-cells = <2>;
469 device_type = "pci";
470 reg = <0 0 0 0 0>;
471 ranges = <0x02000000 0 0xa8000000
472 0x02000000 0 0xa8000000
473 0 0x10000000
474 0x01000000 0 0x00000000
475 0x01000000 0 0x00000000
476 0 0x00800000>;
477 };
478 };
479
480 pci2: pcie@e000a000 {
481 #address-cells = <3>;
482 #size-cells = <2>;
483 #interrupt-cells = <1>;
484 device_type = "pci";
485 compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
486 reg = <0xe000a000 0x00001000>;
487 ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000
488 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>;
489 bus-range = <0 255>;
490 interrupt-map-mask = <0xf800 0 0 7>;
491 interrupt-map = <0 0 0 1 &ipic 2 8
492 0 0 0 2 &ipic 2 8
493 0 0 0 3 &ipic 2 8
494 0 0 0 4 &ipic 2 8>;
495 sleep = <&pmc 0x000c0000>;
496 clock-frequency = <0>;
497
498 pcie@0 {
499 #address-cells = <3>;
500 #size-cells = <2>;
501 device_type = "pci";
502 reg = <0 0 0 0 0>;
503 ranges = <0x02000000 0 0xc8000000
504 0x02000000 0 0xc8000000
505 0 0x10000000
506 0x01000000 0 0x00000000
507 0x01000000 0 0x00000000
508 0 0x00800000>;
509 };
510 };
412}; 511};
diff --git a/arch/powerpc/boot/dts/mpc8377_rdb.dts b/arch/powerpc/boot/dts/mpc8377_rdb.dts
index 9413af3b9925..053339390c22 100644
--- a/arch/powerpc/boot/dts/mpc8377_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts
@@ -22,6 +22,8 @@
22 serial0 = &serial0; 22 serial0 = &serial0;
23 serial1 = &serial1; 23 serial1 = &serial1;
24 pci0 = &pci0; 24 pci0 = &pci0;
25 pci1 = &pci1;
26 pci2 = &pci2;
25 }; 27 };
26 28
27 cpus { 29 cpus {
@@ -107,26 +109,72 @@
107 reg = <0x200 0x100>; 109 reg = <0x200 0x100>;
108 }; 110 };
109 111
110 i2c@3000 { 112 gpio1: gpio-controller@c00 {
111 #address-cells = <1>; 113 #gpio-cells = <2>;
112 #size-cells = <0>; 114 compatible = "fsl,mpc8377-gpio", "fsl,mpc8349-gpio";
113 cell-index = <0>; 115 reg = <0xc00 0x100>;
114 compatible = "fsl-i2c"; 116 interrupts = <74 0x8>;
115 reg = <0x3000 0x100>;
116 interrupts = <14 0x8>;
117 interrupt-parent = <&ipic>; 117 interrupt-parent = <&ipic>;
118 dfsrr; 118 gpio-controller;
119 rtc@68 { 119 };
120 compatible = "dallas,ds1339"; 120
121 reg = <0x68>; 121 gpio2: gpio-controller@d00 {
122 #gpio-cells = <2>;
123 compatible = "fsl,mpc8377-gpio", "fsl,mpc8349-gpio";
124 reg = <0xd00 0x100>;
125 interrupts = <75 0x8>;
126 interrupt-parent = <&ipic>;
127 gpio-controller;
128 };
129
130 sleep-nexus {
131 #address-cells = <1>;
132 #size-cells = <1>;
133 compatible = "simple-bus";
134 sleep = <&pmc 0x0c000000>;
135 ranges;
136
137 i2c@3000 {
138 #address-cells = <1>;
139 #size-cells = <0>;
140 cell-index = <0>;
141 compatible = "fsl-i2c";
142 reg = <0x3000 0x100>;
143 interrupts = <14 0x8>;
144 interrupt-parent = <&ipic>;
145 dfsrr;
146
147 dtt@48 {
148 compatible = "national,lm75";
149 reg = <0x48>;
150 };
151
152 at24@50 {
153 compatible = "at24,24c256";
154 reg = <0x50>;
155 };
156
157 rtc@68 {
158 compatible = "dallas,ds1339";
159 reg = <0x68>;
160 };
161
162 mcu_pio: mcu@a {
163 #gpio-cells = <2>;
164 compatible = "fsl,mc9s08qg8-mpc8377erdb",
165 "fsl,mcu-mpc8349emitx";
166 reg = <0x0a>;
167 gpio-controller;
168 };
122 }; 169 };
123 170
124 mcu_pio: mcu@a { 171 sdhci@2e000 {
125 #gpio-cells = <2>; 172 compatible = "fsl,mpc8377-esdhc", "fsl,mpc8379-esdhc";
126 compatible = "fsl,mc9s08qg8-mpc8377erdb", 173 reg = <0x2e000 0x1000>;
127 "fsl,mcu-mpc8349emitx"; 174 interrupts = <42 0x8>;
128 reg = <0x0a>; 175 interrupt-parent = <&ipic>;
129 gpio-controller; 176 /* Filled in by U-Boot */
177 clock-frequency = <0>;
130 }; 178 };
131 }; 179 };
132 180
@@ -197,64 +245,76 @@
197 interrupt-parent = <&ipic>; 245 interrupt-parent = <&ipic>;
198 interrupts = <38 0x8>; 246 interrupts = <38 0x8>;
199 phy_type = "ulpi"; 247 phy_type = "ulpi";
248 sleep = <&pmc 0x00c00000>;
200 }; 249 };
201 250
202 mdio@24520 {
203 #address-cells = <1>;
204 #size-cells = <0>;
205 compatible = "fsl,gianfar-mdio";
206 reg = <0x24520 0x20>;
207 phy2: ethernet-phy@2 {
208 interrupt-parent = <&ipic>;
209 interrupts = <17 0x8>;
210 reg = <0x2>;
211 device_type = "ethernet-phy";
212 };
213 tbi0: tbi-phy@11 {
214 reg = <0x11>;
215 device_type = "tbi-phy";
216 };
217 };
218
219 mdio@25520 {
220 #address-cells = <1>;
221 #size-cells = <0>;
222 compatible = "fsl,gianfar-tbi";
223 reg = <0x25520 0x20>;
224
225 tbi1: tbi-phy@11 {
226 reg = <0x11>;
227 device_type = "tbi-phy";
228 };
229 };
230
231
232 enet0: ethernet@24000 { 251 enet0: ethernet@24000 {
252 #address-cells = <1>;
253 #size-cells = <1>;
233 cell-index = <0>; 254 cell-index = <0>;
234 device_type = "network"; 255 device_type = "network";
235 model = "eTSEC"; 256 model = "eTSEC";
236 compatible = "gianfar"; 257 compatible = "gianfar";
237 reg = <0x24000 0x1000>; 258 reg = <0x24000 0x1000>;
259 ranges = <0x0 0x24000 0x1000>;
238 local-mac-address = [ 00 00 00 00 00 00 ]; 260 local-mac-address = [ 00 00 00 00 00 00 ];
239 interrupts = <32 0x8 33 0x8 34 0x8>; 261 interrupts = <32 0x8 33 0x8 34 0x8>;
240 phy-connection-type = "mii"; 262 phy-connection-type = "mii";
241 interrupt-parent = <&ipic>; 263 interrupt-parent = <&ipic>;
242 tbi-handle = <&tbi0>; 264 tbi-handle = <&tbi0>;
243 phy-handle = <&phy2>; 265 phy-handle = <&phy2>;
266 sleep = <&pmc 0xc0000000>;
267 fsl,magic-packet;
268
269 mdio@520 {
270 #address-cells = <1>;
271 #size-cells = <0>;
272 compatible = "fsl,gianfar-mdio";
273 reg = <0x520 0x20>;
274
275 phy2: ethernet-phy@2 {
276 interrupt-parent = <&ipic>;
277 interrupts = <17 0x8>;
278 reg = <0x2>;
279 device_type = "ethernet-phy";
280 };
281
282 tbi0: tbi-phy@11 {
283 reg = <0x11>;
284 device_type = "tbi-phy";
285 };
286 };
244 }; 287 };
245 288
246 enet1: ethernet@25000 { 289 enet1: ethernet@25000 {
290 #address-cells = <1>;
291 #size-cells = <1>;
247 cell-index = <1>; 292 cell-index = <1>;
248 device_type = "network"; 293 device_type = "network";
249 model = "eTSEC"; 294 model = "eTSEC";
250 compatible = "gianfar"; 295 compatible = "gianfar";
251 reg = <0x25000 0x1000>; 296 reg = <0x25000 0x1000>;
297 ranges = <0x0 0x25000 0x1000>;
252 local-mac-address = [ 00 00 00 00 00 00 ]; 298 local-mac-address = [ 00 00 00 00 00 00 ];
253 interrupts = <35 0x8 36 0x8 37 0x8>; 299 interrupts = <35 0x8 36 0x8 37 0x8>;
254 phy-connection-type = "mii"; 300 phy-connection-type = "mii";
255 interrupt-parent = <&ipic>; 301 interrupt-parent = <&ipic>;
256 fixed-link = <1 1 1000 0 0>; 302 fixed-link = <1 1 1000 0 0>;
257 tbi-handle = <&tbi1>; 303 tbi-handle = <&tbi1>;
304 sleep = <&pmc 0x30000000>;
305 fsl,magic-packet;
306
307 mdio@520 {
308 #address-cells = <1>;
309 #size-cells = <0>;
310 compatible = "fsl,gianfar-tbi";
311 reg = <0x520 0x20>;
312
313 tbi1: tbi-phy@11 {
314 reg = <0x11>;
315 device_type = "tbi-phy";
316 };
317 };
258 }; 318 };
259 319
260 serial0: serial@4500 { 320 serial0: serial@4500 {
@@ -287,6 +347,7 @@
287 fsl,channel-fifo-len = <24>; 347 fsl,channel-fifo-len = <24>;
288 fsl,exec-units-mask = <0x9fe>; 348 fsl,exec-units-mask = <0x9fe>;
289 fsl,descriptor-types-mask = <0x3ab0ebf>; 349 fsl,descriptor-types-mask = <0x3ab0ebf>;
350 sleep = <&pmc 0x03000000>;
290 }; 351 };
291 352
292 sata@18000 { 353 sata@18000 {
@@ -294,6 +355,7 @@
294 reg = <0x18000 0x1000>; 355 reg = <0x18000 0x1000>;
295 interrupts = <44 0x8>; 356 interrupts = <44 0x8>;
296 interrupt-parent = <&ipic>; 357 interrupt-parent = <&ipic>;
358 sleep = <&pmc 0x000000c0>;
297 }; 359 };
298 360
299 sata@19000 { 361 sata@19000 {
@@ -301,6 +363,7 @@
301 reg = <0x19000 0x1000>; 363 reg = <0x19000 0x1000>;
302 interrupts = <45 0x8>; 364 interrupts = <45 0x8>;
303 interrupt-parent = <&ipic>; 365 interrupt-parent = <&ipic>;
366 sleep = <&pmc 0x00000030>;
304 }; 367 };
305 368
306 /* IPIC 369 /* IPIC
@@ -316,6 +379,13 @@
316 #interrupt-cells = <2>; 379 #interrupt-cells = <2>;
317 reg = <0x700 0x100>; 380 reg = <0x700 0x100>;
318 }; 381 };
382
383 pmc: power@b00 {
384 compatible = "fsl,mpc8377-pmc", "fsl,mpc8349-pmc";
385 reg = <0xb00 0x100 0xa00 0x100>;
386 interrupts = <80 0x8>;
387 interrupt-parent = <&ipic>;
388 };
319 }; 389 };
320 390
321 pci0: pci@e0008500 { 391 pci0: pci@e0008500 {
@@ -341,6 +411,7 @@
341 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 411 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
342 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 412 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
343 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>; 413 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
414 sleep = <&pmc 0x00010000>;
344 clock-frequency = <66666666>; 415 clock-frequency = <66666666>;
345 #interrupt-cells = <1>; 416 #interrupt-cells = <1>;
346 #size-cells = <2>; 417 #size-cells = <2>;
@@ -350,4 +421,68 @@
350 compatible = "fsl,mpc8349-pci"; 421 compatible = "fsl,mpc8349-pci";
351 device_type = "pci"; 422 device_type = "pci";
352 }; 423 };
424
425 pci1: pcie@e0009000 {
426 #address-cells = <3>;
427 #size-cells = <2>;
428 #interrupt-cells = <1>;
429 device_type = "pci";
430 compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
431 reg = <0xe0009000 0x00001000>;
432 ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000
433 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>;
434 bus-range = <0 255>;
435 interrupt-map-mask = <0xf800 0 0 7>;
436 interrupt-map = <0 0 0 1 &ipic 1 8
437 0 0 0 2 &ipic 1 8
438 0 0 0 3 &ipic 1 8
439 0 0 0 4 &ipic 1 8>;
440 sleep = <&pmc 0x00300000>;
441 clock-frequency = <0>;
442
443 pcie@0 {
444 #address-cells = <3>;
445 #size-cells = <2>;
446 device_type = "pci";
447 reg = <0 0 0 0 0>;
448 ranges = <0x02000000 0 0xa8000000
449 0x02000000 0 0xa8000000
450 0 0x10000000
451 0x01000000 0 0x00000000
452 0x01000000 0 0x00000000
453 0 0x00800000>;
454 };
455 };
456
457 pci2: pcie@e000a000 {
458 #address-cells = <3>;
459 #size-cells = <2>;
460 #interrupt-cells = <1>;
461 device_type = "pci";
462 compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
463 reg = <0xe000a000 0x00001000>;
464 ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000
465 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>;
466 bus-range = <0 255>;
467 interrupt-map-mask = <0xf800 0 0 7>;
468 interrupt-map = <0 0 0 1 &ipic 2 8
469 0 0 0 2 &ipic 2 8
470 0 0 0 3 &ipic 2 8
471 0 0 0 4 &ipic 2 8>;
472 sleep = <&pmc 0x000c0000>;
473 clock-frequency = <0>;
474
475 pcie@0 {
476 #address-cells = <3>;
477 #size-cells = <2>;
478 device_type = "pci";
479 reg = <0 0 0 0 0>;
480 ranges = <0x02000000 0 0xc8000000
481 0x02000000 0 0xc8000000
482 0 0x10000000
483 0x01000000 0 0x00000000
484 0x01000000 0 0x00000000
485 0 0x00800000>;
486 };
487 };
353}; 488};
diff --git a/arch/powerpc/boot/dts/mpc8378_mds.dts b/arch/powerpc/boot/dts/mpc8378_mds.dts
index b85fc02682d2..651ff2f9db2d 100644
--- a/arch/powerpc/boot/dts/mpc8378_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8378_mds.dts
@@ -23,6 +23,8 @@
23 serial0 = &serial0; 23 serial0 = &serial0;
24 serial1 = &serial1; 24 serial1 = &serial1;
25 pci0 = &pci0; 25 pci0 = &pci0;
26 pci1 = &pci1;
27 pci2 = &pci2;
26 }; 28 };
27 29
28 cpus { 30 cpus {
@@ -127,21 +129,38 @@
127 reg = <0x200 0x100>; 129 reg = <0x200 0x100>;
128 }; 130 };
129 131
130 i2c@3000 { 132 sleep-nexus {
131 #address-cells = <1>; 133 #address-cells = <1>;
132 #size-cells = <0>; 134 #size-cells = <1>;
133 cell-index = <0>; 135 compatible = "simple-bus";
134 compatible = "fsl-i2c"; 136 sleep = <&pmc 0x0c000000>;
135 reg = <0x3000 0x100>; 137 ranges;
136 interrupts = <14 0x8>; 138
137 interrupt-parent = <&ipic>; 139 i2c@3000 {
138 dfsrr; 140 #address-cells = <1>;
141 #size-cells = <0>;
142 cell-index = <0>;
143 compatible = "fsl-i2c";
144 reg = <0x3000 0x100>;
145 interrupts = <14 0x8>;
146 interrupt-parent = <&ipic>;
147 dfsrr;
148
149 rtc@68 {
150 compatible = "dallas,ds1374";
151 reg = <0x68>;
152 interrupts = <19 0x8>;
153 interrupt-parent = <&ipic>;
154 };
155 };
139 156
140 rtc@68 { 157 sdhci@2e000 {
141 compatible = "dallas,ds1374"; 158 compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc";
142 reg = <0x68>; 159 reg = <0x2e000 0x1000>;
143 interrupts = <19 0x8>; 160 interrupts = <42 0x8>;
144 interrupt-parent = <&ipic>; 161 interrupt-parent = <&ipic>;
162 /* Filled in by U-Boot */
163 clock-frequency = <0>;
145 }; 164 };
146 }; 165 };
147 166
@@ -213,70 +232,83 @@
213 interrupts = <38 0x8>; 232 interrupts = <38 0x8>;
214 dr_mode = "host"; 233 dr_mode = "host";
215 phy_type = "ulpi"; 234 phy_type = "ulpi";
235 sleep = <&pmc 0x00c00000>;
216 }; 236 };
217 237
218 mdio@24520 {
219 #address-cells = <1>;
220 #size-cells = <0>;
221 compatible = "fsl,gianfar-mdio";
222 reg = <0x24520 0x20>;
223 phy2: ethernet-phy@2 {
224 interrupt-parent = <&ipic>;
225 interrupts = <17 0x8>;
226 reg = <0x2>;
227 device_type = "ethernet-phy";
228 };
229 phy3: ethernet-phy@3 {
230 interrupt-parent = <&ipic>;
231 interrupts = <18 0x8>;
232 reg = <0x3>;
233 device_type = "ethernet-phy";
234 };
235 tbi0: tbi-phy@11 {
236 reg = <0x11>;
237 device_type = "tbi-phy";
238 };
239 };
240
241 mdio@25520 {
242 #address-cells = <1>;
243 #size-cells = <0>;
244 compatible = "fsl,gianfar-tbi";
245 reg = <0x25520 0x20>;
246
247 tbi1: tbi-phy@11 {
248 reg = <0x11>;
249 device_type = "tbi-phy";
250 };
251 };
252
253
254 enet0: ethernet@24000 { 238 enet0: ethernet@24000 {
239 #address-cells = <1>;
240 #size-cells = <1>;
255 cell-index = <0>; 241 cell-index = <0>;
256 device_type = "network"; 242 device_type = "network";
257 model = "eTSEC"; 243 model = "eTSEC";
258 compatible = "gianfar"; 244 compatible = "gianfar";
259 reg = <0x24000 0x1000>; 245 reg = <0x24000 0x1000>;
246 ranges = <0x0 0x24000 0x1000>;
260 local-mac-address = [ 00 00 00 00 00 00 ]; 247 local-mac-address = [ 00 00 00 00 00 00 ];
261 interrupts = <32 0x8 33 0x8 34 0x8>; 248 interrupts = <32 0x8 33 0x8 34 0x8>;
262 phy-connection-type = "mii"; 249 phy-connection-type = "mii";
263 interrupt-parent = <&ipic>; 250 interrupt-parent = <&ipic>;
264 tbi-handle = <&tbi0>; 251 tbi-handle = <&tbi0>;
265 phy-handle = <&phy2>; 252 phy-handle = <&phy2>;
253 sleep = <&pmc 0xc0000000>;
254 fsl,magic-packet;
255
256 mdio@520 {
257 #address-cells = <1>;
258 #size-cells = <0>;
259 compatible = "fsl,gianfar-mdio";
260 reg = <0x520 0x20>;
261
262 phy2: ethernet-phy@2 {
263 interrupt-parent = <&ipic>;
264 interrupts = <17 0x8>;
265 reg = <0x2>;
266 device_type = "ethernet-phy";
267 };
268
269 phy3: ethernet-phy@3 {
270 interrupt-parent = <&ipic>;
271 interrupts = <18 0x8>;
272 reg = <0x3>;
273 device_type = "ethernet-phy";
274 };
275
276 tbi0: tbi-phy@11 {
277 reg = <0x11>;
278 device_type = "tbi-phy";
279 };
280 };
266 }; 281 };
267 282
268 enet1: ethernet@25000 { 283 enet1: ethernet@25000 {
284 #address-cells = <1>;
285 #size-cells = <1>;
269 cell-index = <1>; 286 cell-index = <1>;
270 device_type = "network"; 287 device_type = "network";
271 model = "eTSEC"; 288 model = "eTSEC";
272 compatible = "gianfar"; 289 compatible = "gianfar";
273 reg = <0x25000 0x1000>; 290 reg = <0x25000 0x1000>;
291 ranges = <0x0 0x25000 0x1000>;
274 local-mac-address = [ 00 00 00 00 00 00 ]; 292 local-mac-address = [ 00 00 00 00 00 00 ];
275 interrupts = <35 0x8 36 0x8 37 0x8>; 293 interrupts = <35 0x8 36 0x8 37 0x8>;
276 phy-connection-type = "mii"; 294 phy-connection-type = "mii";
277 interrupt-parent = <&ipic>; 295 interrupt-parent = <&ipic>;
278 tbi-handle = <&tbi1>; 296 tbi-handle = <&tbi1>;
279 phy-handle = <&phy3>; 297 phy-handle = <&phy3>;
298 sleep = <&pmc 0x30000000>;
299 fsl,magic-packet;
300
301 mdio@520 {
302 #address-cells = <1>;
303 #size-cells = <0>;
304 compatible = "fsl,gianfar-tbi";
305 reg = <0x520 0x20>;
306
307 tbi1: tbi-phy@11 {
308 reg = <0x11>;
309 device_type = "tbi-phy";
310 };
311 };
280 }; 312 };
281 313
282 serial0: serial@4500 { 314 serial0: serial@4500 {
@@ -309,14 +341,7 @@
309 fsl,channel-fifo-len = <24>; 341 fsl,channel-fifo-len = <24>;
310 fsl,exec-units-mask = <0x9fe>; 342 fsl,exec-units-mask = <0x9fe>;
311 fsl,descriptor-types-mask = <0x3ab0ebf>; 343 fsl,descriptor-types-mask = <0x3ab0ebf>;
312 }; 344 sleep = <&pmc 0x03000000>;
313
314 sdhc@2e000 {
315 model = "eSDHC";
316 compatible = "fsl,esdhc";
317 reg = <0x2e000 0x1000>;
318 interrupts = <42 0x8>;
319 interrupt-parent = <&ipic>;
320 }; 345 };
321 346
322 /* IPIC 347 /* IPIC
@@ -332,6 +357,13 @@
332 #interrupt-cells = <2>; 357 #interrupt-cells = <2>;
333 reg = <0x700 0x100>; 358 reg = <0x700 0x100>;
334 }; 359 };
360
361 pmc: power@b00 {
362 compatible = "fsl,mpc8378-pmc", "fsl,mpc8349-pmc";
363 reg = <0xb00 0x100 0xa00 0x100>;
364 interrupts = <80 0x8>;
365 interrupt-parent = <&ipic>;
366 };
335 }; 367 };
336 368
337 pci0: pci@e0008500 { 369 pci0: pci@e0008500 {
@@ -387,6 +419,7 @@
387 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 419 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
388 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>; 420 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
389 clock-frequency = <0>; 421 clock-frequency = <0>;
422 sleep = <&pmc 0x00010000>;
390 #interrupt-cells = <1>; 423 #interrupt-cells = <1>;
391 #size-cells = <2>; 424 #size-cells = <2>;
392 #address-cells = <3>; 425 #address-cells = <3>;
@@ -395,4 +428,68 @@
395 compatible = "fsl,mpc8349-pci"; 428 compatible = "fsl,mpc8349-pci";
396 device_type = "pci"; 429 device_type = "pci";
397 }; 430 };
431
432 pci1: pcie@e0009000 {
433 #address-cells = <3>;
434 #size-cells = <2>;
435 #interrupt-cells = <1>;
436 device_type = "pci";
437 compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie";
438 reg = <0xe0009000 0x00001000>;
439 ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000
440 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>;
441 bus-range = <0 255>;
442 interrupt-map-mask = <0xf800 0 0 7>;
443 interrupt-map = <0 0 0 1 &ipic 1 8
444 0 0 0 2 &ipic 1 8
445 0 0 0 3 &ipic 1 8
446 0 0 0 4 &ipic 1 8>;
447 sleep = <&pmc 0x00300000>;
448 clock-frequency = <0>;
449
450 pcie@0 {
451 #address-cells = <3>;
452 #size-cells = <2>;
453 device_type = "pci";
454 reg = <0 0 0 0 0>;
455 ranges = <0x02000000 0 0xa8000000
456 0x02000000 0 0xa8000000
457 0 0x10000000
458 0x01000000 0 0x00000000
459 0x01000000 0 0x00000000
460 0 0x00800000>;
461 };
462 };
463
464 pci2: pcie@e000a000 {
465 #address-cells = <3>;
466 #size-cells = <2>;
467 #interrupt-cells = <1>;
468 device_type = "pci";
469 compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie";
470 reg = <0xe000a000 0x00001000>;
471 ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000
472 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>;
473 bus-range = <0 255>;
474 interrupt-map-mask = <0xf800 0 0 7>;
475 interrupt-map = <0 0 0 1 &ipic 2 8
476 0 0 0 2 &ipic 2 8
477 0 0 0 3 &ipic 2 8
478 0 0 0 4 &ipic 2 8>;
479 sleep = <&pmc 0x000c0000>;
480 clock-frequency = <0>;
481
482 pcie@0 {
483 #address-cells = <3>;
484 #size-cells = <2>;
485 device_type = "pci";
486 reg = <0 0 0 0 0>;
487 ranges = <0x02000000 0 0xc8000000
488 0x02000000 0 0xc8000000
489 0 0x10000000
490 0x01000000 0 0x00000000
491 0x01000000 0 0x00000000
492 0 0x00800000>;
493 };
494 };
398}; 495};
diff --git a/arch/powerpc/boot/dts/mpc8378_rdb.dts b/arch/powerpc/boot/dts/mpc8378_rdb.dts
index 23c10ce22c2c..5d90e85704c3 100644
--- a/arch/powerpc/boot/dts/mpc8378_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8378_rdb.dts
@@ -22,6 +22,8 @@
22 serial0 = &serial0; 22 serial0 = &serial0;
23 serial1 = &serial1; 23 serial1 = &serial1;
24 pci0 = &pci0; 24 pci0 = &pci0;
25 pci1 = &pci1;
26 pci2 = &pci2;
25 }; 27 };
26 28
27 cpus { 29 cpus {
@@ -107,26 +109,72 @@
107 reg = <0x200 0x100>; 109 reg = <0x200 0x100>;
108 }; 110 };
109 111
110 i2c@3000 { 112 gpio1: gpio-controller@c00 {
111 #address-cells = <1>; 113 #gpio-cells = <2>;
112 #size-cells = <0>; 114 compatible = "fsl,mpc8378-gpio", "fsl,mpc8349-gpio";
113 cell-index = <0>; 115 reg = <0xc00 0x100>;
114 compatible = "fsl-i2c"; 116 interrupts = <74 0x8>;
115 reg = <0x3000 0x100>;
116 interrupts = <14 0x8>;
117 interrupt-parent = <&ipic>; 117 interrupt-parent = <&ipic>;
118 dfsrr; 118 gpio-controller;
119 rtc@68 { 119 };
120 compatible = "dallas,ds1339"; 120
121 reg = <0x68>; 121 gpio2: gpio-controller@d00 {
122 #gpio-cells = <2>;
123 compatible = "fsl,mpc8378-gpio", "fsl,mpc8349-gpio";
124 reg = <0xd00 0x100>;
125 interrupts = <75 0x8>;
126 interrupt-parent = <&ipic>;
127 gpio-controller;
128 };
129
130 sleep-nexus {
131 #address-cells = <1>;
132 #size-cells = <1>;
133 compatible = "simple-bus";
134 sleep = <&pmc 0x0c000000>;
135 ranges;
136
137 i2c@3000 {
138 #address-cells = <1>;
139 #size-cells = <0>;
140 cell-index = <0>;
141 compatible = "fsl-i2c";
142 reg = <0x3000 0x100>;
143 interrupts = <14 0x8>;
144 interrupt-parent = <&ipic>;
145 dfsrr;
146
147 dtt@48 {
148 compatible = "national,lm75";
149 reg = <0x48>;
150 };
151
152 at24@50 {
153 compatible = "at24,24c256";
154 reg = <0x50>;
155 };
156
157 rtc@68 {
158 compatible = "dallas,ds1339";
159 reg = <0x68>;
160 };
161
162 mcu_pio: mcu@a {
163 #gpio-cells = <2>;
164 compatible = "fsl,mc9s08qg8-mpc8378erdb",
165 "fsl,mcu-mpc8349emitx";
166 reg = <0x0a>;
167 gpio-controller;
168 };
122 }; 169 };
123 170
124 mcu_pio: mcu@a { 171 sdhci@2e000 {
125 #gpio-cells = <2>; 172 compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc";
126 compatible = "fsl,mc9s08qg8-mpc8378erdb", 173 reg = <0x2e000 0x1000>;
127 "fsl,mcu-mpc8349emitx"; 174 interrupts = <42 0x8>;
128 reg = <0x0a>; 175 interrupt-parent = <&ipic>;
129 gpio-controller; 176 /* Filled in by U-Boot */
177 clock-frequency = <0>;
130 }; 178 };
131 }; 179 };
132 180
@@ -197,62 +245,76 @@
197 interrupt-parent = <&ipic>; 245 interrupt-parent = <&ipic>;
198 interrupts = <38 0x8>; 246 interrupts = <38 0x8>;
199 phy_type = "ulpi"; 247 phy_type = "ulpi";
248 sleep = <&pmc 0x00c00000>;
200 }; 249 };
201 250
202 mdio@24520 {
203 #address-cells = <1>;
204 #size-cells = <0>;
205 compatible = "fsl,gianfar-mdio";
206 reg = <0x24520 0x20>;
207 phy2: ethernet-phy@2 {
208 interrupt-parent = <&ipic>;
209 interrupts = <17 0x8>;
210 reg = <0x2>;
211 device_type = "ethernet-phy";
212 };
213 tbi0: tbi-phy@11 {
214 reg = <0x11>;
215 device_type = "tbi-phy";
216 };
217 };
218
219 mdio@25520 {
220 #address-cells = <1>;
221 #size-cells = <0>;
222 compatible = "fsl,gianfar-tbi";
223 reg = <0x25520 0x20>;
224
225 tbi1: tbi-phy@11 {
226 reg = <0x11>;
227 device_type = "tbi-phy";
228 };
229 };
230
231
232 enet0: ethernet@24000 { 251 enet0: ethernet@24000 {
252 #address-cells = <1>;
253 #size-cells = <1>;
233 cell-index = <0>; 254 cell-index = <0>;
234 device_type = "network"; 255 device_type = "network";
235 model = "eTSEC"; 256 model = "eTSEC";
236 compatible = "gianfar"; 257 compatible = "gianfar";
237 reg = <0x24000 0x1000>; 258 reg = <0x24000 0x1000>;
259 ranges = <0x0 0x24000 0x1000>;
238 local-mac-address = [ 00 00 00 00 00 00 ]; 260 local-mac-address = [ 00 00 00 00 00 00 ];
239 interrupts = <32 0x8 33 0x8 34 0x8>; 261 interrupts = <32 0x8 33 0x8 34 0x8>;
240 phy-connection-type = "mii"; 262 phy-connection-type = "mii";
241 interrupt-parent = <&ipic>; 263 interrupt-parent = <&ipic>;
264 tbi-handle = <&tbi0>;
242 phy-handle = <&phy2>; 265 phy-handle = <&phy2>;
266 sleep = <&pmc 0xc0000000>;
267 fsl,magic-packet;
268
269 mdio@520 {
270 #address-cells = <1>;
271 #size-cells = <0>;
272 compatible = "fsl,gianfar-mdio";
273 reg = <0x520 0x20>;
274
275 phy2: ethernet-phy@2 {
276 interrupt-parent = <&ipic>;
277 interrupts = <17 0x8>;
278 reg = <0x2>;
279 device_type = "ethernet-phy";
280 };
281
282 tbi0: tbi-phy@11 {
283 reg = <0x11>;
284 device_type = "tbi-phy";
285 };
286 };
243 }; 287 };
244 288
245 enet1: ethernet@25000 { 289 enet1: ethernet@25000 {
290 #address-cells = <1>;
291 #size-cells = <1>;
246 cell-index = <1>; 292 cell-index = <1>;
247 device_type = "network"; 293 device_type = "network";
248 model = "eTSEC"; 294 model = "eTSEC";
249 compatible = "gianfar"; 295 compatible = "gianfar";
250 reg = <0x25000 0x1000>; 296 reg = <0x25000 0x1000>;
297 ranges = <0x0 0x25000 0x1000>;
251 local-mac-address = [ 00 00 00 00 00 00 ]; 298 local-mac-address = [ 00 00 00 00 00 00 ];
252 interrupts = <35 0x8 36 0x8 37 0x8>; 299 interrupts = <35 0x8 36 0x8 37 0x8>;
253 phy-connection-type = "mii"; 300 phy-connection-type = "mii";
254 interrupt-parent = <&ipic>; 301 interrupt-parent = <&ipic>;
255 fixed-link = <1 1 1000 0 0>; 302 fixed-link = <1 1 1000 0 0>;
303 tbi-handle = <&tbi1>;
304 sleep = <&pmc 0x30000000>;
305 fsl,magic-packet;
306
307 mdio@520 {
308 #address-cells = <1>;
309 #size-cells = <0>;
310 compatible = "fsl,gianfar-tbi";
311 reg = <0x520 0x20>;
312
313 tbi1: tbi-phy@11 {
314 reg = <0x11>;
315 device_type = "tbi-phy";
316 };
317 };
256 }; 318 };
257 319
258 serial0: serial@4500 { 320 serial0: serial@4500 {
@@ -285,6 +347,7 @@
285 fsl,channel-fifo-len = <24>; 347 fsl,channel-fifo-len = <24>;
286 fsl,exec-units-mask = <0x9fe>; 348 fsl,exec-units-mask = <0x9fe>;
287 fsl,descriptor-types-mask = <0x3ab0ebf>; 349 fsl,descriptor-types-mask = <0x3ab0ebf>;
350 sleep = <&pmc 0x03000000>;
288 }; 351 };
289 352
290 /* IPIC 353 /* IPIC
@@ -300,6 +363,13 @@
300 #interrupt-cells = <2>; 363 #interrupt-cells = <2>;
301 reg = <0x700 0x100>; 364 reg = <0x700 0x100>;
302 }; 365 };
366
367 pmc: power@b00 {
368 compatible = "fsl,mpc8378-pmc", "fsl,mpc8349-pmc";
369 reg = <0xb00 0x100 0xa00 0x100>;
370 interrupts = <80 0x8>;
371 interrupt-parent = <&ipic>;
372 };
303 }; 373 };
304 374
305 pci0: pci@e0008500 { 375 pci0: pci@e0008500 {
@@ -325,6 +395,7 @@
325 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 395 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
326 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 396 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
327 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>; 397 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
398 sleep = <&pmc 0x00010000>;
328 clock-frequency = <66666666>; 399 clock-frequency = <66666666>;
329 #interrupt-cells = <1>; 400 #interrupt-cells = <1>;
330 #size-cells = <2>; 401 #size-cells = <2>;
@@ -334,4 +405,68 @@
334 compatible = "fsl,mpc8349-pci"; 405 compatible = "fsl,mpc8349-pci";
335 device_type = "pci"; 406 device_type = "pci";
336 }; 407 };
408
409 pci1: pcie@e0009000 {
410 #address-cells = <3>;
411 #size-cells = <2>;
412 #interrupt-cells = <1>;
413 device_type = "pci";
414 compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie";
415 reg = <0xe0009000 0x00001000>;
416 ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000
417 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>;
418 bus-range = <0 255>;
419 interrupt-map-mask = <0xf800 0 0 7>;
420 interrupt-map = <0 0 0 1 &ipic 1 8
421 0 0 0 2 &ipic 1 8
422 0 0 0 3 &ipic 1 8
423 0 0 0 4 &ipic 1 8>;
424 sleep = <&pmc 0x00300000>;
425 clock-frequency = <0>;
426
427 pcie@0 {
428 #address-cells = <3>;
429 #size-cells = <2>;
430 device_type = "pci";
431 reg = <0 0 0 0 0>;
432 ranges = <0x02000000 0 0xa8000000
433 0x02000000 0 0xa8000000
434 0 0x10000000
435 0x01000000 0 0x00000000
436 0x01000000 0 0x00000000
437 0 0x00800000>;
438 };
439 };
440
441 pci2: pcie@e000a000 {
442 #address-cells = <3>;
443 #size-cells = <2>;
444 #interrupt-cells = <1>;
445 device_type = "pci";
446 compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie";
447 reg = <0xe000a000 0x00001000>;
448 ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000
449 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>;
450 bus-range = <0 255>;
451 interrupt-map-mask = <0xf800 0 0 7>;
452 interrupt-map = <0 0 0 1 &ipic 2 8
453 0 0 0 2 &ipic 2 8
454 0 0 0 3 &ipic 2 8
455 0 0 0 4 &ipic 2 8>;
456 sleep = <&pmc 0x000c0000>;
457 clock-frequency = <0>;
458
459 pcie@0 {
460 #address-cells = <3>;
461 #size-cells = <2>;
462 device_type = "pci";
463 reg = <0 0 0 0 0>;
464 ranges = <0x02000000 0 0xc8000000
465 0x02000000 0 0xc8000000
466 0 0x10000000
467 0x01000000 0 0x00000000
468 0x01000000 0 0x00000000
469 0 0x00800000>;
470 };
471 };
337}; 472};
diff --git a/arch/powerpc/boot/dts/mpc8379_mds.dts b/arch/powerpc/boot/dts/mpc8379_mds.dts
index acf06c438dbf..d6f208b8297a 100644
--- a/arch/powerpc/boot/dts/mpc8379_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8379_mds.dts
@@ -127,21 +127,38 @@
127 reg = <0x200 0x100>; 127 reg = <0x200 0x100>;
128 }; 128 };
129 129
130 i2c@3000 { 130 sleep-nexus {
131 #address-cells = <1>; 131 #address-cells = <1>;
132 #size-cells = <0>; 132 #size-cells = <1>;
133 cell-index = <0>; 133 compatible = "simple-bus";
134 compatible = "fsl-i2c"; 134 sleep = <&pmc 0x0c000000>;
135 reg = <0x3000 0x100>; 135 ranges;
136 interrupts = <14 0x8>; 136
137 interrupt-parent = <&ipic>; 137 i2c@3000 {
138 dfsrr; 138 #address-cells = <1>;
139 #size-cells = <0>;
140 cell-index = <0>;
141 compatible = "fsl-i2c";
142 reg = <0x3000 0x100>;
143 interrupts = <14 0x8>;
144 interrupt-parent = <&ipic>;
145 dfsrr;
146
147 rtc@68 {
148 compatible = "dallas,ds1374";
149 reg = <0x68>;
150 interrupts = <19 0x8>;
151 interrupt-parent = <&ipic>;
152 };
153 };
139 154
140 rtc@68 { 155 sdhci@2e000 {
141 compatible = "dallas,ds1374"; 156 compatible = "fsl,mpc8379-esdhc";
142 reg = <0x68>; 157 reg = <0x2e000 0x1000>;
143 interrupts = <19 0x8>; 158 interrupts = <42 0x8>;
144 interrupt-parent = <&ipic>; 159 interrupt-parent = <&ipic>;
160 /* Filled in by U-Boot */
161 clock-frequency = <0>;
145 }; 162 };
146 }; 163 };
147 164
@@ -213,69 +230,83 @@
213 interrupts = <38 0x8>; 230 interrupts = <38 0x8>;
214 dr_mode = "host"; 231 dr_mode = "host";
215 phy_type = "ulpi"; 232 phy_type = "ulpi";
216 }; 233 sleep = <&pmc 0x00c00000>;
217
218 mdio@24520 {
219 #address-cells = <1>;
220 #size-cells = <0>;
221 compatible = "fsl,gianfar-mdio";
222 reg = <0x24520 0x20>;
223 phy2: ethernet-phy@2 {
224 interrupt-parent = <&ipic>;
225 interrupts = <17 0x8>;
226 reg = <0x2>;
227 device_type = "ethernet-phy";
228 };
229 phy3: ethernet-phy@3 {
230 interrupt-parent = <&ipic>;
231 interrupts = <18 0x8>;
232 reg = <0x3>;
233 device_type = "ethernet-phy";
234 };
235 tbi0: tbi-phy@11 {
236 reg = <0x11>;
237 device_type = "tbi-phy";
238 };
239 };
240
241 mdio@25520 {
242 #address-cells = <1>;
243 #size-cells = <0>;
244 compatible = "fsl,gianfar-tbi";
245 reg = <0x25520 0x20>;
246
247 tbi1: tbi-phy@11 {
248 reg = <0x11>;
249 device_type = "tbi-phy";
250 };
251 }; 234 };
252 235
253 enet0: ethernet@24000 { 236 enet0: ethernet@24000 {
237 #address-cells = <1>;
238 #size-cells = <1>;
254 cell-index = <0>; 239 cell-index = <0>;
255 device_type = "network"; 240 device_type = "network";
256 model = "eTSEC"; 241 model = "eTSEC";
257 compatible = "gianfar"; 242 compatible = "gianfar";
258 reg = <0x24000 0x1000>; 243 reg = <0x24000 0x1000>;
244 ranges = <0x0 0x24000 0x1000>;
259 local-mac-address = [ 00 00 00 00 00 00 ]; 245 local-mac-address = [ 00 00 00 00 00 00 ];
260 interrupts = <32 0x8 33 0x8 34 0x8>; 246 interrupts = <32 0x8 33 0x8 34 0x8>;
261 phy-connection-type = "mii"; 247 phy-connection-type = "mii";
262 interrupt-parent = <&ipic>; 248 interrupt-parent = <&ipic>;
263 tbi-handle = <&tbi0>; 249 tbi-handle = <&tbi0>;
264 phy-handle = <&phy2>; 250 phy-handle = <&phy2>;
251 sleep = <&pmc 0xc0000000>;
252 fsl,magic-packet;
253
254 mdio@520 {
255 #address-cells = <1>;
256 #size-cells = <0>;
257 compatible = "fsl,gianfar-mdio";
258 reg = <0x520 0x20>;
259
260 phy2: ethernet-phy@2 {
261 interrupt-parent = <&ipic>;
262 interrupts = <17 0x8>;
263 reg = <0x2>;
264 device_type = "ethernet-phy";
265 };
266
267 phy3: ethernet-phy@3 {
268 interrupt-parent = <&ipic>;
269 interrupts = <18 0x8>;
270 reg = <0x3>;
271 device_type = "ethernet-phy";
272 };
273
274 tbi0: tbi-phy@11 {
275 reg = <0x11>;
276 device_type = "tbi-phy";
277 };
278 };
265 }; 279 };
266 280
267 enet1: ethernet@25000 { 281 enet1: ethernet@25000 {
282 #address-cells = <1>;
283 #size-cells = <1>;
268 cell-index = <1>; 284 cell-index = <1>;
269 device_type = "network"; 285 device_type = "network";
270 model = "eTSEC"; 286 model = "eTSEC";
271 compatible = "gianfar"; 287 compatible = "gianfar";
272 reg = <0x25000 0x1000>; 288 reg = <0x25000 0x1000>;
289 ranges = <0x0 0x25000 0x1000>;
273 local-mac-address = [ 00 00 00 00 00 00 ]; 290 local-mac-address = [ 00 00 00 00 00 00 ];
274 interrupts = <35 0x8 36 0x8 37 0x8>; 291 interrupts = <35 0x8 36 0x8 37 0x8>;
275 phy-connection-type = "mii"; 292 phy-connection-type = "mii";
276 interrupt-parent = <&ipic>; 293 interrupt-parent = <&ipic>;
277 tbi-handle = <&tbi1>; 294 tbi-handle = <&tbi1>;
278 phy-handle = <&phy3>; 295 phy-handle = <&phy3>;
296 sleep = <&pmc 0x30000000>;
297 fsl,magic-packet;
298
299 mdio@520 {
300 #address-cells = <1>;
301 #size-cells = <0>;
302 compatible = "fsl,gianfar-tbi";
303 reg = <0x520 0x20>;
304
305 tbi1: tbi-phy@11 {
306 reg = <0x11>;
307 device_type = "tbi-phy";
308 };
309 };
279 }; 310 };
280 311
281 serial0: serial@4500 { 312 serial0: serial@4500 {
@@ -308,14 +339,7 @@
308 fsl,channel-fifo-len = <24>; 339 fsl,channel-fifo-len = <24>;
309 fsl,exec-units-mask = <0x9fe>; 340 fsl,exec-units-mask = <0x9fe>;
310 fsl,descriptor-types-mask = <0x3ab0ebf>; 341 fsl,descriptor-types-mask = <0x3ab0ebf>;
311 }; 342 sleep = <&pmc 0x03000000>;
312
313 sdhc@2e000 {
314 model = "eSDHC";
315 compatible = "fsl,esdhc";
316 reg = <0x2e000 0x1000>;
317 interrupts = <42 0x8>;
318 interrupt-parent = <&ipic>;
319 }; 343 };
320 344
321 sata@18000 { 345 sata@18000 {
@@ -323,6 +347,7 @@
323 reg = <0x18000 0x1000>; 347 reg = <0x18000 0x1000>;
324 interrupts = <44 0x8>; 348 interrupts = <44 0x8>;
325 interrupt-parent = <&ipic>; 349 interrupt-parent = <&ipic>;
350 sleep = <&pmc 0x000000c0>;
326 }; 351 };
327 352
328 sata@19000 { 353 sata@19000 {
@@ -330,6 +355,7 @@
330 reg = <0x19000 0x1000>; 355 reg = <0x19000 0x1000>;
331 interrupts = <45 0x8>; 356 interrupts = <45 0x8>;
332 interrupt-parent = <&ipic>; 357 interrupt-parent = <&ipic>;
358 sleep = <&pmc 0x00000030>;
333 }; 359 };
334 360
335 sata@1a000 { 361 sata@1a000 {
@@ -337,6 +363,7 @@
337 reg = <0x1a000 0x1000>; 363 reg = <0x1a000 0x1000>;
338 interrupts = <46 0x8>; 364 interrupts = <46 0x8>;
339 interrupt-parent = <&ipic>; 365 interrupt-parent = <&ipic>;
366 sleep = <&pmc 0x0000000c>;
340 }; 367 };
341 368
342 sata@1b000 { 369 sata@1b000 {
@@ -344,6 +371,7 @@
344 reg = <0x1b000 0x1000>; 371 reg = <0x1b000 0x1000>;
345 interrupts = <47 0x8>; 372 interrupts = <47 0x8>;
346 interrupt-parent = <&ipic>; 373 interrupt-parent = <&ipic>;
374 sleep = <&pmc 0x00000003>;
347 }; 375 };
348 376
349 /* IPIC 377 /* IPIC
@@ -359,6 +387,13 @@
359 #interrupt-cells = <2>; 387 #interrupt-cells = <2>;
360 reg = <0x700 0x100>; 388 reg = <0x700 0x100>;
361 }; 389 };
390
391 pmc: power@b00 {
392 compatible = "fsl,mpc8379-pmc", "fsl,mpc8349-pmc";
393 reg = <0xb00 0x100 0xa00 0x100>;
394 interrupts = <80 0x8>;
395 interrupt-parent = <&ipic>;
396 };
362 }; 397 };
363 398
364 pci0: pci@e0008500 { 399 pci0: pci@e0008500 {
@@ -413,6 +448,7 @@
413 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 448 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
414 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 449 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
415 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>; 450 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
451 sleep = <&pmc 0x00010000>;
416 clock-frequency = <0>; 452 clock-frequency = <0>;
417 #interrupt-cells = <1>; 453 #interrupt-cells = <1>;
418 #size-cells = <2>; 454 #size-cells = <2>;
diff --git a/arch/powerpc/boot/dts/mpc8379_rdb.dts b/arch/powerpc/boot/dts/mpc8379_rdb.dts
index 72cdc3c4c7e3..98ae95bd18f4 100644
--- a/arch/powerpc/boot/dts/mpc8379_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8379_rdb.dts
@@ -107,26 +107,72 @@
107 reg = <0x200 0x100>; 107 reg = <0x200 0x100>;
108 }; 108 };
109 109
110 i2c@3000 { 110 gpio1: gpio-controller@c00 {
111 #address-cells = <1>; 111 #gpio-cells = <2>;
112 #size-cells = <0>; 112 compatible = "fsl,mpc8379-gpio", "fsl,mpc8349-gpio";
113 cell-index = <0>; 113 reg = <0xc00 0x100>;
114 compatible = "fsl-i2c"; 114 interrupts = <74 0x8>;
115 reg = <0x3000 0x100>;
116 interrupts = <14 0x8>;
117 interrupt-parent = <&ipic>; 115 interrupt-parent = <&ipic>;
118 dfsrr; 116 gpio-controller;
119 rtc@68 { 117 };
120 compatible = "dallas,ds1339"; 118
121 reg = <0x68>; 119 gpio2: gpio-controller@d00 {
120 #gpio-cells = <2>;
121 compatible = "fsl,mpc8379-gpio", "fsl,mpc8349-gpio";
122 reg = <0xd00 0x100>;
123 interrupts = <75 0x8>;
124 interrupt-parent = <&ipic>;
125 gpio-controller;
126 };
127
128 sleep-nexus {
129 #address-cells = <1>;
130 #size-cells = <1>;
131 compatible = "simple-bus";
132 sleep = <&pmc 0x0c000000>;
133 ranges;
134
135 i2c@3000 {
136 #address-cells = <1>;
137 #size-cells = <0>;
138 cell-index = <0>;
139 compatible = "fsl-i2c";
140 reg = <0x3000 0x100>;
141 interrupts = <14 0x8>;
142 interrupt-parent = <&ipic>;
143 dfsrr;
144
145 dtt@48 {
146 compatible = "national,lm75";
147 reg = <0x48>;
148 };
149
150 at24@50 {
151 compatible = "at24,24c256";
152 reg = <0x50>;
153 };
154
155 rtc@68 {
156 compatible = "dallas,ds1339";
157 reg = <0x68>;
158 };
159
160 mcu_pio: mcu@a {
161 #gpio-cells = <2>;
162 compatible = "fsl,mc9s08qg8-mpc8379erdb",
163 "fsl,mcu-mpc8349emitx";
164 reg = <0x0a>;
165 gpio-controller;
166 };
122 }; 167 };
123 168
124 mcu_pio: mcu@a { 169 sdhci@2e000 {
125 #gpio-cells = <2>; 170 compatible = "fsl,mpc8379-esdhc";
126 compatible = "fsl,mc9s08qg8-mpc8379erdb", 171 reg = <0x2e000 0x1000>;
127 "fsl,mcu-mpc8349emitx"; 172 interrupts = <42 0x8>;
128 reg = <0x0a>; 173 interrupt-parent = <&ipic>;
129 gpio-controller; 174 /* Filled in by U-Boot */
175 clock-frequency = <0>;
130 }; 176 };
131 }; 177 };
132 178
@@ -197,63 +243,76 @@
197 interrupt-parent = <&ipic>; 243 interrupt-parent = <&ipic>;
198 interrupts = <38 0x8>; 244 interrupts = <38 0x8>;
199 phy_type = "ulpi"; 245 phy_type = "ulpi";
200 }; 246 sleep = <&pmc 0x00c00000>;
201
202 mdio@24520 {
203 #address-cells = <1>;
204 #size-cells = <0>;
205 compatible = "fsl,gianfar-mdio";
206 reg = <0x24520 0x20>;
207 phy2: ethernet-phy@2 {
208 interrupt-parent = <&ipic>;
209 interrupts = <17 0x8>;
210 reg = <0x2>;
211 device_type = "ethernet-phy";
212 };
213 tbi0: tbi-phy@11 {
214 reg = <0x11>;
215 device_type = "tbi-phy";
216 };
217 };
218
219 mdio@25520 {
220 #address-cells = <1>;
221 #size-cells = <0>;
222 compatible = "fsl,gianfar-tbi";
223 reg = <0x25520 0x20>;
224
225 tbi1: tbi-phy@11 {
226 reg = <0x11>;
227 device_type = "tbi-phy";
228 };
229 }; 247 };
230 248
231 enet0: ethernet@24000 { 249 enet0: ethernet@24000 {
250 #address-cells = <1>;
251 #size-cells = <1>;
232 cell-index = <0>; 252 cell-index = <0>;
233 device_type = "network"; 253 device_type = "network";
234 model = "eTSEC"; 254 model = "eTSEC";
235 compatible = "gianfar"; 255 compatible = "gianfar";
236 reg = <0x24000 0x1000>; 256 reg = <0x24000 0x1000>;
257 ranges = <0x0 0x24000 0x1000>;
237 local-mac-address = [ 00 00 00 00 00 00 ]; 258 local-mac-address = [ 00 00 00 00 00 00 ];
238 interrupts = <32 0x8 33 0x8 34 0x8>; 259 interrupts = <32 0x8 33 0x8 34 0x8>;
239 phy-connection-type = "mii"; 260 phy-connection-type = "mii";
240 interrupt-parent = <&ipic>; 261 interrupt-parent = <&ipic>;
241 tbi-handle = <&tbi0>; 262 tbi-handle = <&tbi0>;
242 phy-handle = <&phy2>; 263 phy-handle = <&phy2>;
264 sleep = <&pmc 0xc0000000>;
265 fsl,magic-packet;
266
267 mdio@520 {
268 #address-cells = <1>;
269 #size-cells = <0>;
270 compatible = "fsl,gianfar-mdio";
271 reg = <0x520 0x20>;
272
273 phy2: ethernet-phy@2 {
274 interrupt-parent = <&ipic>;
275 interrupts = <17 0x8>;
276 reg = <0x2>;
277 device_type = "ethernet-phy";
278 };
279
280 tbi0: tbi-phy@11 {
281 reg = <0x11>;
282 device_type = "tbi-phy";
283 };
284 };
243 }; 285 };
244 286
245 enet1: ethernet@25000 { 287 enet1: ethernet@25000 {
288 #address-cells = <1>;
289 #size-cells = <1>;
246 cell-index = <1>; 290 cell-index = <1>;
247 device_type = "network"; 291 device_type = "network";
248 model = "eTSEC"; 292 model = "eTSEC";
249 compatible = "gianfar"; 293 compatible = "gianfar";
250 reg = <0x25000 0x1000>; 294 reg = <0x25000 0x1000>;
295 ranges = <0x0 0x25000 0x1000>;
251 local-mac-address = [ 00 00 00 00 00 00 ]; 296 local-mac-address = [ 00 00 00 00 00 00 ];
252 interrupts = <35 0x8 36 0x8 37 0x8>; 297 interrupts = <35 0x8 36 0x8 37 0x8>;
253 phy-connection-type = "mii"; 298 phy-connection-type = "mii";
254 interrupt-parent = <&ipic>; 299 interrupt-parent = <&ipic>;
255 fixed-link = <1 1 1000 0 0>; 300 fixed-link = <1 1 1000 0 0>;
256 tbi-handle = <&tbi1>; 301 tbi-handle = <&tbi1>;
302 sleep = <&pmc 0x30000000>;
303 fsl,magic-packet;
304
305 mdio@520 {
306 #address-cells = <1>;
307 #size-cells = <0>;
308 compatible = "fsl,gianfar-tbi";
309 reg = <0x520 0x20>;
310
311 tbi1: tbi-phy@11 {
312 reg = <0x11>;
313 device_type = "tbi-phy";
314 };
315 };
257 }; 316 };
258 317
259 serial0: serial@4500 { 318 serial0: serial@4500 {
@@ -286,6 +345,7 @@
286 fsl,channel-fifo-len = <24>; 345 fsl,channel-fifo-len = <24>;
287 fsl,exec-units-mask = <0x9fe>; 346 fsl,exec-units-mask = <0x9fe>;
288 fsl,descriptor-types-mask = <0x3ab0ebf>; 347 fsl,descriptor-types-mask = <0x3ab0ebf>;
348 sleep = <&pmc 0x03000000>;
289 }; 349 };
290 350
291 sata@18000 { 351 sata@18000 {
@@ -293,6 +353,7 @@
293 reg = <0x18000 0x1000>; 353 reg = <0x18000 0x1000>;
294 interrupts = <44 0x8>; 354 interrupts = <44 0x8>;
295 interrupt-parent = <&ipic>; 355 interrupt-parent = <&ipic>;
356 sleep = <&pmc 0x000000c0>;
296 }; 357 };
297 358
298 sata@19000 { 359 sata@19000 {
@@ -300,6 +361,7 @@
300 reg = <0x19000 0x1000>; 361 reg = <0x19000 0x1000>;
301 interrupts = <45 0x8>; 362 interrupts = <45 0x8>;
302 interrupt-parent = <&ipic>; 363 interrupt-parent = <&ipic>;
364 sleep = <&pmc 0x00000030>;
303 }; 365 };
304 366
305 sata@1a000 { 367 sata@1a000 {
@@ -307,6 +369,7 @@
307 reg = <0x1a000 0x1000>; 369 reg = <0x1a000 0x1000>;
308 interrupts = <46 0x8>; 370 interrupts = <46 0x8>;
309 interrupt-parent = <&ipic>; 371 interrupt-parent = <&ipic>;
372 sleep = <&pmc 0x0000000c>;
310 }; 373 };
311 374
312 sata@1b000 { 375 sata@1b000 {
@@ -314,6 +377,7 @@
314 reg = <0x1b000 0x1000>; 377 reg = <0x1b000 0x1000>;
315 interrupts = <47 0x8>; 378 interrupts = <47 0x8>;
316 interrupt-parent = <&ipic>; 379 interrupt-parent = <&ipic>;
380 sleep = <&pmc 0x00000003>;
317 }; 381 };
318 382
319 /* IPIC 383 /* IPIC
@@ -329,6 +393,13 @@
329 #interrupt-cells = <2>; 393 #interrupt-cells = <2>;
330 reg = <0x700 0x100>; 394 reg = <0x700 0x100>;
331 }; 395 };
396
397 pmc: power@b00 {
398 compatible = "fsl,mpc8379-pmc", "fsl,mpc8349-pmc";
399 reg = <0xb00 0x100 0xa00 0x100>;
400 interrupts = <80 0x8>;
401 interrupt-parent = <&ipic>;
402 };
332 }; 403 };
333 404
334 pci0: pci@e0008500 { 405 pci0: pci@e0008500 {
@@ -354,6 +425,7 @@
354 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 425 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
355 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 426 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
356 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>; 427 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
428 sleep = <&pmc 0x00010000>;
357 clock-frequency = <66666666>; 429 clock-frequency = <66666666>;
358 #interrupt-cells = <1>; 430 #interrupt-cells = <1>;
359 #size-cells = <2>; 431 #size-cells = <2>;
diff --git a/arch/powerpc/boot/dts/mpc8536ds.dts b/arch/powerpc/boot/dts/mpc8536ds.dts
index 3c905df1812c..b31c5041350b 100644
--- a/arch/powerpc/boot/dts/mpc8536ds.dts
+++ b/arch/powerpc/boot/dts/mpc8536ds.dts
@@ -137,42 +137,6 @@
137 }; 137 };
138 }; 138 };
139 139
140 mdio@24520 {
141 #address-cells = <1>;
142 #size-cells = <0>;
143 compatible = "fsl,gianfar-mdio";
144 reg = <0x24520 0x20>;
145
146 phy0: ethernet-phy@0 {
147 interrupt-parent = <&mpic>;
148 interrupts = <10 0x1>;
149 reg = <0>;
150 device_type = "ethernet-phy";
151 };
152 phy1: ethernet-phy@1 {
153 interrupt-parent = <&mpic>;
154 interrupts = <10 0x1>;
155 reg = <1>;
156 device_type = "ethernet-phy";
157 };
158 tbi0: tbi-phy@11 {
159 reg = <0x11>;
160 device_type = "tbi-phy";
161 };
162 };
163
164 mdio@26520 {
165 #address-cells = <1>;
166 #size-cells = <0>;
167 compatible = "fsl,gianfar-tbi";
168 reg = <0x26520 0x20>;
169
170 tbi1: tbi-phy@11 {
171 reg = <0x11>;
172 device_type = "tbi-phy";
173 };
174 };
175
176 usb@22000 { 140 usb@22000 {
177 compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph"; 141 compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
178 reg = <0x22000 0x1000>; 142 reg = <0x22000 0x1000>;
@@ -194,31 +158,73 @@
194 }; 158 };
195 159
196 enet0: ethernet@24000 { 160 enet0: ethernet@24000 {
161 #address-cells = <1>;
162 #size-cells = <1>;
197 cell-index = <0>; 163 cell-index = <0>;
198 device_type = "network"; 164 device_type = "network";
199 model = "eTSEC"; 165 model = "eTSEC";
200 compatible = "gianfar"; 166 compatible = "gianfar";
201 reg = <0x24000 0x1000>; 167 reg = <0x24000 0x1000>;
168 ranges = <0x0 0x24000 0x1000>;
202 local-mac-address = [ 00 00 00 00 00 00 ]; 169 local-mac-address = [ 00 00 00 00 00 00 ];
203 interrupts = <29 2 30 2 34 2>; 170 interrupts = <29 2 30 2 34 2>;
204 interrupt-parent = <&mpic>; 171 interrupt-parent = <&mpic>;
205 tbi-handle = <&tbi0>; 172 tbi-handle = <&tbi0>;
206 phy-handle = <&phy1>; 173 phy-handle = <&phy1>;
207 phy-connection-type = "rgmii-id"; 174 phy-connection-type = "rgmii-id";
175
176 mdio@520 {
177 #address-cells = <1>;
178 #size-cells = <0>;
179 compatible = "fsl,gianfar-mdio";
180 reg = <0x520 0x20>;
181
182 phy0: ethernet-phy@0 {
183 interrupt-parent = <&mpic>;
184 interrupts = <10 0x1>;
185 reg = <0>;
186 device_type = "ethernet-phy";
187 };
188 phy1: ethernet-phy@1 {
189 interrupt-parent = <&mpic>;
190 interrupts = <10 0x1>;
191 reg = <1>;
192 device_type = "ethernet-phy";
193 };
194 tbi0: tbi-phy@11 {
195 reg = <0x11>;
196 device_type = "tbi-phy";
197 };
198 };
208 }; 199 };
209 200
210 enet1: ethernet@26000 { 201 enet1: ethernet@26000 {
202 #address-cells = <1>;
203 #size-cells = <1>;
211 cell-index = <1>; 204 cell-index = <1>;
212 device_type = "network"; 205 device_type = "network";
213 model = "eTSEC"; 206 model = "eTSEC";
214 compatible = "gianfar"; 207 compatible = "gianfar";
215 reg = <0x26000 0x1000>; 208 reg = <0x26000 0x1000>;
209 ranges = <0x0 0x26000 0x1000>;
216 local-mac-address = [ 00 00 00 00 00 00 ]; 210 local-mac-address = [ 00 00 00 00 00 00 ];
217 interrupts = <31 2 32 2 33 2>; 211 interrupts = <31 2 32 2 33 2>;
218 interrupt-parent = <&mpic>; 212 interrupt-parent = <&mpic>;
219 tbi-handle = <&tbi1>; 213 tbi-handle = <&tbi1>;
220 phy-handle = <&phy0>; 214 phy-handle = <&phy0>;
221 phy-connection-type = "rgmii-id"; 215 phy-connection-type = "rgmii-id";
216
217 mdio@520 {
218 #address-cells = <1>;
219 #size-cells = <0>;
220 compatible = "fsl,gianfar-tbi";
221 reg = <0x520 0x20>;
222
223 tbi1: tbi-phy@11 {
224 reg = <0x11>;
225 device_type = "tbi-phy";
226 };
227 };
222 }; 228 };
223 229
224 usb@2b000 { 230 usb@2b000 {
diff --git a/arch/powerpc/boot/dts/mpc8540ads.dts b/arch/powerpc/boot/dts/mpc8540ads.dts
index 79570ffe41b9..ddd67be10b03 100644
--- a/arch/powerpc/boot/dts/mpc8540ads.dts
+++ b/arch/powerpc/boot/dts/mpc8540ads.dts
@@ -126,97 +126,106 @@
126 }; 126 };
127 }; 127 };
128 128
129 mdio@24520 {
130 #address-cells = <1>;
131 #size-cells = <0>;
132 compatible = "fsl,gianfar-mdio";
133 reg = <0x24520 0x20>;
134
135 phy0: ethernet-phy@0 {
136 interrupt-parent = <&mpic>;
137 interrupts = <5 1>;
138 reg = <0x0>;
139 device_type = "ethernet-phy";
140 };
141 phy1: ethernet-phy@1 {
142 interrupt-parent = <&mpic>;
143 interrupts = <5 1>;
144 reg = <0x1>;
145 device_type = "ethernet-phy";
146 };
147 phy3: ethernet-phy@3 {
148 interrupt-parent = <&mpic>;
149 interrupts = <7 1>;
150 reg = <0x3>;
151 device_type = "ethernet-phy";
152 };
153 tbi0: tbi-phy@11 {
154 reg = <0x11>;
155 device_type = "tbi-phy";
156 };
157 };
158
159 mdio@25520 {
160 #address-cells = <1>;
161 #size-cells = <0>;
162 compatible = "fsl,gianfar-tbi";
163 reg = <0x25520 0x20>;
164
165 tbi1: tbi-phy@11 {
166 reg = <0x11>;
167 device_type = "tbi-phy";
168 };
169 };
170
171 mdio@26520 {
172 #address-cells = <1>;
173 #size-cells = <0>;
174 compatible = "fsl,gianfar-tbi";
175 reg = <0x26520 0x20>;
176
177 tbi2: tbi-phy@11 {
178 reg = <0x11>;
179 device_type = "tbi-phy";
180 };
181 };
182
183 enet0: ethernet@24000 { 129 enet0: ethernet@24000 {
130 #address-cells = <1>;
131 #size-cells = <1>;
184 cell-index = <0>; 132 cell-index = <0>;
185 device_type = "network"; 133 device_type = "network";
186 model = "TSEC"; 134 model = "TSEC";
187 compatible = "gianfar"; 135 compatible = "gianfar";
188 reg = <0x24000 0x1000>; 136 reg = <0x24000 0x1000>;
137 ranges = <0x0 0x24000 0x1000>;
189 local-mac-address = [ 00 00 00 00 00 00 ]; 138 local-mac-address = [ 00 00 00 00 00 00 ];
190 interrupts = <29 2 30 2 34 2>; 139 interrupts = <29 2 30 2 34 2>;
191 interrupt-parent = <&mpic>; 140 interrupt-parent = <&mpic>;
192 tbi-handle = <&tbi0>; 141 tbi-handle = <&tbi0>;
193 phy-handle = <&phy0>; 142 phy-handle = <&phy0>;
143
144 mdio@520 {
145 #address-cells = <1>;
146 #size-cells = <0>;
147 compatible = "fsl,gianfar-mdio";
148 reg = <0x520 0x20>;
149
150 phy0: ethernet-phy@0 {
151 interrupt-parent = <&mpic>;
152 interrupts = <5 1>;
153 reg = <0x0>;
154 device_type = "ethernet-phy";
155 };
156 phy1: ethernet-phy@1 {
157 interrupt-parent = <&mpic>;
158 interrupts = <5 1>;
159 reg = <0x1>;
160 device_type = "ethernet-phy";
161 };
162 phy3: ethernet-phy@3 {
163 interrupt-parent = <&mpic>;
164 interrupts = <7 1>;
165 reg = <0x3>;
166 device_type = "ethernet-phy";
167 };
168 tbi0: tbi-phy@11 {
169 reg = <0x11>;
170 device_type = "tbi-phy";
171 };
172 };
194 }; 173 };
195 174
196 enet1: ethernet@25000 { 175 enet1: ethernet@25000 {
176 #address-cells = <1>;
177 #size-cells = <1>;
197 cell-index = <1>; 178 cell-index = <1>;
198 device_type = "network"; 179 device_type = "network";
199 model = "TSEC"; 180 model = "TSEC";
200 compatible = "gianfar"; 181 compatible = "gianfar";
201 reg = <0x25000 0x1000>; 182 reg = <0x25000 0x1000>;
183 ranges = <0x0 0x25000 0x1000>;
202 local-mac-address = [ 00 00 00 00 00 00 ]; 184 local-mac-address = [ 00 00 00 00 00 00 ];
203 interrupts = <35 2 36 2 40 2>; 185 interrupts = <35 2 36 2 40 2>;
204 interrupt-parent = <&mpic>; 186 interrupt-parent = <&mpic>;
205 tbi-handle = <&tbi1>; 187 tbi-handle = <&tbi1>;
206 phy-handle = <&phy1>; 188 phy-handle = <&phy1>;
189
190 mdio@520 {
191 #address-cells = <1>;
192 #size-cells = <0>;
193 compatible = "fsl,gianfar-tbi";
194 reg = <0x520 0x20>;
195
196 tbi1: tbi-phy@11 {
197 reg = <0x11>;
198 device_type = "tbi-phy";
199 };
200 };
207 }; 201 };
208 202
209 enet2: ethernet@26000 { 203 enet2: ethernet@26000 {
204 #address-cells = <1>;
205 #size-cells = <1>;
210 cell-index = <2>; 206 cell-index = <2>;
211 device_type = "network"; 207 device_type = "network";
212 model = "FEC"; 208 model = "FEC";
213 compatible = "gianfar"; 209 compatible = "gianfar";
214 reg = <0x26000 0x1000>; 210 reg = <0x26000 0x1000>;
211 ranges = <0x0 0x26000 0x1000>;
215 local-mac-address = [ 00 00 00 00 00 00 ]; 212 local-mac-address = [ 00 00 00 00 00 00 ];
216 interrupts = <41 2>; 213 interrupts = <41 2>;
217 interrupt-parent = <&mpic>; 214 interrupt-parent = <&mpic>;
218 tbi-handle = <&tbi2>; 215 tbi-handle = <&tbi2>;
219 phy-handle = <&phy3>; 216 phy-handle = <&phy3>;
217
218 mdio@520 {
219 #address-cells = <1>;
220 #size-cells = <0>;
221 compatible = "fsl,gianfar-tbi";
222 reg = <0x520 0x20>;
223
224 tbi2: tbi-phy@11 {
225 reg = <0x11>;
226 device_type = "tbi-phy";
227 };
228 };
220 }; 229 };
221 230
222 serial0: serial@4500 { 231 serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/mpc8541cds.dts b/arch/powerpc/boot/dts/mpc8541cds.dts
index 221036a8ce23..e45097f44fbd 100644
--- a/arch/powerpc/boot/dts/mpc8541cds.dts
+++ b/arch/powerpc/boot/dts/mpc8541cds.dts
@@ -126,66 +126,72 @@
126 }; 126 };
127 }; 127 };
128 128
129 mdio@24520 {
130 #address-cells = <1>;
131 #size-cells = <0>;
132 compatible = "fsl,gianfar-mdio";
133 reg = <0x24520 0x20>;
134
135 phy0: ethernet-phy@0 {
136 interrupt-parent = <&mpic>;
137 interrupts = <5 1>;
138 reg = <0x0>;
139 device_type = "ethernet-phy";
140 };
141 phy1: ethernet-phy@1 {
142 interrupt-parent = <&mpic>;
143 interrupts = <5 1>;
144 reg = <0x1>;
145 device_type = "ethernet-phy";
146 };
147 tbi0: tbi-phy@11 {
148 reg = <0x11>;
149 device_type = "tbi-phy";
150 };
151 };
152
153 mdio@25520 {
154 #address-cells = <1>;
155 #size-cells = <0>;
156 compatible = "fsl,gianfar-tbi";
157 reg = <0x25520 0x20>;
158
159 tbi1: tbi-phy@11 {
160 reg = <0x11>;
161 device_type = "tbi-phy";
162 };
163 };
164
165 enet0: ethernet@24000 { 129 enet0: ethernet@24000 {
130 #address-cells = <1>;
131 #size-cells = <1>;
166 cell-index = <0>; 132 cell-index = <0>;
167 device_type = "network"; 133 device_type = "network";
168 model = "TSEC"; 134 model = "TSEC";
169 compatible = "gianfar"; 135 compatible = "gianfar";
170 reg = <0x24000 0x1000>; 136 reg = <0x24000 0x1000>;
137 ranges = <0x0 0x24000 0x1000>;
171 local-mac-address = [ 00 00 00 00 00 00 ]; 138 local-mac-address = [ 00 00 00 00 00 00 ];
172 interrupts = <29 2 30 2 34 2>; 139 interrupts = <29 2 30 2 34 2>;
173 interrupt-parent = <&mpic>; 140 interrupt-parent = <&mpic>;
174 tbi-handle = <&tbi0>; 141 tbi-handle = <&tbi0>;
175 phy-handle = <&phy0>; 142 phy-handle = <&phy0>;
143
144 mdio@520 {
145 #address-cells = <1>;
146 #size-cells = <0>;
147 compatible = "fsl,gianfar-mdio";
148 reg = <0x520 0x20>;
149
150 phy0: ethernet-phy@0 {
151 interrupt-parent = <&mpic>;
152 interrupts = <5 1>;
153 reg = <0x0>;
154 device_type = "ethernet-phy";
155 };
156 phy1: ethernet-phy@1 {
157 interrupt-parent = <&mpic>;
158 interrupts = <5 1>;
159 reg = <0x1>;
160 device_type = "ethernet-phy";
161 };
162 tbi0: tbi-phy@11 {
163 reg = <0x11>;
164 device_type = "tbi-phy";
165 };
166 };
176 }; 167 };
177 168
178 enet1: ethernet@25000 { 169 enet1: ethernet@25000 {
170 #address-cells = <1>;
171 #size-cells = <1>;
179 cell-index = <1>; 172 cell-index = <1>;
180 device_type = "network"; 173 device_type = "network";
181 model = "TSEC"; 174 model = "TSEC";
182 compatible = "gianfar"; 175 compatible = "gianfar";
183 reg = <0x25000 0x1000>; 176 reg = <0x25000 0x1000>;
177 ranges = <0x0 0x25000 0x1000>;
184 local-mac-address = [ 00 00 00 00 00 00 ]; 178 local-mac-address = [ 00 00 00 00 00 00 ];
185 interrupts = <35 2 36 2 40 2>; 179 interrupts = <35 2 36 2 40 2>;
186 interrupt-parent = <&mpic>; 180 interrupt-parent = <&mpic>;
187 tbi-handle = <&tbi1>; 181 tbi-handle = <&tbi1>;
188 phy-handle = <&phy1>; 182 phy-handle = <&phy1>;
183
184 mdio@520 {
185 #address-cells = <1>;
186 #size-cells = <0>;
187 compatible = "fsl,gianfar-tbi";
188 reg = <0x520 0x20>;
189
190 tbi1: tbi-phy@11 {
191 reg = <0x11>;
192 device_type = "tbi-phy";
193 };
194 };
189 }; 195 };
190 196
191 serial0: serial@4500 { 197 serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/mpc8544ds.dts b/arch/powerpc/boot/dts/mpc8544ds.dts
index 0668d1048779..7c6932be0197 100644
--- a/arch/powerpc/boot/dts/mpc8544ds.dts
+++ b/arch/powerpc/boot/dts/mpc8544ds.dts
@@ -98,44 +98,6 @@
98 dfsrr; 98 dfsrr;
99 }; 99 };
100 100
101 mdio@24520 {
102 #address-cells = <1>;
103 #size-cells = <0>;
104 compatible = "fsl,gianfar-mdio";
105 reg = <0x24520 0x20>;
106
107 phy0: ethernet-phy@0 {
108 interrupt-parent = <&mpic>;
109 interrupts = <10 1>;
110 reg = <0x0>;
111 device_type = "ethernet-phy";
112 };
113 phy1: ethernet-phy@1 {
114 interrupt-parent = <&mpic>;
115 interrupts = <10 1>;
116 reg = <0x1>;
117 device_type = "ethernet-phy";
118 };
119
120 tbi0: tbi-phy@11 {
121 reg = <0x11>;
122 device_type = "tbi-phy";
123 };
124 };
125
126 mdio@26520 {
127 #address-cells = <1>;
128 #size-cells = <0>;
129 compatible = "fsl,gianfar-tbi";
130 reg = <0x26520 0x20>;
131
132 tbi1: tbi-phy@11 {
133 reg = <0x11>;
134 device_type = "tbi-phy";
135 };
136 };
137
138
139 dma@21300 { 101 dma@21300 {
140 #address-cells = <1>; 102 #address-cells = <1>;
141 #size-cells = <1>; 103 #size-cells = <1>;
@@ -178,31 +140,74 @@
178 }; 140 };
179 141
180 enet0: ethernet@24000 { 142 enet0: ethernet@24000 {
143 #address-cells = <1>;
144 #size-cells = <1>;
181 cell-index = <0>; 145 cell-index = <0>;
182 device_type = "network"; 146 device_type = "network";
183 model = "TSEC"; 147 model = "TSEC";
184 compatible = "gianfar"; 148 compatible = "gianfar";
185 reg = <0x24000 0x1000>; 149 reg = <0x24000 0x1000>;
150 ranges = <0x0 0x24000 0x1000>;
186 local-mac-address = [ 00 00 00 00 00 00 ]; 151 local-mac-address = [ 00 00 00 00 00 00 ];
187 interrupts = <29 2 30 2 34 2>; 152 interrupts = <29 2 30 2 34 2>;
188 interrupt-parent = <&mpic>; 153 interrupt-parent = <&mpic>;
189 phy-handle = <&phy0>; 154 phy-handle = <&phy0>;
190 tbi-handle = <&tbi0>; 155 tbi-handle = <&tbi0>;
191 phy-connection-type = "rgmii-id"; 156 phy-connection-type = "rgmii-id";
157
158 mdio@520 {
159 #address-cells = <1>;
160 #size-cells = <0>;
161 compatible = "fsl,gianfar-mdio";
162 reg = <0x520 0x20>;
163
164 phy0: ethernet-phy@0 {
165 interrupt-parent = <&mpic>;
166 interrupts = <10 1>;
167 reg = <0x0>;
168 device_type = "ethernet-phy";
169 };
170 phy1: ethernet-phy@1 {
171 interrupt-parent = <&mpic>;
172 interrupts = <10 1>;
173 reg = <0x1>;
174 device_type = "ethernet-phy";
175 };
176
177 tbi0: tbi-phy@11 {
178 reg = <0x11>;
179 device_type = "tbi-phy";
180 };
181 };
192 }; 182 };
193 183
194 enet1: ethernet@26000 { 184 enet1: ethernet@26000 {
185 #address-cells = <1>;
186 #size-cells = <1>;
195 cell-index = <1>; 187 cell-index = <1>;
196 device_type = "network"; 188 device_type = "network";
197 model = "TSEC"; 189 model = "TSEC";
198 compatible = "gianfar"; 190 compatible = "gianfar";
199 reg = <0x26000 0x1000>; 191 reg = <0x26000 0x1000>;
192 ranges = <0x0 0x26000 0x1000>;
200 local-mac-address = [ 00 00 00 00 00 00 ]; 193 local-mac-address = [ 00 00 00 00 00 00 ];
201 interrupts = <31 2 32 2 33 2>; 194 interrupts = <31 2 32 2 33 2>;
202 interrupt-parent = <&mpic>; 195 interrupt-parent = <&mpic>;
203 phy-handle = <&phy1>; 196 phy-handle = <&phy1>;
204 tbi-handle = <&tbi1>; 197 tbi-handle = <&tbi1>;
205 phy-connection-type = "rgmii-id"; 198 phy-connection-type = "rgmii-id";
199
200 mdio@520 {
201 #address-cells = <1>;
202 #size-cells = <0>;
203 compatible = "fsl,gianfar-tbi";
204 reg = <0x520 0x20>;
205
206 tbi1: tbi-phy@11 {
207 reg = <0x11>;
208 device_type = "tbi-phy";
209 };
210 };
206 }; 211 };
207 212
208 serial0: serial@4500 { 213 serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/mpc8548cds.dts b/arch/powerpc/boot/dts/mpc8548cds.dts
index df774a7088ff..804e90353293 100644
--- a/arch/powerpc/boot/dts/mpc8548cds.dts
+++ b/arch/powerpc/boot/dts/mpc8548cds.dts
@@ -142,129 +142,141 @@
142 }; 142 };
143 }; 143 };
144 144
145 mdio@24520 {
146 #address-cells = <1>;
147 #size-cells = <0>;
148 compatible = "fsl,gianfar-mdio";
149 reg = <0x24520 0x20>;
150
151 phy0: ethernet-phy@0 {
152 interrupt-parent = <&mpic>;
153 interrupts = <5 1>;
154 reg = <0x0>;
155 device_type = "ethernet-phy";
156 };
157 phy1: ethernet-phy@1 {
158 interrupt-parent = <&mpic>;
159 interrupts = <5 1>;
160 reg = <0x1>;
161 device_type = "ethernet-phy";
162 };
163 phy2: ethernet-phy@2 {
164 interrupt-parent = <&mpic>;
165 interrupts = <5 1>;
166 reg = <0x2>;
167 device_type = "ethernet-phy";
168 };
169 phy3: ethernet-phy@3 {
170 interrupt-parent = <&mpic>;
171 interrupts = <5 1>;
172 reg = <0x3>;
173 device_type = "ethernet-phy";
174 };
175 tbi0: tbi-phy@11 {
176 reg = <0x11>;
177 device_type = "tbi-phy";
178 };
179 };
180
181 mdio@25520 {
182 #address-cells = <1>;
183 #size-cells = <0>;
184 compatible = "fsl,gianfar-tbi";
185 reg = <0x25520 0x20>;
186
187 tbi1: tbi-phy@11 {
188 reg = <0x11>;
189 device_type = "tbi-phy";
190 };
191 };
192
193 mdio@26520 {
194 #address-cells = <1>;
195 #size-cells = <0>;
196 compatible = "fsl,gianfar-tbi";
197 reg = <0x26520 0x20>;
198
199 tbi2: tbi-phy@11 {
200 reg = <0x11>;
201 device_type = "tbi-phy";
202 };
203 };
204
205 mdio@27520 {
206 #address-cells = <1>;
207 #size-cells = <0>;
208 compatible = "fsl,gianfar-tbi";
209 reg = <0x27520 0x20>;
210
211 tbi3: tbi-phy@11 {
212 reg = <0x11>;
213 device_type = "tbi-phy";
214 };
215 };
216
217 enet0: ethernet@24000 { 145 enet0: ethernet@24000 {
146 #address-cells = <1>;
147 #size-cells = <1>;
218 cell-index = <0>; 148 cell-index = <0>;
219 device_type = "network"; 149 device_type = "network";
220 model = "eTSEC"; 150 model = "eTSEC";
221 compatible = "gianfar"; 151 compatible = "gianfar";
222 reg = <0x24000 0x1000>; 152 reg = <0x24000 0x1000>;
153 ranges = <0x0 0x24000 0x1000>;
223 local-mac-address = [ 00 00 00 00 00 00 ]; 154 local-mac-address = [ 00 00 00 00 00 00 ];
224 interrupts = <29 2 30 2 34 2>; 155 interrupts = <29 2 30 2 34 2>;
225 interrupt-parent = <&mpic>; 156 interrupt-parent = <&mpic>;
226 tbi-handle = <&tbi0>; 157 tbi-handle = <&tbi0>;
227 phy-handle = <&phy0>; 158 phy-handle = <&phy0>;
159
160 mdio@520 {
161 #address-cells = <1>;
162 #size-cells = <0>;
163 compatible = "fsl,gianfar-mdio";
164 reg = <0x520 0x20>;
165
166 phy0: ethernet-phy@0 {
167 interrupt-parent = <&mpic>;
168 interrupts = <5 1>;
169 reg = <0x0>;
170 device_type = "ethernet-phy";
171 };
172 phy1: ethernet-phy@1 {
173 interrupt-parent = <&mpic>;
174 interrupts = <5 1>;
175 reg = <0x1>;
176 device_type = "ethernet-phy";
177 };
178 phy2: ethernet-phy@2 {
179 interrupt-parent = <&mpic>;
180 interrupts = <5 1>;
181 reg = <0x2>;
182 device_type = "ethernet-phy";
183 };
184 phy3: ethernet-phy@3 {
185 interrupt-parent = <&mpic>;
186 interrupts = <5 1>;
187 reg = <0x3>;
188 device_type = "ethernet-phy";
189 };
190 tbi0: tbi-phy@11 {
191 reg = <0x11>;
192 device_type = "tbi-phy";
193 };
194 };
228 }; 195 };
229 196
230 enet1: ethernet@25000 { 197 enet1: ethernet@25000 {
198 #address-cells = <1>;
199 #size-cells = <1>;
231 cell-index = <1>; 200 cell-index = <1>;
232 device_type = "network"; 201 device_type = "network";
233 model = "eTSEC"; 202 model = "eTSEC";
234 compatible = "gianfar"; 203 compatible = "gianfar";
235 reg = <0x25000 0x1000>; 204 reg = <0x25000 0x1000>;
205 ranges = <0x0 0x25000 0x1000>;
236 local-mac-address = [ 00 00 00 00 00 00 ]; 206 local-mac-address = [ 00 00 00 00 00 00 ];
237 interrupts = <35 2 36 2 40 2>; 207 interrupts = <35 2 36 2 40 2>;
238 interrupt-parent = <&mpic>; 208 interrupt-parent = <&mpic>;
239 tbi-handle = <&tbi1>; 209 tbi-handle = <&tbi1>;
240 phy-handle = <&phy1>; 210 phy-handle = <&phy1>;
211
212 mdio@520 {
213 #address-cells = <1>;
214 #size-cells = <0>;
215 compatible = "fsl,gianfar-tbi";
216 reg = <0x520 0x20>;
217
218 tbi1: tbi-phy@11 {
219 reg = <0x11>;
220 device_type = "tbi-phy";
221 };
222 };
241 }; 223 };
242 224
243/* eTSEC 3/4 are currently broken 225/* eTSEC 3/4 are currently broken
244 enet2: ethernet@26000 { 226 enet2: ethernet@26000 {
227 #address-cells = <1>;
228 #size-cells = <1>;
245 cell-index = <2>; 229 cell-index = <2>;
246 device_type = "network"; 230 device_type = "network";
247 model = "eTSEC"; 231 model = "eTSEC";
248 compatible = "gianfar"; 232 compatible = "gianfar";
249 reg = <0x26000 0x1000>; 233 reg = <0x26000 0x1000>;
234 ranges = <0x0 0x26000 0x1000>;
250 local-mac-address = [ 00 00 00 00 00 00 ]; 235 local-mac-address = [ 00 00 00 00 00 00 ];
251 interrupts = <31 2 32 2 33 2>; 236 interrupts = <31 2 32 2 33 2>;
252 interrupt-parent = <&mpic>; 237 interrupt-parent = <&mpic>;
253 tbi-handle = <&tbi2>; 238 tbi-handle = <&tbi2>;
254 phy-handle = <&phy2>; 239 phy-handle = <&phy2>;
240
241 mdio@520 {
242 #address-cells = <1>;
243 #size-cells = <0>;
244 compatible = "fsl,gianfar-tbi";
245 reg = <0x520 0x20>;
246
247 tbi2: tbi-phy@11 {
248 reg = <0x11>;
249 device_type = "tbi-phy";
250 };
251 };
255 }; 252 };
256 253
257 enet3: ethernet@27000 { 254 enet3: ethernet@27000 {
255 #address-cells = <1>;
256 #size-cells = <1>;
258 cell-index = <3>; 257 cell-index = <3>;
259 device_type = "network"; 258 device_type = "network";
260 model = "eTSEC"; 259 model = "eTSEC";
261 compatible = "gianfar"; 260 compatible = "gianfar";
262 reg = <0x27000 0x1000>; 261 reg = <0x27000 0x1000>;
262 ranges = <0x0 0x27000 0x1000>;
263 local-mac-address = [ 00 00 00 00 00 00 ]; 263 local-mac-address = [ 00 00 00 00 00 00 ];
264 interrupts = <37 2 38 2 39 2>; 264 interrupts = <37 2 38 2 39 2>;
265 interrupt-parent = <&mpic>; 265 interrupt-parent = <&mpic>;
266 tbi-handle = <&tbi3>; 266 tbi-handle = <&tbi3>;
267 phy-handle = <&phy3>; 267 phy-handle = <&phy3>;
268
269 mdio@520 {
270 #address-cells = <1>;
271 #size-cells = <0>;
272 compatible = "fsl,gianfar-tbi";
273 reg = <0x520 0x20>;
274
275 tbi3: tbi-phy@11 {
276 reg = <0x11>;
277 device_type = "tbi-phy";
278 };
279 };
268 }; 280 };
269 */ 281 */
270 282
diff --git a/arch/powerpc/boot/dts/mpc8555cds.dts b/arch/powerpc/boot/dts/mpc8555cds.dts
index 053b01e1c93b..9484f0729b10 100644
--- a/arch/powerpc/boot/dts/mpc8555cds.dts
+++ b/arch/powerpc/boot/dts/mpc8555cds.dts
@@ -126,66 +126,72 @@
126 }; 126 };
127 }; 127 };
128 128
129 mdio@24520 {
130 #address-cells = <1>;
131 #size-cells = <0>;
132 compatible = "fsl,gianfar-mdio";
133 reg = <0x24520 0x20>;
134
135 phy0: ethernet-phy@0 {
136 interrupt-parent = <&mpic>;
137 interrupts = <5 1>;
138 reg = <0x0>;
139 device_type = "ethernet-phy";
140 };
141 phy1: ethernet-phy@1 {
142 interrupt-parent = <&mpic>;
143 interrupts = <5 1>;
144 reg = <0x1>;
145 device_type = "ethernet-phy";
146 };
147 tbi0: tbi-phy@11 {
148 reg = <0x11>;
149 device_type = "tbi-phy";
150 };
151 };
152
153 mdio@25520 {
154 #address-cells = <1>;
155 #size-cells = <0>;
156 compatible = "fsl,gianfar-tbi";
157 reg = <0x25520 0x20>;
158
159 tbi1: tbi-phy@11 {
160 reg = <0x11>;
161 device_type = "tbi-phy";
162 };
163 };
164
165 enet0: ethernet@24000 { 129 enet0: ethernet@24000 {
130 #address-cells = <1>;
131 #size-cells = <1>;
166 cell-index = <0>; 132 cell-index = <0>;
167 device_type = "network"; 133 device_type = "network";
168 model = "TSEC"; 134 model = "TSEC";
169 compatible = "gianfar"; 135 compatible = "gianfar";
170 reg = <0x24000 0x1000>; 136 reg = <0x24000 0x1000>;
137 ranges = <0x0 0x24000 0x1000>;
171 local-mac-address = [ 00 00 00 00 00 00 ]; 138 local-mac-address = [ 00 00 00 00 00 00 ];
172 interrupts = <29 2 30 2 34 2>; 139 interrupts = <29 2 30 2 34 2>;
173 interrupt-parent = <&mpic>; 140 interrupt-parent = <&mpic>;
174 tbi-handle = <&tbi0>; 141 tbi-handle = <&tbi0>;
175 phy-handle = <&phy0>; 142 phy-handle = <&phy0>;
143
144 mdio@520 {
145 #address-cells = <1>;
146 #size-cells = <0>;
147 compatible = "fsl,gianfar-mdio";
148 reg = <0x520 0x20>;
149
150 phy0: ethernet-phy@0 {
151 interrupt-parent = <&mpic>;
152 interrupts = <5 1>;
153 reg = <0x0>;
154 device_type = "ethernet-phy";
155 };
156 phy1: ethernet-phy@1 {
157 interrupt-parent = <&mpic>;
158 interrupts = <5 1>;
159 reg = <0x1>;
160 device_type = "ethernet-phy";
161 };
162 tbi0: tbi-phy@11 {
163 reg = <0x11>;
164 device_type = "tbi-phy";
165 };
166 };
176 }; 167 };
177 168
178 enet1: ethernet@25000 { 169 enet1: ethernet@25000 {
170 #address-cells = <1>;
171 #size-cells = <1>;
179 cell-index = <1>; 172 cell-index = <1>;
180 device_type = "network"; 173 device_type = "network";
181 model = "TSEC"; 174 model = "TSEC";
182 compatible = "gianfar"; 175 compatible = "gianfar";
183 reg = <0x25000 0x1000>; 176 reg = <0x25000 0x1000>;
177 ranges = <0x0 0x25000 0x1000>;
184 local-mac-address = [ 00 00 00 00 00 00 ]; 178 local-mac-address = [ 00 00 00 00 00 00 ];
185 interrupts = <35 2 36 2 40 2>; 179 interrupts = <35 2 36 2 40 2>;
186 interrupt-parent = <&mpic>; 180 interrupt-parent = <&mpic>;
187 tbi-handle = <&tbi1>; 181 tbi-handle = <&tbi1>;
188 phy-handle = <&phy1>; 182 phy-handle = <&phy1>;
183
184 mdio@520 {
185 #address-cells = <1>;
186 #size-cells = <0>;
187 compatible = "fsl,gianfar-tbi";
188 reg = <0x520 0x20>;
189
190 tbi1: tbi-phy@11 {
191 reg = <0x11>;
192 device_type = "tbi-phy";
193 };
194 };
189 }; 195 };
190 196
191 serial0: serial@4500 { 197 serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/mpc8560ads.dts b/arch/powerpc/boot/dts/mpc8560ads.dts
index 11b1bcbe14ce..cc2acf87d02f 100644
--- a/arch/powerpc/boot/dts/mpc8560ads.dts
+++ b/arch/powerpc/boot/dts/mpc8560ads.dts
@@ -115,78 +115,84 @@
115 }; 115 };
116 }; 116 };
117 117
118 mdio@24520 {
119 #address-cells = <1>;
120 #size-cells = <0>;
121 compatible = "fsl,gianfar-mdio";
122 reg = <0x24520 0x20>;
123
124 phy0: ethernet-phy@0 {
125 interrupt-parent = <&mpic>;
126 interrupts = <5 1>;
127 reg = <0x0>;
128 device_type = "ethernet-phy";
129 };
130 phy1: ethernet-phy@1 {
131 interrupt-parent = <&mpic>;
132 interrupts = <5 1>;
133 reg = <0x1>;
134 device_type = "ethernet-phy";
135 };
136 phy2: ethernet-phy@2 {
137 interrupt-parent = <&mpic>;
138 interrupts = <7 1>;
139 reg = <0x2>;
140 device_type = "ethernet-phy";
141 };
142 phy3: ethernet-phy@3 {
143 interrupt-parent = <&mpic>;
144 interrupts = <7 1>;
145 reg = <0x3>;
146 device_type = "ethernet-phy";
147 };
148 tbi0: tbi-phy@11 {
149 reg = <0x11>;
150 device_type = "tbi-phy";
151 };
152 };
153
154 mdio@25520 {
155 #address-cells = <1>;
156 #size-cells = <0>;
157 compatible = "fsl,gianfar-tbi";
158 reg = <0x25520 0x20>;
159
160 tbi1: tbi-phy@11 {
161 reg = <0x11>;
162 device_type = "tbi-phy";
163 };
164 };
165
166 enet0: ethernet@24000 { 118 enet0: ethernet@24000 {
119 #address-cells = <1>;
120 #size-cells = <1>;
167 cell-index = <0>; 121 cell-index = <0>;
168 device_type = "network"; 122 device_type = "network";
169 model = "TSEC"; 123 model = "TSEC";
170 compatible = "gianfar"; 124 compatible = "gianfar";
171 reg = <0x24000 0x1000>; 125 reg = <0x24000 0x1000>;
126 ranges = <0x0 0x24000 0x1000>;
172 local-mac-address = [ 00 00 00 00 00 00 ]; 127 local-mac-address = [ 00 00 00 00 00 00 ];
173 interrupts = <29 2 30 2 34 2>; 128 interrupts = <29 2 30 2 34 2>;
174 interrupt-parent = <&mpic>; 129 interrupt-parent = <&mpic>;
175 tbi-handle = <&tbi0>; 130 tbi-handle = <&tbi0>;
176 phy-handle = <&phy0>; 131 phy-handle = <&phy0>;
132
133 mdio@520 {
134 #address-cells = <1>;
135 #size-cells = <0>;
136 compatible = "fsl,gianfar-mdio";
137 reg = <0x520 0x20>;
138
139 phy0: ethernet-phy@0 {
140 interrupt-parent = <&mpic>;
141 interrupts = <5 1>;
142 reg = <0x0>;
143 device_type = "ethernet-phy";
144 };
145 phy1: ethernet-phy@1 {
146 interrupt-parent = <&mpic>;
147 interrupts = <5 1>;
148 reg = <0x1>;
149 device_type = "ethernet-phy";
150 };
151 phy2: ethernet-phy@2 {
152 interrupt-parent = <&mpic>;
153 interrupts = <7 1>;
154 reg = <0x2>;
155 device_type = "ethernet-phy";
156 };
157 phy3: ethernet-phy@3 {
158 interrupt-parent = <&mpic>;
159 interrupts = <7 1>;
160 reg = <0x3>;
161 device_type = "ethernet-phy";
162 };
163 tbi0: tbi-phy@11 {
164 reg = <0x11>;
165 device_type = "tbi-phy";
166 };
167 };
177 }; 168 };
178 169
179 enet1: ethernet@25000 { 170 enet1: ethernet@25000 {
171 #address-cells = <1>;
172 #size-cells = <1>;
180 cell-index = <1>; 173 cell-index = <1>;
181 device_type = "network"; 174 device_type = "network";
182 model = "TSEC"; 175 model = "TSEC";
183 compatible = "gianfar"; 176 compatible = "gianfar";
184 reg = <0x25000 0x1000>; 177 reg = <0x25000 0x1000>;
178 ranges = <0x0 0x25000 0x1000>;
185 local-mac-address = [ 00 00 00 00 00 00 ]; 179 local-mac-address = [ 00 00 00 00 00 00 ];
186 interrupts = <35 2 36 2 40 2>; 180 interrupts = <35 2 36 2 40 2>;
187 interrupt-parent = <&mpic>; 181 interrupt-parent = <&mpic>;
188 tbi-handle = <&tbi1>; 182 tbi-handle = <&tbi1>;
189 phy-handle = <&phy1>; 183 phy-handle = <&phy1>;
184
185 mdio@520 {
186 #address-cells = <1>;
187 #size-cells = <0>;
188 compatible = "fsl,gianfar-tbi";
189 reg = <0x520 0x20>;
190
191 tbi1: tbi-phy@11 {
192 reg = <0x11>;
193 device_type = "tbi-phy";
194 };
195 };
190 }; 196 };
191 197
192 mpic: pic@40000 { 198 mpic: pic@40000 {
diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts/mpc8568mds.dts
index 1955bd9e113d..9d52e3b25047 100644
--- a/arch/powerpc/boot/dts/mpc8568mds.dts
+++ b/arch/powerpc/boot/dts/mpc8568mds.dts
@@ -149,78 +149,84 @@
149 }; 149 };
150 }; 150 };
151 151
152 mdio@24520 {
153 #address-cells = <1>;
154 #size-cells = <0>;
155 compatible = "fsl,gianfar-mdio";
156 reg = <0x24520 0x20>;
157
158 phy0: ethernet-phy@7 {
159 interrupt-parent = <&mpic>;
160 interrupts = <1 1>;
161 reg = <0x7>;
162 device_type = "ethernet-phy";
163 };
164 phy1: ethernet-phy@1 {
165 interrupt-parent = <&mpic>;
166 interrupts = <2 1>;
167 reg = <0x1>;
168 device_type = "ethernet-phy";
169 };
170 phy2: ethernet-phy@2 {
171 interrupt-parent = <&mpic>;
172 interrupts = <1 1>;
173 reg = <0x2>;
174 device_type = "ethernet-phy";
175 };
176 phy3: ethernet-phy@3 {
177 interrupt-parent = <&mpic>;
178 interrupts = <2 1>;
179 reg = <0x3>;
180 device_type = "ethernet-phy";
181 };
182 tbi0: tbi-phy@11 {
183 reg = <0x11>;
184 device_type = "tbi-phy";
185 };
186 };
187
188 mdio@25520 {
189 #address-cells = <1>;
190 #size-cells = <0>;
191 compatible = "fsl,gianfar-tbi";
192 reg = <0x25520 0x20>;
193
194 tbi1: tbi-phy@11 {
195 reg = <0x11>;
196 device_type = "tbi-phy";
197 };
198 };
199
200 enet0: ethernet@24000 { 152 enet0: ethernet@24000 {
153 #address-cells = <1>;
154 #size-cells = <1>;
201 cell-index = <0>; 155 cell-index = <0>;
202 device_type = "network"; 156 device_type = "network";
203 model = "eTSEC"; 157 model = "eTSEC";
204 compatible = "gianfar"; 158 compatible = "gianfar";
205 reg = <0x24000 0x1000>; 159 reg = <0x24000 0x1000>;
160 ranges = <0x0 0x24000 0x1000>;
206 local-mac-address = [ 00 00 00 00 00 00 ]; 161 local-mac-address = [ 00 00 00 00 00 00 ];
207 interrupts = <29 2 30 2 34 2>; 162 interrupts = <29 2 30 2 34 2>;
208 interrupt-parent = <&mpic>; 163 interrupt-parent = <&mpic>;
209 tbi-handle = <&tbi0>; 164 tbi-handle = <&tbi0>;
210 phy-handle = <&phy2>; 165 phy-handle = <&phy2>;
166
167 mdio@520 {
168 #address-cells = <1>;
169 #size-cells = <0>;
170 compatible = "fsl,gianfar-mdio";
171 reg = <0x520 0x20>;
172
173 phy0: ethernet-phy@7 {
174 interrupt-parent = <&mpic>;
175 interrupts = <1 1>;
176 reg = <0x7>;
177 device_type = "ethernet-phy";
178 };
179 phy1: ethernet-phy@1 {
180 interrupt-parent = <&mpic>;
181 interrupts = <2 1>;
182 reg = <0x1>;
183 device_type = "ethernet-phy";
184 };
185 phy2: ethernet-phy@2 {
186 interrupt-parent = <&mpic>;
187 interrupts = <1 1>;
188 reg = <0x2>;
189 device_type = "ethernet-phy";
190 };
191 phy3: ethernet-phy@3 {
192 interrupt-parent = <&mpic>;
193 interrupts = <2 1>;
194 reg = <0x3>;
195 device_type = "ethernet-phy";
196 };
197 tbi0: tbi-phy@11 {
198 reg = <0x11>;
199 device_type = "tbi-phy";
200 };
201 };
211 }; 202 };
212 203
213 enet1: ethernet@25000 { 204 enet1: ethernet@25000 {
205 #address-cells = <1>;
206 #size-cells = <1>;
214 cell-index = <1>; 207 cell-index = <1>;
215 device_type = "network"; 208 device_type = "network";
216 model = "eTSEC"; 209 model = "eTSEC";
217 compatible = "gianfar"; 210 compatible = "gianfar";
218 reg = <0x25000 0x1000>; 211 reg = <0x25000 0x1000>;
212 ranges = <0x0 0x25000 0x1000>;
219 local-mac-address = [ 00 00 00 00 00 00 ]; 213 local-mac-address = [ 00 00 00 00 00 00 ];
220 interrupts = <35 2 36 2 40 2>; 214 interrupts = <35 2 36 2 40 2>;
221 interrupt-parent = <&mpic>; 215 interrupt-parent = <&mpic>;
222 tbi-handle = <&tbi1>; 216 tbi-handle = <&tbi1>;
223 phy-handle = <&phy3>; 217 phy-handle = <&phy3>;
218
219 mdio@520 {
220 #address-cells = <1>;
221 #size-cells = <0>;
222 compatible = "fsl,gianfar-tbi";
223 reg = <0x520 0x20>;
224
225 tbi1: tbi-phy@11 {
226 reg = <0x11>;
227 device_type = "tbi-phy";
228 };
229 };
224 }; 230 };
225 231
226 serial0: serial@4500 { 232 serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/mpc8572ds.dts b/arch/powerpc/boot/dts/mpc8572ds.dts
index 359c3b727420..6e79a4169088 100644
--- a/arch/powerpc/boot/dts/mpc8572ds.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * MPC8572 DS Device Tree Source 2 * MPC8572 DS Device Tree Source
3 * 3 *
4 * Copyright 2007, 2008 Freescale Semiconductor Inc. 4 * Copyright 2007-2009 Freescale Semiconductor Inc.
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify it 6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the 7 * under the terms of the GNU General Public License as published by the
@@ -312,129 +312,141 @@
312 }; 312 };
313 }; 313 };
314 314
315 mdio@24520 {
316 #address-cells = <1>;
317 #size-cells = <0>;
318 compatible = "fsl,gianfar-mdio";
319 reg = <0x24520 0x20>;
320
321 phy0: ethernet-phy@0 {
322 interrupt-parent = <&mpic>;
323 interrupts = <10 1>;
324 reg = <0x0>;
325 };
326 phy1: ethernet-phy@1 {
327 interrupt-parent = <&mpic>;
328 interrupts = <10 1>;
329 reg = <0x1>;
330 };
331 phy2: ethernet-phy@2 {
332 interrupt-parent = <&mpic>;
333 interrupts = <10 1>;
334 reg = <0x2>;
335 };
336 phy3: ethernet-phy@3 {
337 interrupt-parent = <&mpic>;
338 interrupts = <10 1>;
339 reg = <0x3>;
340 };
341
342 tbi0: tbi-phy@11 {
343 reg = <0x11>;
344 device_type = "tbi-phy";
345 };
346 };
347
348 mdio@25520 {
349 #address-cells = <1>;
350 #size-cells = <0>;
351 compatible = "fsl,gianfar-tbi";
352 reg = <0x25520 0x20>;
353
354 tbi1: tbi-phy@11 {
355 reg = <0x11>;
356 device_type = "tbi-phy";
357 };
358 };
359
360 mdio@26520 {
361 #address-cells = <1>;
362 #size-cells = <0>;
363 compatible = "fsl,gianfar-tbi";
364 reg = <0x26520 0x20>;
365
366 tbi2: tbi-phy@11 {
367 reg = <0x11>;
368 device_type = "tbi-phy";
369 };
370 };
371
372 mdio@27520 {
373 #address-cells = <1>;
374 #size-cells = <0>;
375 compatible = "fsl,gianfar-tbi";
376 reg = <0x27520 0x20>;
377
378 tbi3: tbi-phy@11 {
379 reg = <0x11>;
380 device_type = "tbi-phy";
381 };
382 };
383
384 enet0: ethernet@24000 { 315 enet0: ethernet@24000 {
316 #address-cells = <1>;
317 #size-cells = <1>;
385 cell-index = <0>; 318 cell-index = <0>;
386 device_type = "network"; 319 device_type = "network";
387 model = "eTSEC"; 320 model = "eTSEC";
388 compatible = "gianfar"; 321 compatible = "gianfar";
389 reg = <0x24000 0x1000>; 322 reg = <0x24000 0x1000>;
323 ranges = <0x0 0x24000 0x1000>;
390 local-mac-address = [ 00 00 00 00 00 00 ]; 324 local-mac-address = [ 00 00 00 00 00 00 ];
391 interrupts = <29 2 30 2 34 2>; 325 interrupts = <29 2 30 2 34 2>;
392 interrupt-parent = <&mpic>; 326 interrupt-parent = <&mpic>;
393 tbi-handle = <&tbi0>; 327 tbi-handle = <&tbi0>;
394 phy-handle = <&phy0>; 328 phy-handle = <&phy0>;
395 phy-connection-type = "rgmii-id"; 329 phy-connection-type = "rgmii-id";
330
331 mdio@520 {
332 #address-cells = <1>;
333 #size-cells = <0>;
334 compatible = "fsl,gianfar-mdio";
335 reg = <0x520 0x20>;
336
337 phy0: ethernet-phy@0 {
338 interrupt-parent = <&mpic>;
339 interrupts = <10 1>;
340 reg = <0x0>;
341 };
342 phy1: ethernet-phy@1 {
343 interrupt-parent = <&mpic>;
344 interrupts = <10 1>;
345 reg = <0x1>;
346 };
347 phy2: ethernet-phy@2 {
348 interrupt-parent = <&mpic>;
349 interrupts = <10 1>;
350 reg = <0x2>;
351 };
352 phy3: ethernet-phy@3 {
353 interrupt-parent = <&mpic>;
354 interrupts = <10 1>;
355 reg = <0x3>;
356 };
357
358 tbi0: tbi-phy@11 {
359 reg = <0x11>;
360 device_type = "tbi-phy";
361 };
362 };
396 }; 363 };
397 364
398 enet1: ethernet@25000 { 365 enet1: ethernet@25000 {
366 #address-cells = <1>;
367 #size-cells = <1>;
399 cell-index = <1>; 368 cell-index = <1>;
400 device_type = "network"; 369 device_type = "network";
401 model = "eTSEC"; 370 model = "eTSEC";
402 compatible = "gianfar"; 371 compatible = "gianfar";
403 reg = <0x25000 0x1000>; 372 reg = <0x25000 0x1000>;
373 ranges = <0x0 0x25000 0x1000>;
404 local-mac-address = [ 00 00 00 00 00 00 ]; 374 local-mac-address = [ 00 00 00 00 00 00 ];
405 interrupts = <35 2 36 2 40 2>; 375 interrupts = <35 2 36 2 40 2>;
406 interrupt-parent = <&mpic>; 376 interrupt-parent = <&mpic>;
407 tbi-handle = <&tbi1>; 377 tbi-handle = <&tbi1>;
408 phy-handle = <&phy1>; 378 phy-handle = <&phy1>;
409 phy-connection-type = "rgmii-id"; 379 phy-connection-type = "rgmii-id";
380
381 mdio@520 {
382 #address-cells = <1>;
383 #size-cells = <0>;
384 compatible = "fsl,gianfar-tbi";
385 reg = <0x520 0x20>;
386
387 tbi1: tbi-phy@11 {
388 reg = <0x11>;
389 device_type = "tbi-phy";
390 };
391 };
410 }; 392 };
411 393
412 enet2: ethernet@26000 { 394 enet2: ethernet@26000 {
395 #address-cells = <1>;
396 #size-cells = <1>;
413 cell-index = <2>; 397 cell-index = <2>;
414 device_type = "network"; 398 device_type = "network";
415 model = "eTSEC"; 399 model = "eTSEC";
416 compatible = "gianfar"; 400 compatible = "gianfar";
417 reg = <0x26000 0x1000>; 401 reg = <0x26000 0x1000>;
402 ranges = <0x0 0x26000 0x1000>;
418 local-mac-address = [ 00 00 00 00 00 00 ]; 403 local-mac-address = [ 00 00 00 00 00 00 ];
419 interrupts = <31 2 32 2 33 2>; 404 interrupts = <31 2 32 2 33 2>;
420 interrupt-parent = <&mpic>; 405 interrupt-parent = <&mpic>;
421 tbi-handle = <&tbi2>; 406 tbi-handle = <&tbi2>;
422 phy-handle = <&phy2>; 407 phy-handle = <&phy2>;
423 phy-connection-type = "rgmii-id"; 408 phy-connection-type = "rgmii-id";
409
410 mdio@520 {
411 #address-cells = <1>;
412 #size-cells = <0>;
413 compatible = "fsl,gianfar-tbi";
414 reg = <0x520 0x20>;
415
416 tbi2: tbi-phy@11 {
417 reg = <0x11>;
418 device_type = "tbi-phy";
419 };
420 };
424 }; 421 };
425 422
426 enet3: ethernet@27000 { 423 enet3: ethernet@27000 {
424 #address-cells = <1>;
425 #size-cells = <1>;
427 cell-index = <3>; 426 cell-index = <3>;
428 device_type = "network"; 427 device_type = "network";
429 model = "eTSEC"; 428 model = "eTSEC";
430 compatible = "gianfar"; 429 compatible = "gianfar";
431 reg = <0x27000 0x1000>; 430 reg = <0x27000 0x1000>;
431 ranges = <0x0 0x27000 0x1000>;
432 local-mac-address = [ 00 00 00 00 00 00 ]; 432 local-mac-address = [ 00 00 00 00 00 00 ];
433 interrupts = <37 2 38 2 39 2>; 433 interrupts = <37 2 38 2 39 2>;
434 interrupt-parent = <&mpic>; 434 interrupt-parent = <&mpic>;
435 tbi-handle = <&tbi3>; 435 tbi-handle = <&tbi3>;
436 phy-handle = <&phy3>; 436 phy-handle = <&phy3>;
437 phy-connection-type = "rgmii-id"; 437 phy-connection-type = "rgmii-id";
438
439 mdio@520 {
440 #address-cells = <1>;
441 #size-cells = <0>;
442 compatible = "fsl,gianfar-tbi";
443 reg = <0x520 0x20>;
444
445 tbi3: tbi-phy@11 {
446 reg = <0x11>;
447 device_type = "tbi-phy";
448 };
449 };
438 }; 450 };
439 451
440 serial0: serial@4500 { 452 serial0: serial@4500 {
@@ -643,7 +655,7 @@
643 655
644 0x1000000 0x0 0x0 656 0x1000000 0x0 0x0
645 0x1000000 0x0 0x0 657 0x1000000 0x0 0x0
646 0x0 0x100000>; 658 0x0 0x10000>;
647 uli1575@0 { 659 uli1575@0 {
648 reg = <0x0 0x0 0x0 0x0 0x0>; 660 reg = <0x0 0x0 0x0 0x0 0x0>;
649 #size-cells = <2>; 661 #size-cells = <2>;
@@ -654,7 +666,7 @@
654 666
655 0x1000000 0x0 0x0 667 0x1000000 0x0 0x0
656 0x1000000 0x0 0x0 668 0x1000000 0x0 0x0
657 0x0 0x100000>; 669 0x0 0x10000>;
658 isa@1e { 670 isa@1e {
659 device_type = "isa"; 671 device_type = "isa";
660 #interrupt-cells = <2>; 672 #interrupt-cells = <2>;
@@ -744,7 +756,7 @@
744 756
745 0x1000000 0x0 0x0 757 0x1000000 0x0 0x0
746 0x1000000 0x0 0x0 758 0x1000000 0x0 0x0
747 0x0 0x100000>; 759 0x0 0x10000>;
748 }; 760 };
749 }; 761 };
750 762
@@ -781,7 +793,7 @@
781 793
782 0x1000000 0x0 0x0 794 0x1000000 0x0 0x0
783 0x1000000 0x0 0x0 795 0x1000000 0x0 0x0
784 0x0 0x100000>; 796 0x0 0x10000>;
785 }; 797 };
786 }; 798 };
787}; 799};
diff --git a/arch/powerpc/boot/dts/mpc8572ds_36b.dts b/arch/powerpc/boot/dts/mpc8572ds_36b.dts
new file mode 100644
index 000000000000..dbd81a764742
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc8572ds_36b.dts
@@ -0,0 +1,799 @@
1/*
2 * MPC8572 DS Device Tree Source
3 *
4 * Copyright 2007-2009 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/dts-v1/;
13/ {
14 model = "fsl,MPC8572DS";
15 compatible = "fsl,MPC8572DS";
16 #address-cells = <2>;
17 #size-cells = <2>;
18
19 aliases {
20 ethernet0 = &enet0;
21 ethernet1 = &enet1;
22 ethernet2 = &enet2;
23 ethernet3 = &enet3;
24 serial0 = &serial0;
25 serial1 = &serial1;
26 pci0 = &pci0;
27 pci1 = &pci1;
28 pci2 = &pci2;
29 };
30
31 cpus {
32 #address-cells = <1>;
33 #size-cells = <0>;
34
35 PowerPC,8572@0 {
36 device_type = "cpu";
37 reg = <0x0>;
38 d-cache-line-size = <32>; // 32 bytes
39 i-cache-line-size = <32>; // 32 bytes
40 d-cache-size = <0x8000>; // L1, 32K
41 i-cache-size = <0x8000>; // L1, 32K
42 timebase-frequency = <0>;
43 bus-frequency = <0>;
44 clock-frequency = <0>;
45 next-level-cache = <&L2>;
46 };
47
48 PowerPC,8572@1 {
49 device_type = "cpu";
50 reg = <0x1>;
51 d-cache-line-size = <32>; // 32 bytes
52 i-cache-line-size = <32>; // 32 bytes
53 d-cache-size = <0x8000>; // L1, 32K
54 i-cache-size = <0x8000>; // L1, 32K
55 timebase-frequency = <0>;
56 bus-frequency = <0>;
57 clock-frequency = <0>;
58 next-level-cache = <&L2>;
59 };
60 };
61
62 memory {
63 device_type = "memory";
64 };
65
66 localbus@fffe05000 {
67 #address-cells = <2>;
68 #size-cells = <1>;
69 compatible = "fsl,mpc8572-elbc", "fsl,elbc", "simple-bus";
70 reg = <0xf 0xffe05000 0 0x1000>;
71 interrupts = <19 2>;
72 interrupt-parent = <&mpic>;
73
74 ranges = <0x0 0x0 0xf 0xe8000000 0x08000000
75 0x1 0x0 0xf 0xe0000000 0x08000000
76 0x2 0x0 0xf 0xffa00000 0x00040000
77 0x3 0x0 0xf 0xffdf0000 0x00008000
78 0x4 0x0 0xf 0xffa40000 0x00040000
79 0x5 0x0 0xf 0xffa80000 0x00040000
80 0x6 0x0 0xf 0xffac0000 0x00040000>;
81
82 nor@0,0 {
83 #address-cells = <1>;
84 #size-cells = <1>;
85 compatible = "cfi-flash";
86 reg = <0x0 0x0 0x8000000>;
87 bank-width = <2>;
88 device-width = <1>;
89
90 ramdisk@0 {
91 reg = <0x0 0x03000000>;
92 read-only;
93 };
94
95 diagnostic@3000000 {
96 reg = <0x03000000 0x00e00000>;
97 read-only;
98 };
99
100 dink@3e00000 {
101 reg = <0x03e00000 0x00200000>;
102 read-only;
103 };
104
105 kernel@4000000 {
106 reg = <0x04000000 0x00400000>;
107 read-only;
108 };
109
110 jffs2@4400000 {
111 reg = <0x04400000 0x03b00000>;
112 };
113
114 dtb@7f00000 {
115 reg = <0x07f00000 0x00080000>;
116 read-only;
117 };
118
119 u-boot@7f80000 {
120 reg = <0x07f80000 0x00080000>;
121 read-only;
122 };
123 };
124
125 nand@2,0 {
126 #address-cells = <1>;
127 #size-cells = <1>;
128 compatible = "fsl,mpc8572-fcm-nand",
129 "fsl,elbc-fcm-nand";
130 reg = <0x2 0x0 0x40000>;
131
132 u-boot@0 {
133 reg = <0x0 0x02000000>;
134 read-only;
135 };
136
137 jffs2@2000000 {
138 reg = <0x02000000 0x10000000>;
139 };
140
141 ramdisk@12000000 {
142 reg = <0x12000000 0x08000000>;
143 read-only;
144 };
145
146 kernel@1a000000 {
147 reg = <0x1a000000 0x04000000>;
148 };
149
150 dtb@1e000000 {
151 reg = <0x1e000000 0x01000000>;
152 read-only;
153 };
154
155 empty@1f000000 {
156 reg = <0x1f000000 0x21000000>;
157 };
158 };
159
160 nand@4,0 {
161 compatible = "fsl,mpc8572-fcm-nand",
162 "fsl,elbc-fcm-nand";
163 reg = <0x4 0x0 0x40000>;
164 };
165
166 nand@5,0 {
167 compatible = "fsl,mpc8572-fcm-nand",
168 "fsl,elbc-fcm-nand";
169 reg = <0x5 0x0 0x40000>;
170 };
171
172 nand@6,0 {
173 compatible = "fsl,mpc8572-fcm-nand",
174 "fsl,elbc-fcm-nand";
175 reg = <0x6 0x0 0x40000>;
176 };
177 };
178
179 soc8572@fffe00000 {
180 #address-cells = <1>;
181 #size-cells = <1>;
182 device_type = "soc";
183 compatible = "simple-bus";
184 ranges = <0x0 0xf 0xffe00000 0x100000>;
185 reg = <0xf 0xffe00000 0 0x1000>; // CCSRBAR & soc regs, remove once parse code for immrbase fixed
186 bus-frequency = <0>; // Filled out by uboot.
187
188 memory-controller@2000 {
189 compatible = "fsl,mpc8572-memory-controller";
190 reg = <0x2000 0x1000>;
191 interrupt-parent = <&mpic>;
192 interrupts = <18 2>;
193 };
194
195 memory-controller@6000 {
196 compatible = "fsl,mpc8572-memory-controller";
197 reg = <0x6000 0x1000>;
198 interrupt-parent = <&mpic>;
199 interrupts = <18 2>;
200 };
201
202 L2: l2-cache-controller@20000 {
203 compatible = "fsl,mpc8572-l2-cache-controller";
204 reg = <0x20000 0x1000>;
205 cache-line-size = <32>; // 32 bytes
206 cache-size = <0x100000>; // L2, 1M
207 interrupt-parent = <&mpic>;
208 interrupts = <16 2>;
209 };
210
211 i2c@3000 {
212 #address-cells = <1>;
213 #size-cells = <0>;
214 cell-index = <0>;
215 compatible = "fsl-i2c";
216 reg = <0x3000 0x100>;
217 interrupts = <43 2>;
218 interrupt-parent = <&mpic>;
219 dfsrr;
220 };
221
222 i2c@3100 {
223 #address-cells = <1>;
224 #size-cells = <0>;
225 cell-index = <1>;
226 compatible = "fsl-i2c";
227 reg = <0x3100 0x100>;
228 interrupts = <43 2>;
229 interrupt-parent = <&mpic>;
230 dfsrr;
231 };
232
233 dma@c300 {
234 #address-cells = <1>;
235 #size-cells = <1>;
236 compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma";
237 reg = <0xc300 0x4>;
238 ranges = <0x0 0xc100 0x200>;
239 cell-index = <1>;
240 dma-channel@0 {
241 compatible = "fsl,mpc8572-dma-channel",
242 "fsl,eloplus-dma-channel";
243 reg = <0x0 0x80>;
244 cell-index = <0>;
245 interrupt-parent = <&mpic>;
246 interrupts = <76 2>;
247 };
248 dma-channel@80 {
249 compatible = "fsl,mpc8572-dma-channel",
250 "fsl,eloplus-dma-channel";
251 reg = <0x80 0x80>;
252 cell-index = <1>;
253 interrupt-parent = <&mpic>;
254 interrupts = <77 2>;
255 };
256 dma-channel@100 {
257 compatible = "fsl,mpc8572-dma-channel",
258 "fsl,eloplus-dma-channel";
259 reg = <0x100 0x80>;
260 cell-index = <2>;
261 interrupt-parent = <&mpic>;
262 interrupts = <78 2>;
263 };
264 dma-channel@180 {
265 compatible = "fsl,mpc8572-dma-channel",
266 "fsl,eloplus-dma-channel";
267 reg = <0x180 0x80>;
268 cell-index = <3>;
269 interrupt-parent = <&mpic>;
270 interrupts = <79 2>;
271 };
272 };
273
274 dma@21300 {
275 #address-cells = <1>;
276 #size-cells = <1>;
277 compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma";
278 reg = <0x21300 0x4>;
279 ranges = <0x0 0x21100 0x200>;
280 cell-index = <0>;
281 dma-channel@0 {
282 compatible = "fsl,mpc8572-dma-channel",
283 "fsl,eloplus-dma-channel";
284 reg = <0x0 0x80>;
285 cell-index = <0>;
286 interrupt-parent = <&mpic>;
287 interrupts = <20 2>;
288 };
289 dma-channel@80 {
290 compatible = "fsl,mpc8572-dma-channel",
291 "fsl,eloplus-dma-channel";
292 reg = <0x80 0x80>;
293 cell-index = <1>;
294 interrupt-parent = <&mpic>;
295 interrupts = <21 2>;
296 };
297 dma-channel@100 {
298 compatible = "fsl,mpc8572-dma-channel",
299 "fsl,eloplus-dma-channel";
300 reg = <0x100 0x80>;
301 cell-index = <2>;
302 interrupt-parent = <&mpic>;
303 interrupts = <22 2>;
304 };
305 dma-channel@180 {
306 compatible = "fsl,mpc8572-dma-channel",
307 "fsl,eloplus-dma-channel";
308 reg = <0x180 0x80>;
309 cell-index = <3>;
310 interrupt-parent = <&mpic>;
311 interrupts = <23 2>;
312 };
313 };
314
315 enet0: ethernet@24000 {
316 #address-cells = <1>;
317 #size-cells = <1>;
318 cell-index = <0>;
319 device_type = "network";
320 model = "eTSEC";
321 compatible = "gianfar";
322 reg = <0x24000 0x1000>;
323 ranges = <0x0 0x24000 0x1000>;
324 local-mac-address = [ 00 00 00 00 00 00 ];
325 interrupts = <29 2 30 2 34 2>;
326 interrupt-parent = <&mpic>;
327 tbi-handle = <&tbi0>;
328 phy-handle = <&phy0>;
329 phy-connection-type = "rgmii-id";
330
331 mdio@520 {
332 #address-cells = <1>;
333 #size-cells = <0>;
334 compatible = "fsl,gianfar-mdio";
335 reg = <0x520 0x20>;
336
337 phy0: ethernet-phy@0 {
338 interrupt-parent = <&mpic>;
339 interrupts = <10 1>;
340 reg = <0x0>;
341 };
342 phy1: ethernet-phy@1 {
343 interrupt-parent = <&mpic>;
344 interrupts = <10 1>;
345 reg = <0x1>;
346 };
347 phy2: ethernet-phy@2 {
348 interrupt-parent = <&mpic>;
349 interrupts = <10 1>;
350 reg = <0x2>;
351 };
352 phy3: ethernet-phy@3 {
353 interrupt-parent = <&mpic>;
354 interrupts = <10 1>;
355 reg = <0x3>;
356 };
357
358 tbi0: tbi-phy@11 {
359 reg = <0x11>;
360 device_type = "tbi-phy";
361 };
362 };
363 };
364
365 enet1: ethernet@25000 {
366 #address-cells = <1>;
367 #size-cells = <1>;
368 cell-index = <1>;
369 device_type = "network";
370 model = "eTSEC";
371 compatible = "gianfar";
372 reg = <0x25000 0x1000>;
373 ranges = <0x0 0x25000 0x1000>;
374 local-mac-address = [ 00 00 00 00 00 00 ];
375 interrupts = <35 2 36 2 40 2>;
376 interrupt-parent = <&mpic>;
377 tbi-handle = <&tbi1>;
378 phy-handle = <&phy1>;
379 phy-connection-type = "rgmii-id";
380
381 mdio@520 {
382 #address-cells = <1>;
383 #size-cells = <0>;
384 compatible = "fsl,gianfar-tbi";
385 reg = <0x520 0x20>;
386
387 tbi1: tbi-phy@11 {
388 reg = <0x11>;
389 device_type = "tbi-phy";
390 };
391 };
392 };
393
394 enet2: ethernet@26000 {
395 #address-cells = <1>;
396 #size-cells = <1>;
397 cell-index = <2>;
398 device_type = "network";
399 model = "eTSEC";
400 compatible = "gianfar";
401 reg = <0x26000 0x1000>;
402 ranges = <0x0 0x26000 0x1000>;
403 local-mac-address = [ 00 00 00 00 00 00 ];
404 interrupts = <31 2 32 2 33 2>;
405 interrupt-parent = <&mpic>;
406 tbi-handle = <&tbi2>;
407 phy-handle = <&phy2>;
408 phy-connection-type = "rgmii-id";
409
410 mdio@520 {
411 #address-cells = <1>;
412 #size-cells = <0>;
413 compatible = "fsl,gianfar-tbi";
414 reg = <0x520 0x20>;
415
416 tbi2: tbi-phy@11 {
417 reg = <0x11>;
418 device_type = "tbi-phy";
419 };
420 };
421 };
422
423 enet3: ethernet@27000 {
424 #address-cells = <1>;
425 #size-cells = <1>;
426 cell-index = <3>;
427 device_type = "network";
428 model = "eTSEC";
429 compatible = "gianfar";
430 reg = <0x27000 0x1000>;
431 ranges = <0x0 0x27000 0x1000>;
432 local-mac-address = [ 00 00 00 00 00 00 ];
433 interrupts = <37 2 38 2 39 2>;
434 interrupt-parent = <&mpic>;
435 tbi-handle = <&tbi3>;
436 phy-handle = <&phy3>;
437 phy-connection-type = "rgmii-id";
438
439 mdio@520 {
440 #address-cells = <1>;
441 #size-cells = <0>;
442 compatible = "fsl,gianfar-tbi";
443 reg = <0x520 0x20>;
444
445 tbi3: tbi-phy@11 {
446 reg = <0x11>;
447 device_type = "tbi-phy";
448 };
449 };
450 };
451
452 serial0: serial@4500 {
453 cell-index = <0>;
454 device_type = "serial";
455 compatible = "ns16550";
456 reg = <0x4500 0x100>;
457 clock-frequency = <0>;
458 interrupts = <42 2>;
459 interrupt-parent = <&mpic>;
460 };
461
462 serial1: serial@4600 {
463 cell-index = <1>;
464 device_type = "serial";
465 compatible = "ns16550";
466 reg = <0x4600 0x100>;
467 clock-frequency = <0>;
468 interrupts = <42 2>;
469 interrupt-parent = <&mpic>;
470 };
471
472 global-utilities@e0000 { //global utilities block
473 compatible = "fsl,mpc8572-guts";
474 reg = <0xe0000 0x1000>;
475 fsl,has-rstcr;
476 };
477
478 msi@41600 {
479 compatible = "fsl,mpc8572-msi", "fsl,mpic-msi";
480 reg = <0x41600 0x80>;
481 msi-available-ranges = <0 0x100>;
482 interrupts = <
483 0xe0 0
484 0xe1 0
485 0xe2 0
486 0xe3 0
487 0xe4 0
488 0xe5 0
489 0xe6 0
490 0xe7 0>;
491 interrupt-parent = <&mpic>;
492 };
493
494 crypto@30000 {
495 compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
496 "fsl,sec2.1", "fsl,sec2.0";
497 reg = <0x30000 0x10000>;
498 interrupts = <45 2 58 2>;
499 interrupt-parent = <&mpic>;
500 fsl,num-channels = <4>;
501 fsl,channel-fifo-len = <24>;
502 fsl,exec-units-mask = <0x9fe>;
503 fsl,descriptor-types-mask = <0x3ab0ebf>;
504 };
505
506 mpic: pic@40000 {
507 interrupt-controller;
508 #address-cells = <0>;
509 #interrupt-cells = <2>;
510 reg = <0x40000 0x40000>;
511 compatible = "chrp,open-pic";
512 device_type = "open-pic";
513 };
514 };
515
516 pci0: pcie@fffe08000 {
517 cell-index = <0>;
518 compatible = "fsl,mpc8548-pcie";
519 device_type = "pci";
520 #interrupt-cells = <1>;
521 #size-cells = <2>;
522 #address-cells = <3>;
523 reg = <0xf 0xffe08000 0 0x1000>;
524 bus-range = <0 255>;
525 ranges = <0x2000000 0x0 0xc0000000 0xc 0x00000000 0x0 0x20000000
526 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x00010000>;
527 clock-frequency = <33333333>;
528 interrupt-parent = <&mpic>;
529 interrupts = <24 2>;
530 interrupt-map-mask = <0xff00 0x0 0x0 0x7>;
531 interrupt-map = <
532 /* IDSEL 0x11 func 0 - PCI slot 1 */
533 0x8800 0x0 0x0 0x1 &mpic 0x2 0x1
534 0x8800 0x0 0x0 0x2 &mpic 0x3 0x1
535 0x8800 0x0 0x0 0x3 &mpic 0x4 0x1
536 0x8800 0x0 0x0 0x4 &mpic 0x1 0x1
537
538 /* IDSEL 0x11 func 1 - PCI slot 1 */
539 0x8900 0x0 0x0 0x1 &mpic 0x2 0x1
540 0x8900 0x0 0x0 0x2 &mpic 0x3 0x1
541 0x8900 0x0 0x0 0x3 &mpic 0x4 0x1
542 0x8900 0x0 0x0 0x4 &mpic 0x1 0x1
543
544 /* IDSEL 0x11 func 2 - PCI slot 1 */
545 0x8a00 0x0 0x0 0x1 &mpic 0x2 0x1
546 0x8a00 0x0 0x0 0x2 &mpic 0x3 0x1
547 0x8a00 0x0 0x0 0x3 &mpic 0x4 0x1
548 0x8a00 0x0 0x0 0x4 &mpic 0x1 0x1
549
550 /* IDSEL 0x11 func 3 - PCI slot 1 */
551 0x8b00 0x0 0x0 0x1 &mpic 0x2 0x1
552 0x8b00 0x0 0x0 0x2 &mpic 0x3 0x1
553 0x8b00 0x0 0x0 0x3 &mpic 0x4 0x1
554 0x8b00 0x0 0x0 0x4 &mpic 0x1 0x1
555
556 /* IDSEL 0x11 func 4 - PCI slot 1 */
557 0x8c00 0x0 0x0 0x1 &mpic 0x2 0x1
558 0x8c00 0x0 0x0 0x2 &mpic 0x3 0x1
559 0x8c00 0x0 0x0 0x3 &mpic 0x4 0x1
560 0x8c00 0x0 0x0 0x4 &mpic 0x1 0x1
561
562 /* IDSEL 0x11 func 5 - PCI slot 1 */
563 0x8d00 0x0 0x0 0x1 &mpic 0x2 0x1
564 0x8d00 0x0 0x0 0x2 &mpic 0x3 0x1
565 0x8d00 0x0 0x0 0x3 &mpic 0x4 0x1
566 0x8d00 0x0 0x0 0x4 &mpic 0x1 0x1
567
568 /* IDSEL 0x11 func 6 - PCI slot 1 */
569 0x8e00 0x0 0x0 0x1 &mpic 0x2 0x1
570 0x8e00 0x0 0x0 0x2 &mpic 0x3 0x1
571 0x8e00 0x0 0x0 0x3 &mpic 0x4 0x1
572 0x8e00 0x0 0x0 0x4 &mpic 0x1 0x1
573
574 /* IDSEL 0x11 func 7 - PCI slot 1 */
575 0x8f00 0x0 0x0 0x1 &mpic 0x2 0x1
576 0x8f00 0x0 0x0 0x2 &mpic 0x3 0x1
577 0x8f00 0x0 0x0 0x3 &mpic 0x4 0x1
578 0x8f00 0x0 0x0 0x4 &mpic 0x1 0x1
579
580 /* IDSEL 0x12 func 0 - PCI slot 2 */
581 0x9000 0x0 0x0 0x1 &mpic 0x3 0x1
582 0x9000 0x0 0x0 0x2 &mpic 0x4 0x1
583 0x9000 0x0 0x0 0x3 &mpic 0x1 0x1
584 0x9000 0x0 0x0 0x4 &mpic 0x2 0x1
585
586 /* IDSEL 0x12 func 1 - PCI slot 2 */
587 0x9100 0x0 0x0 0x1 &mpic 0x3 0x1
588 0x9100 0x0 0x0 0x2 &mpic 0x4 0x1
589 0x9100 0x0 0x0 0x3 &mpic 0x1 0x1
590 0x9100 0x0 0x0 0x4 &mpic 0x2 0x1
591
592 /* IDSEL 0x12 func 2 - PCI slot 2 */
593 0x9200 0x0 0x0 0x1 &mpic 0x3 0x1
594 0x9200 0x0 0x0 0x2 &mpic 0x4 0x1
595 0x9200 0x0 0x0 0x3 &mpic 0x1 0x1
596 0x9200 0x0 0x0 0x4 &mpic 0x2 0x1
597
598 /* IDSEL 0x12 func 3 - PCI slot 2 */
599 0x9300 0x0 0x0 0x1 &mpic 0x3 0x1
600 0x9300 0x0 0x0 0x2 &mpic 0x4 0x1
601 0x9300 0x0 0x0 0x3 &mpic 0x1 0x1
602 0x9300 0x0 0x0 0x4 &mpic 0x2 0x1
603
604 /* IDSEL 0x12 func 4 - PCI slot 2 */
605 0x9400 0x0 0x0 0x1 &mpic 0x3 0x1
606 0x9400 0x0 0x0 0x2 &mpic 0x4 0x1
607 0x9400 0x0 0x0 0x3 &mpic 0x1 0x1
608 0x9400 0x0 0x0 0x4 &mpic 0x2 0x1
609
610 /* IDSEL 0x12 func 5 - PCI slot 2 */
611 0x9500 0x0 0x0 0x1 &mpic 0x3 0x1
612 0x9500 0x0 0x0 0x2 &mpic 0x4 0x1
613 0x9500 0x0 0x0 0x3 &mpic 0x1 0x1
614 0x9500 0x0 0x0 0x4 &mpic 0x2 0x1
615
616 /* IDSEL 0x12 func 6 - PCI slot 2 */
617 0x9600 0x0 0x0 0x1 &mpic 0x3 0x1
618 0x9600 0x0 0x0 0x2 &mpic 0x4 0x1
619 0x9600 0x0 0x0 0x3 &mpic 0x1 0x1
620 0x9600 0x0 0x0 0x4 &mpic 0x2 0x1
621
622 /* IDSEL 0x12 func 7 - PCI slot 2 */
623 0x9700 0x0 0x0 0x1 &mpic 0x3 0x1
624 0x9700 0x0 0x0 0x2 &mpic 0x4 0x1
625 0x9700 0x0 0x0 0x3 &mpic 0x1 0x1
626 0x9700 0x0 0x0 0x4 &mpic 0x2 0x1
627
628 // IDSEL 0x1c USB
629 0xe000 0x0 0x0 0x1 &i8259 0xc 0x2
630 0xe100 0x0 0x0 0x2 &i8259 0x9 0x2
631 0xe200 0x0 0x0 0x3 &i8259 0xa 0x2
632 0xe300 0x0 0x0 0x4 &i8259 0xb 0x2
633
634 // IDSEL 0x1d Audio
635 0xe800 0x0 0x0 0x1 &i8259 0x6 0x2
636
637 // IDSEL 0x1e Legacy
638 0xf000 0x0 0x0 0x1 &i8259 0x7 0x2
639 0xf100 0x0 0x0 0x1 &i8259 0x7 0x2
640
641 // IDSEL 0x1f IDE/SATA
642 0xf800 0x0 0x0 0x1 &i8259 0xe 0x2
643 0xf900 0x0 0x0 0x1 &i8259 0x5 0x2
644
645 >;
646
647 pcie@0 {
648 reg = <0x0 0x0 0x0 0x0 0x0>;
649 #size-cells = <2>;
650 #address-cells = <3>;
651 device_type = "pci";
652 ranges = <0x2000000 0x0 0xc0000000
653 0x2000000 0x0 0xc0000000
654 0x0 0x20000000
655
656 0x1000000 0x0 0x0
657 0x1000000 0x0 0x0
658 0x0 0x10000>;
659 uli1575@0 {
660 reg = <0x0 0x0 0x0 0x0 0x0>;
661 #size-cells = <2>;
662 #address-cells = <3>;
663 ranges = <0x2000000 0x0 0xc0000000
664 0x2000000 0x0 0xc0000000
665 0x0 0x20000000
666
667 0x1000000 0x0 0x0
668 0x1000000 0x0 0x0
669 0x0 0x10000>;
670 isa@1e {
671 device_type = "isa";
672 #interrupt-cells = <2>;
673 #size-cells = <1>;
674 #address-cells = <2>;
675 reg = <0xf000 0x0 0x0 0x0 0x0>;
676 ranges = <0x1 0x0 0x1000000 0x0 0x0
677 0x1000>;
678 interrupt-parent = <&i8259>;
679
680 i8259: interrupt-controller@20 {
681 reg = <0x1 0x20 0x2
682 0x1 0xa0 0x2
683 0x1 0x4d0 0x2>;
684 interrupt-controller;
685 device_type = "interrupt-controller";
686 #address-cells = <0>;
687 #interrupt-cells = <2>;
688 compatible = "chrp,iic";
689 interrupts = <9 2>;
690 interrupt-parent = <&mpic>;
691 };
692
693 i8042@60 {
694 #size-cells = <0>;
695 #address-cells = <1>;
696 reg = <0x1 0x60 0x1 0x1 0x64 0x1>;
697 interrupts = <1 3 12 3>;
698 interrupt-parent =
699 <&i8259>;
700
701 keyboard@0 {
702 reg = <0x0>;
703 compatible = "pnpPNP,303";
704 };
705
706 mouse@1 {
707 reg = <0x1>;
708 compatible = "pnpPNP,f03";
709 };
710 };
711
712 rtc@70 {
713 compatible = "pnpPNP,b00";
714 reg = <0x1 0x70 0x2>;
715 };
716
717 gpio@400 {
718 reg = <0x1 0x400 0x80>;
719 };
720 };
721 };
722 };
723
724 };
725
726 pci1: pcie@fffe09000 {
727 cell-index = <1>;
728 compatible = "fsl,mpc8548-pcie";
729 device_type = "pci";
730 #interrupt-cells = <1>;
731 #size-cells = <2>;
732 #address-cells = <3>;
733 reg = <0xf 0xffe09000 0 0x1000>;
734 bus-range = <0 255>;
735 ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000
736 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x00010000>;
737 clock-frequency = <33333333>;
738 interrupt-parent = <&mpic>;
739 interrupts = <25 2>;
740 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
741 interrupt-map = <
742 /* IDSEL 0x0 */
743 0000 0x0 0x0 0x1 &mpic 0x4 0x1
744 0000 0x0 0x0 0x2 &mpic 0x5 0x1
745 0000 0x0 0x0 0x3 &mpic 0x6 0x1
746 0000 0x0 0x0 0x4 &mpic 0x7 0x1
747 >;
748 pcie@0 {
749 reg = <0x0 0x0 0x0 0x0 0x0>;
750 #size-cells = <2>;
751 #address-cells = <3>;
752 device_type = "pci";
753 ranges = <0x2000000 0x0 0xc0000000
754 0x2000000 0x0 0xc0000000
755 0x0 0x20000000
756
757 0x1000000 0x0 0x0
758 0x1000000 0x0 0x0
759 0x0 0x10000>;
760 };
761 };
762
763 pci2: pcie@fffe0a000 {
764 cell-index = <2>;
765 compatible = "fsl,mpc8548-pcie";
766 device_type = "pci";
767 #interrupt-cells = <1>;
768 #size-cells = <2>;
769 #address-cells = <3>;
770 reg = <0xf 0xffe0a000 0 0x1000>;
771 bus-range = <0 255>;
772 ranges = <0x2000000 0x0 0xc0000000 0xc 0x40000000 0x0 0x20000000
773 0x1000000 0x0 0x00000000 0xf 0xffc20000 0x0 0x00010000>;
774 clock-frequency = <33333333>;
775 interrupt-parent = <&mpic>;
776 interrupts = <26 2>;
777 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
778 interrupt-map = <
779 /* IDSEL 0x0 */
780 0000 0x0 0x0 0x1 &mpic 0x0 0x1
781 0000 0x0 0x0 0x2 &mpic 0x1 0x1
782 0000 0x0 0x0 0x3 &mpic 0x2 0x1
783 0000 0x0 0x0 0x4 &mpic 0x3 0x1
784 >;
785 pcie@0 {
786 reg = <0x0 0x0 0x0 0x0 0x0>;
787 #size-cells = <2>;
788 #address-cells = <3>;
789 device_type = "pci";
790 ranges = <0x2000000 0x0 0xc0000000
791 0x2000000 0x0 0xc0000000
792 0x0 0x20000000
793
794 0x1000000 0x0 0x0
795 0x1000000 0x0 0x0
796 0x0 0x10000>;
797 };
798 };
799};
diff --git a/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts b/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts
index fd462efa9e61..2bc0c7189653 100644
--- a/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts
@@ -6,7 +6,7 @@
6 * This dts file allows core0 to have memory, l2, i2c, dma1, global-util, eth0, 6 * This dts file allows core0 to have memory, l2, i2c, dma1, global-util, eth0,
7 * eth1, crypto, pci0, pci1. 7 * eth1, crypto, pci0, pci1.
8 * 8 *
9 * Copyright 2007, 2008 Freescale Semiconductor Inc. 9 * Copyright 2007-2009 Freescale Semiconductor Inc.
10 * 10 *
11 * This program is free software; you can redistribute it and/or modify it 11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the 12 * under the terms of the GNU General Public License as published by the
@@ -148,35 +148,38 @@
148 }; 148 };
149 }; 149 };
150 150
151 mdio@24520 {
152 #address-cells = <1>;
153 #size-cells = <0>;
154 compatible = "fsl,gianfar-mdio";
155 reg = <0x24520 0x20>;
156
157 phy0: ethernet-phy@0 {
158 interrupt-parent = <&mpic>;
159 interrupts = <10 1>;
160 reg = <0x0>;
161 };
162 phy1: ethernet-phy@1 {
163 interrupt-parent = <&mpic>;
164 interrupts = <10 1>;
165 reg = <0x1>;
166 };
167 };
168
169 enet0: ethernet@24000 { 151 enet0: ethernet@24000 {
152 #address-cells = <1>;
153 #size-cells = <1>;
170 cell-index = <0>; 154 cell-index = <0>;
171 device_type = "network"; 155 device_type = "network";
172 model = "eTSEC"; 156 model = "eTSEC";
173 compatible = "gianfar"; 157 compatible = "gianfar";
174 reg = <0x24000 0x1000>; 158 reg = <0x24000 0x1000>;
159 ranges = <0x0 0x24000 0x1000>;
175 local-mac-address = [ 00 00 00 00 00 00 ]; 160 local-mac-address = [ 00 00 00 00 00 00 ];
176 interrupts = <29 2 30 2 34 2>; 161 interrupts = <29 2 30 2 34 2>;
177 interrupt-parent = <&mpic>; 162 interrupt-parent = <&mpic>;
178 phy-handle = <&phy0>; 163 phy-handle = <&phy0>;
179 phy-connection-type = "rgmii-id"; 164 phy-connection-type = "rgmii-id";
165
166 mdio@520 {
167 #address-cells = <1>;
168 #size-cells = <0>;
169 compatible = "fsl,gianfar-mdio";
170 reg = <0x520 0x20>;
171
172 phy0: ethernet-phy@0 {
173 interrupt-parent = <&mpic>;
174 interrupts = <10 1>;
175 reg = <0x0>;
176 };
177 phy1: ethernet-phy@1 {
178 interrupt-parent = <&mpic>;
179 interrupts = <10 1>;
180 reg = <0x1>;
181 };
182 };
180 }; 183 };
181 184
182 enet1: ethernet@25000 { 185 enet1: ethernet@25000 {
@@ -227,7 +230,7 @@
227 device_type = "open-pic"; 230 device_type = "open-pic";
228 protected-sources = < 231 protected-sources = <
229 31 32 33 37 38 39 /* enet2 enet3 */ 232 31 32 33 37 38 39 /* enet2 enet3 */
230 76 77 78 79 27 42 /* dma2 pci2 serial*/ 233 76 77 78 79 26 42 /* dma2 pci2 serial*/
231 0xe0 0xe1 0xe2 0xe3 /* msi */ 234 0xe0 0xe1 0xe2 0xe3 /* msi */
232 0xe4 0xe5 0xe6 0xe7 235 0xe4 0xe5 0xe6 0xe7
233 >; 236 >;
@@ -376,7 +379,7 @@
376 379
377 0x1000000 0x0 0x0 380 0x1000000 0x0 0x0
378 0x1000000 0x0 0x0 381 0x1000000 0x0 0x0
379 0x0 0x100000>; 382 0x0 0x10000>;
380 uli1575@0 { 383 uli1575@0 {
381 reg = <0x0 0x0 0x0 0x0 0x0>; 384 reg = <0x0 0x0 0x0 0x0 0x0>;
382 #size-cells = <2>; 385 #size-cells = <2>;
@@ -387,7 +390,7 @@
387 390
388 0x1000000 0x0 0x0 391 0x1000000 0x0 0x0
389 0x1000000 0x0 0x0 392 0x1000000 0x0 0x0
390 0x0 0x100000>; 393 0x0 0x10000>;
391 isa@1e { 394 isa@1e {
392 device_type = "isa"; 395 device_type = "isa";
393 #interrupt-cells = <2>; 396 #interrupt-cells = <2>;
@@ -477,7 +480,7 @@
477 480
478 0x1000000 0x0 0x0 481 0x1000000 0x0 0x0
479 0x1000000 0x0 0x0 482 0x1000000 0x0 0x0
480 0x0 0x100000>; 483 0x0 0x10000>;
481 }; 484 };
482 }; 485 };
483}; 486};
diff --git a/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts b/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts
index e35230f2ac93..159cb3a875f0 100644
--- a/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts
@@ -7,7 +7,7 @@
7 * 7 *
8 * Please note to add "-b 1" for core1's dts compiling. 8 * Please note to add "-b 1" for core1's dts compiling.
9 * 9 *
10 * Copyright 2007, 2008 Freescale Semiconductor Inc. 10 * Copyright 2007-2009 Freescale Semiconductor Inc.
11 * 11 *
12 * This program is free software; you can redistribute it and/or modify it 12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the 13 * under the terms of the GNU General Public License as published by the
@@ -186,7 +186,7 @@
186 protected-sources = < 186 protected-sources = <
187 18 16 10 42 45 58 /* MEM L2 mdio serial crypto */ 187 18 16 10 42 45 58 /* MEM L2 mdio serial crypto */
188 29 30 34 35 36 40 /* enet0 enet1 */ 188 29 30 34 35 36 40 /* enet0 enet1 */
189 24 26 20 21 22 23 /* pcie0 pcie1 dma1 */ 189 24 25 20 21 22 23 /* pci0 pci1 dma1 */
190 43 /* i2c */ 190 43 /* i2c */
191 0x1 0x2 0x3 0x4 /* pci slot */ 191 0x1 0x2 0x3 0x4 /* pci slot */
192 0x9 0xa 0xb 0xc /* usb */ 192 0x9 0xa 0xb 0xc /* usb */
@@ -228,7 +228,7 @@
228 228
229 0x1000000 0x0 0x0 229 0x1000000 0x0 0x0
230 0x1000000 0x0 0x0 230 0x1000000 0x0 0x0
231 0x0 0x100000>; 231 0x0 0x10000>;
232 }; 232 };
233 }; 233 };
234}; 234};
diff --git a/arch/powerpc/boot/dts/mpc8610_hpcd.dts b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
index f724d72c7b92..1bd3ebe11437 100644
--- a/arch/powerpc/boot/dts/mpc8610_hpcd.dts
+++ b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
@@ -217,6 +217,7 @@
217 codec-handle = <&cs4270>; 217 codec-handle = <&cs4270>;
218 fsl,playback-dma = <&dma00>; 218 fsl,playback-dma = <&dma00>;
219 fsl,capture-dma = <&dma01>; 219 fsl,capture-dma = <&dma01>;
220 fsl,fifo-depth = <8>;
220 }; 221 };
221 222
222 ssi@16100 { 223 ssi@16100 {
@@ -225,6 +226,7 @@
225 reg = <0x16100 0x100>; 226 reg = <0x16100 0x100>;
226 interrupt-parent = <&mpic>; 227 interrupt-parent = <&mpic>;
227 interrupts = <63 2>; 228 interrupts = <63 2>;
229 fsl,fifo-depth = <8>;
228 }; 230 };
229 231
230 dma@21300 { 232 dma@21300 {
diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn.dts b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
index 4481532cbe77..d72beb192460 100644
--- a/arch/powerpc/boot/dts/mpc8641_hpcn.dts
+++ b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
@@ -180,133 +180,144 @@
180 }; 180 };
181 }; 181 };
182 182
183 mdio@24520 {
184 #address-cells = <1>;
185 #size-cells = <0>;
186 compatible = "fsl,gianfar-mdio";
187 reg = <0x24520 0x20>;
188
189 phy0: ethernet-phy@0 {
190 interrupt-parent = <&mpic>;
191 interrupts = <10 1>;
192 reg = <0>;
193 device_type = "ethernet-phy";
194 };
195 phy1: ethernet-phy@1 {
196 interrupt-parent = <&mpic>;
197 interrupts = <10 1>;
198 reg = <1>;
199 device_type = "ethernet-phy";
200 };
201 phy2: ethernet-phy@2 {
202 interrupt-parent = <&mpic>;
203 interrupts = <10 1>;
204 reg = <2>;
205 device_type = "ethernet-phy";
206 };
207 phy3: ethernet-phy@3 {
208 interrupt-parent = <&mpic>;
209 interrupts = <10 1>;
210 reg = <3>;
211 device_type = "ethernet-phy";
212 };
213 tbi0: tbi-phy@11 {
214 reg = <0x11>;
215 device_type = "tbi-phy";
216 };
217 };
218
219 mdio@25520 {
220 #address-cells = <1>;
221 #size-cells = <0>;
222 compatible = "fsl,gianfar-tbi";
223 reg = <0x25520 0x20>;
224
225 tbi1: tbi-phy@11 {
226 reg = <0x11>;
227 device_type = "tbi-phy";
228 };
229 };
230
231 mdio@26520 {
232 #address-cells = <1>;
233 #size-cells = <0>;
234 compatible = "fsl,gianfar-tbi";
235 reg = <0x26520 0x20>;
236
237 tbi2: tbi-phy@11 {
238 reg = <0x11>;
239 device_type = "tbi-phy";
240 };
241 };
242
243 mdio@27520 {
244 #address-cells = <1>;
245 #size-cells = <0>;
246 compatible = "fsl,gianfar-tbi";
247 reg = <0x27520 0x20>;
248
249 tbi3: tbi-phy@11 {
250 reg = <0x11>;
251 device_type = "tbi-phy";
252 };
253 };
254
255
256 enet0: ethernet@24000 { 183 enet0: ethernet@24000 {
184 #address-cells = <1>;
185 #size-cells = <1>;
257 cell-index = <0>; 186 cell-index = <0>;
258 device_type = "network"; 187 device_type = "network";
259 model = "TSEC"; 188 model = "TSEC";
260 compatible = "gianfar"; 189 compatible = "gianfar";
261 reg = <0x24000 0x1000>; 190 reg = <0x24000 0x1000>;
191 ranges = <0x0 0x24000 0x1000>;
262 local-mac-address = [ 00 00 00 00 00 00 ]; 192 local-mac-address = [ 00 00 00 00 00 00 ];
263 interrupts = <29 2 30 2 34 2>; 193 interrupts = <29 2 30 2 34 2>;
264 interrupt-parent = <&mpic>; 194 interrupt-parent = <&mpic>;
265 tbi-handle = <&tbi0>; 195 tbi-handle = <&tbi0>;
266 phy-handle = <&phy0>; 196 phy-handle = <&phy0>;
267 phy-connection-type = "rgmii-id"; 197 phy-connection-type = "rgmii-id";
198
199 mdio@520 {
200 #address-cells = <1>;
201 #size-cells = <0>;
202 compatible = "fsl,gianfar-mdio";
203 reg = <0x520 0x20>;
204
205 phy0: ethernet-phy@0 {
206 interrupt-parent = <&mpic>;
207 interrupts = <10 1>;
208 reg = <0>;
209 device_type = "ethernet-phy";
210 };
211 phy1: ethernet-phy@1 {
212 interrupt-parent = <&mpic>;
213 interrupts = <10 1>;
214 reg = <1>;
215 device_type = "ethernet-phy";
216 };
217 phy2: ethernet-phy@2 {
218 interrupt-parent = <&mpic>;
219 interrupts = <10 1>;
220 reg = <2>;
221 device_type = "ethernet-phy";
222 };
223 phy3: ethernet-phy@3 {
224 interrupt-parent = <&mpic>;
225 interrupts = <10 1>;
226 reg = <3>;
227 device_type = "ethernet-phy";
228 };
229 tbi0: tbi-phy@11 {
230 reg = <0x11>;
231 device_type = "tbi-phy";
232 };
233 };
268 }; 234 };
269 235
270 enet1: ethernet@25000 { 236 enet1: ethernet@25000 {
237 #address-cells = <1>;
238 #size-cells = <1>;
271 cell-index = <1>; 239 cell-index = <1>;
272 device_type = "network"; 240 device_type = "network";
273 model = "TSEC"; 241 model = "TSEC";
274 compatible = "gianfar"; 242 compatible = "gianfar";
275 reg = <0x25000 0x1000>; 243 reg = <0x25000 0x1000>;
244 ranges = <0x0 0x25000 0x1000>;
276 local-mac-address = [ 00 00 00 00 00 00 ]; 245 local-mac-address = [ 00 00 00 00 00 00 ];
277 interrupts = <35 2 36 2 40 2>; 246 interrupts = <35 2 36 2 40 2>;
278 interrupt-parent = <&mpic>; 247 interrupt-parent = <&mpic>;
279 tbi-handle = <&tbi1>; 248 tbi-handle = <&tbi1>;
280 phy-handle = <&phy1>; 249 phy-handle = <&phy1>;
281 phy-connection-type = "rgmii-id"; 250 phy-connection-type = "rgmii-id";
251
252 mdio@520 {
253 #address-cells = <1>;
254 #size-cells = <0>;
255 compatible = "fsl,gianfar-tbi";
256 reg = <0x520 0x20>;
257
258 tbi1: tbi-phy@11 {
259 reg = <0x11>;
260 device_type = "tbi-phy";
261 };
262 };
282 }; 263 };
283 264
284 enet2: ethernet@26000 { 265 enet2: ethernet@26000 {
266 #address-cells = <1>;
267 #size-cells = <1>;
285 cell-index = <2>; 268 cell-index = <2>;
286 device_type = "network"; 269 device_type = "network";
287 model = "TSEC"; 270 model = "TSEC";
288 compatible = "gianfar"; 271 compatible = "gianfar";
289 reg = <0x26000 0x1000>; 272 reg = <0x26000 0x1000>;
273 ranges = <0x0 0x26000 0x1000>;
290 local-mac-address = [ 00 00 00 00 00 00 ]; 274 local-mac-address = [ 00 00 00 00 00 00 ];
291 interrupts = <31 2 32 2 33 2>; 275 interrupts = <31 2 32 2 33 2>;
292 interrupt-parent = <&mpic>; 276 interrupt-parent = <&mpic>;
293 tbi-handle = <&tbi2>; 277 tbi-handle = <&tbi2>;
294 phy-handle = <&phy2>; 278 phy-handle = <&phy2>;
295 phy-connection-type = "rgmii-id"; 279 phy-connection-type = "rgmii-id";
280
281 mdio@520 {
282 #address-cells = <1>;
283 #size-cells = <0>;
284 compatible = "fsl,gianfar-tbi";
285 reg = <0x520 0x20>;
286
287 tbi2: tbi-phy@11 {
288 reg = <0x11>;
289 device_type = "tbi-phy";
290 };
291 };
296 }; 292 };
297 293
298 enet3: ethernet@27000 { 294 enet3: ethernet@27000 {
295 #address-cells = <1>;
296 #size-cells = <1>;
299 cell-index = <3>; 297 cell-index = <3>;
300 device_type = "network"; 298 device_type = "network";
301 model = "TSEC"; 299 model = "TSEC";
302 compatible = "gianfar"; 300 compatible = "gianfar";
303 reg = <0x27000 0x1000>; 301 reg = <0x27000 0x1000>;
302 ranges = <0x0 0x27000 0x1000>;
304 local-mac-address = [ 00 00 00 00 00 00 ]; 303 local-mac-address = [ 00 00 00 00 00 00 ];
305 interrupts = <37 2 38 2 39 2>; 304 interrupts = <37 2 38 2 39 2>;
306 interrupt-parent = <&mpic>; 305 interrupt-parent = <&mpic>;
307 tbi-handle = <&tbi3>; 306 tbi-handle = <&tbi3>;
308 phy-handle = <&phy3>; 307 phy-handle = <&phy3>;
309 phy-connection-type = "rgmii-id"; 308 phy-connection-type = "rgmii-id";
309
310 mdio@520 {
311 #address-cells = <1>;
312 #size-cells = <0>;
313 compatible = "fsl,gianfar-tbi";
314 reg = <0x520 0x20>;
315
316 tbi3: tbi-phy@11 {
317 reg = <0x11>;
318 device_type = "tbi-phy";
319 };
320 };
310 }; 321 };
311 322
312 serial0: serial@4500 { 323 serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/pcm030.dts b/arch/powerpc/boot/dts/pcm030.dts
index be2c11ca0594..895834713894 100644
--- a/arch/powerpc/boot/dts/pcm030.dts
+++ b/arch/powerpc/boot/dts/pcm030.dts
@@ -19,6 +19,7 @@
19 compatible = "phytec,pcm030"; 19 compatible = "phytec,pcm030";
20 #address-cells = <1>; 20 #address-cells = <1>;
21 #size-cells = <1>; 21 #size-cells = <1>;
22 interrupt-parent = <&mpc5200_pic>;
22 23
23 cpus { 24 cpus {
24 #address-cells = <1>; 25 #address-cells = <1>;
@@ -29,26 +30,26 @@
29 reg = <0>; 30 reg = <0>;
30 d-cache-line-size = <32>; 31 d-cache-line-size = <32>;
31 i-cache-line-size = <32>; 32 i-cache-line-size = <32>;
32 d-cache-size = <0x4000>; /* L1, 16K */ 33 d-cache-size = <0x4000>; // L1, 16K
33 i-cache-size = <0x4000>; /* L1, 16K */ 34 i-cache-size = <0x4000>; // L1, 16K
34 timebase-frequency = <0>; /* From Bootloader */ 35 timebase-frequency = <0>; // from bootloader
35 bus-frequency = <0>; /* From Bootloader */ 36 bus-frequency = <0>; // from bootloader
36 clock-frequency = <0>; /* From Bootloader */ 37 clock-frequency = <0>; // from bootloader
37 }; 38 };
38 }; 39 };
39 40
40 memory { 41 memory {
41 device_type = "memory"; 42 device_type = "memory";
42 reg = <0x00000000 0x04000000>; /* 64MB */ 43 reg = <0x00000000 0x04000000>; // 64MB
43 }; 44 };
44 45
45 soc5200@f0000000 { 46 soc5200@f0000000 {
46 #address-cells = <1>; 47 #address-cells = <1>;
47 #size-cells = <1>; 48 #size-cells = <1>;
48 compatible = "fsl,mpc5200b-immr"; 49 compatible = "fsl,mpc5200b-immr";
49 ranges = <0x0 0xf0000000 0x0000c000>; 50 ranges = <0 0xf0000000 0x0000c000>;
50 bus-frequency = <0>; /* From bootloader */ 51 bus-frequency = <0>; // from bootloader
51 system-frequency = <0>; /* From bootloader */ 52 system-frequency = <0>; // from bootloader
52 53
53 cdm@200 { 54 cdm@200 {
54 compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm"; 55 compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
@@ -56,87 +57,70 @@
56 }; 57 };
57 58
58 mpc5200_pic: interrupt-controller@500 { 59 mpc5200_pic: interrupt-controller@500 {
59 /* 5200 interrupts are encoded into two levels; */ 60 // 5200 interrupts are encoded into two levels;
60 interrupt-controller; 61 interrupt-controller;
61 #interrupt-cells = <3>; 62 #interrupt-cells = <3>;
62 device_type = "interrupt-controller";
63 compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic"; 63 compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
64 reg = <0x500 0x80>; 64 reg = <0x500 0x80>;
65 }; 65 };
66 66
67 timer@600 { /* General Purpose Timer */ 67 timer@600 { // General Purpose Timer
68 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 68 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
69 cell-index = <0>;
70 reg = <0x600 0x10>; 69 reg = <0x600 0x10>;
71 interrupts = <0x1 0x9 0x0>; 70 interrupts = <1 9 0>;
72 interrupt-parent = <&mpc5200_pic>;
73 fsl,has-wdt; 71 fsl,has-wdt;
74 }; 72 };
75 73
76 timer@610 { /* General Purpose Timer */ 74 timer@610 { // General Purpose Timer
77 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 75 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
78 cell-index = <1>;
79 reg = <0x610 0x10>; 76 reg = <0x610 0x10>;
80 interrupts = <0x1 0xa 0x0>; 77 interrupts = <1 10 0>;
81 interrupt-parent = <&mpc5200_pic>;
82 }; 78 };
83 79
84 gpt2: timer@620 { /* General Purpose Timer in GPIO mode */ 80 gpt2: timer@620 { // General Purpose Timer in GPIO mode
85 compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio"; 81 compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
86 cell-index = <2>;
87 reg = <0x620 0x10>; 82 reg = <0x620 0x10>;
88 interrupts = <0x1 0xb 0x0>; 83 interrupts = <1 11 0>;
89 interrupt-parent = <&mpc5200_pic>;
90 gpio-controller; 84 gpio-controller;
91 #gpio-cells = <2>; 85 #gpio-cells = <2>;
92 }; 86 };
93 87
94 gpt3: timer@630 { /* General Purpose Timer in GPIO mode */ 88 gpt3: timer@630 { // General Purpose Timer in GPIO mode
95 compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio"; 89 compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
96 cell-index = <3>;
97 reg = <0x630 0x10>; 90 reg = <0x630 0x10>;
98 interrupts = <0x1 0xc 0x0>; 91 interrupts = <1 12 0>;
99 interrupt-parent = <&mpc5200_pic>;
100 gpio-controller; 92 gpio-controller;
101 #gpio-cells = <2>; 93 #gpio-cells = <2>;
102 }; 94 };
103 95
104 gpt4: timer@640 { /* General Purpose Timer in GPIO mode */ 96 gpt4: timer@640 { // General Purpose Timer in GPIO mode
105 compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio"; 97 compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
106 cell-index = <4>;
107 reg = <0x640 0x10>; 98 reg = <0x640 0x10>;
108 interrupts = <0x1 0xd 0x0>; 99 interrupts = <1 13 0>;
109 interrupt-parent = <&mpc5200_pic>;
110 gpio-controller; 100 gpio-controller;
111 #gpio-cells = <2>; 101 #gpio-cells = <2>;
112 }; 102 };
113 103
114 gpt5: timer@650 { /* General Purpose Timer in GPIO mode */ 104 gpt5: timer@650 { // General Purpose Timer in GPIO mode
115 compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio"; 105 compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
116 cell-index = <5>;
117 reg = <0x650 0x10>; 106 reg = <0x650 0x10>;
118 interrupts = <0x1 0xe 0x0>; 107 interrupts = <1 14 0>;
119 interrupt-parent = <&mpc5200_pic>;
120 gpio-controller; 108 gpio-controller;
121 #gpio-cells = <2>; 109 #gpio-cells = <2>;
122 }; 110 };
123 111
124 gpt6: timer@660 { /* General Purpose Timer in GPIO mode */ 112 gpt6: timer@660 { // General Purpose Timer in GPIO mode
125 compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio"; 113 compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
126 cell-index = <6>;
127 reg = <0x660 0x10>; 114 reg = <0x660 0x10>;
128 interrupts = <0x1 0xf 0x0>; 115 interrupts = <1 15 0>;
129 interrupt-parent = <&mpc5200_pic>;
130 gpio-controller; 116 gpio-controller;
131 #gpio-cells = <2>; 117 #gpio-cells = <2>;
132 }; 118 };
133 119
134 gpt7: timer@670 { /* General Purpose Timer in GPIO mode */ 120 gpt7: timer@670 { // General Purpose Timer in GPIO mode
135 compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio"; 121 compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
136 cell-index = <7>;
137 reg = <0x670 0x10>; 122 reg = <0x670 0x10>;
138 interrupts = <0x1 0x10 0x0>; 123 interrupts = <1 16 0>;
139 interrupt-parent = <&mpc5200_pic>;
140 gpio-controller; 124 gpio-controller;
141 #gpio-cells = <2>; 125 #gpio-cells = <2>;
142 }; 126 };
@@ -144,40 +128,33 @@
144 rtc@800 { // Real time clock 128 rtc@800 { // Real time clock
145 compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc"; 129 compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
146 reg = <0x800 0x100>; 130 reg = <0x800 0x100>;
147 interrupts = <0x1 0x5 0x0 0x1 0x6 0x0>; 131 interrupts = <1 5 0 1 6 0>;
148 interrupt-parent = <&mpc5200_pic>;
149 }; 132 };
150 133
151 can@900 { 134 can@900 {
152 compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan"; 135 compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
153 cell-index = <0>; 136 interrupts = <2 17 0>;
154 interrupts = <0x2 0x11 0x0>;
155 interrupt-parent = <&mpc5200_pic>;
156 reg = <0x900 0x80>; 137 reg = <0x900 0x80>;
157 }; 138 };
158 139
159 can@980 { 140 can@980 {
160 compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan"; 141 compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
161 cell-index = <1>; 142 interrupts = <2 18 0>;
162 interrupts = <0x2 0x12 0x0>;
163 interrupt-parent = <&mpc5200_pic>;
164 reg = <0x980 0x80>; 143 reg = <0x980 0x80>;
165 }; 144 };
166 145
167 gpio_simple: gpio@b00 { 146 gpio_simple: gpio@b00 {
168 compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio"; 147 compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
169 reg = <0xb00 0x40>; 148 reg = <0xb00 0x40>;
170 interrupts = <0x1 0x7 0x0>; 149 interrupts = <1 7 0>;
171 interrupt-parent = <&mpc5200_pic>;
172 gpio-controller; 150 gpio-controller;
173 #gpio-cells = <2>; 151 #gpio-cells = <2>;
174 }; 152 };
175 153
176 gpio_wkup: gpio-wkup@c00 { 154 gpio_wkup: gpio@c00 {
177 compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup"; 155 compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
178 reg = <0xc00 0x40>; 156 reg = <0xc00 0x40>;
179 interrupts = <0x1 0x8 0x0 0x0 0x3 0x0>; 157 interrupts = <1 8 0 0 3 0>;
180 interrupt-parent = <&mpc5200_pic>;
181 gpio-controller; 158 gpio-controller;
182 #gpio-cells = <2>; 159 #gpio-cells = <2>;
183 }; 160 };
@@ -185,26 +162,22 @@
185 spi@f00 { 162 spi@f00 {
186 compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi"; 163 compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
187 reg = <0xf00 0x20>; 164 reg = <0xf00 0x20>;
188 interrupts = <0x2 0xd 0x0 0x2 0xe 0x0>; 165 interrupts = <2 13 0 2 14 0>;
189 interrupt-parent = <&mpc5200_pic>;
190 }; 166 };
191 167
192 usb@1000 { 168 usb@1000 {
193 compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be"; 169 compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
194 reg = <0x1000 0xff>; 170 reg = <0x1000 0xff>;
195 interrupts = <0x2 0x6 0x0>; 171 interrupts = <2 6 0>;
196 interrupt-parent = <&mpc5200_pic>;
197 }; 172 };
198 173
199 dma-controller@1200 { 174 dma-controller@1200 {
200 device_type = "dma-controller";
201 compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm"; 175 compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
202 reg = <0x1200 0x80>; 176 reg = <0x1200 0x80>;
203 interrupts = <0x3 0x0 0x0 0x3 0x1 0x0 0x3 0x2 0x0 0x3 0x3 0x0 177 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
204 0x3 0x4 0x0 0x3 0x5 0x0 0x3 0x6 0x0 0x3 0x7 0x0 178 3 4 0 3 5 0 3 6 0 3 7 0
205 0x3 0x8 0x0 0x3 0x9 0x0 0x3 0xa 0x0 0x3 0xb 0x0 179 3 8 0 3 9 0 3 10 0 3 11 0
206 0x3 0xc 0x0 0x3 0xd 0x0 0x3 0xe 0x0 0x3 0xf 0x0>; 180 3 12 0 3 13 0 3 14 0 3 15 0>;
207 interrupt-parent = <&mpc5200_pic>;
208 }; 181 };
209 182
210 xlb@1f00 { 183 xlb@1f00 {
@@ -213,24 +186,19 @@
213 }; 186 };
214 187
215 ac97@2000 { /* PSC1 in ac97 mode */ 188 ac97@2000 { /* PSC1 in ac97 mode */
216 device_type = "sound";
217 compatible = "mpc5200b-psc-ac97","fsl,mpc5200b-psc-ac97"; 189 compatible = "mpc5200b-psc-ac97","fsl,mpc5200b-psc-ac97";
218 cell-index = <0>; 190 cell-index = <0>;
219 reg = <0x2000 0x100>; 191 reg = <0x2000 0x100>;
220 interrupts = <0x2 0x2 0x0>; 192 interrupts = <2 1 0>;
221 interrupt-parent = <&mpc5200_pic>;
222 }; 193 };
223 194
224 /* PSC2 port is used by CAN1/2 */ 195 /* PSC2 port is used by CAN1/2 */
225 196
226 serial@2400 { /* PSC3 in UART mode */ 197 serial@2400 { /* PSC3 in UART mode */
227 device_type = "serial";
228 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; 198 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
229 port-number = <0>;
230 cell-index = <2>; 199 cell-index = <2>;
231 reg = <0x2400 0x100>; 200 reg = <0x2400 0x100>;
232 interrupts = <0x2 0x3 0x0>; 201 interrupts = <2 3 0>;
233 interrupt-parent = <&mpc5200_pic>;
234 }; 202 };
235 203
236 /* PSC4 is ??? */ 204 /* PSC4 is ??? */
@@ -238,55 +206,44 @@
238 /* PSC5 is ??? */ 206 /* PSC5 is ??? */
239 207
240 serial@2c00 { /* PSC6 in UART mode */ 208 serial@2c00 { /* PSC6 in UART mode */
241 device_type = "serial";
242 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; 209 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
243 port-number = <1>;
244 cell-index = <5>; 210 cell-index = <5>;
245 reg = <0x2c00 0x100>; 211 reg = <0x2c00 0x100>;
246 interrupts = <0x2 0x4 0x0>; 212 interrupts = <2 4 0>;
247 interrupt-parent = <&mpc5200_pic>;
248 }; 213 };
249 214
250 ethernet@3000 { 215 ethernet@3000 {
251 device_type = "network";
252 compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec"; 216 compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
253 reg = <0x3000 0x400>; 217 reg = <0x3000 0x400>;
254 local-mac-address = [00 00 00 00 00 00]; 218 local-mac-address = [ 00 00 00 00 00 00 ];
255 interrupts = <0x2 0x5 0x0>; 219 interrupts = <2 5 0>;
256 interrupt-parent = <&mpc5200_pic>;
257 phy-handle = <&phy0>; 220 phy-handle = <&phy0>;
258 }; 221 };
259 222
260 mdio@3000 { 223 mdio@3000 {
261 #address-cells = <1>; 224 #address-cells = <1>;
262 #size-cells = <0>; 225 #size-cells = <0>;
263 compatible = "fsl,mpc5200b-mdio", "fsl,mpc5200-mdio"; 226 compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
264 reg = <0x3000 0x400>; /* fec range, since we need to setup fec interrupts */ 227 reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
265 interrupts = <0x2 0x5 0x0>; /* these are for "mii command finished", not link changes & co. */ 228 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
266 interrupt-parent = <&mpc5200_pic>; 229
267 230 phy0: ethernet-phy@0 {
268 phy0:ethernet-phy@0 { 231 reg = <0>;
269 device_type = "ethernet-phy";
270 reg = <0x0>;
271 }; 232 };
272 }; 233 };
273 234
274 ata@3a00 { 235 ata@3a00 {
275 device_type = "ata";
276 compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata"; 236 compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
277 reg = <0x3a00 0x100>; 237 reg = <0x3a00 0x100>;
278 interrupts = <0x2 0x7 0x0>; 238 interrupts = <2 7 0>;
279 interrupt-parent = <&mpc5200_pic>;
280 }; 239 };
281 240
282 i2c@3d00 { 241 i2c@3d00 {
283 #address-cells = <1>; 242 #address-cells = <1>;
284 #size-cells = <0>; 243 #size-cells = <0>;
285 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; 244 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
286 cell-index = <0>;
287 reg = <0x3d00 0x40>; 245 reg = <0x3d00 0x40>;
288 interrupts = <0x2 0xf 0x0>; 246 interrupts = <2 15 0>;
289 interrupt-parent = <&mpc5200_pic>;
290 fsl5200-clocking; 247 fsl5200-clocking;
291 }; 248 };
292 249
@@ -294,10 +251,8 @@
294 #address-cells = <1>; 251 #address-cells = <1>;
295 #size-cells = <0>; 252 #size-cells = <0>;
296 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; 253 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
297 cell-index = <1>;
298 reg = <0x3d40 0x40>; 254 reg = <0x3d40 0x40>;
299 interrupts = <0x2 0x10 0x0>; 255 interrupts = <2 16 0>;
300 interrupt-parent = <&mpc5200_pic>;
301 fsl5200-clocking; 256 fsl5200-clocking;
302 rtc@51 { 257 rtc@51 {
303 compatible = "nxp,pcf8563"; 258 compatible = "nxp,pcf8563";
@@ -307,7 +262,7 @@
307 }; 262 };
308 263
309 sram@8000 { 264 sram@8000 {
310 compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram","sram"; 265 compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
311 reg = <0x8000 0x4000>; 266 reg = <0x8000 0x4000>;
312 }; 267 };
313 268
@@ -340,22 +295,21 @@
340 device_type = "pci"; 295 device_type = "pci";
341 compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci"; 296 compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci";
342 reg = <0xf0000d00 0x100>; 297 reg = <0xf0000d00 0x100>;
343 interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 298 interrupt-map-mask = <0xf800 0 0 7>;
344 interrupt-map = <0xc000 0x0 0x0 0x1 &mpc5200_pic 0x0 0x0 0x3 /* 1st slot */ 299 interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
345 0xc000 0x0 0x0 0x2 &mpc5200_pic 0x1 0x1 0x3 300 0xc000 0 0 2 &mpc5200_pic 1 1 3
346 0xc000 0x0 0x0 0x3 &mpc5200_pic 0x1 0x2 0x3 301 0xc000 0 0 3 &mpc5200_pic 1 2 3
347 0xc000 0x0 0x0 0x4 &mpc5200_pic 0x1 0x3 0x3 302 0xc000 0 0 4 &mpc5200_pic 1 3 3
348 303
349 0xc800 0x0 0x0 0x1 &mpc5200_pic 0x1 0x1 0x3 /* 2nd slot */ 304 0xc800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot
350 0xc800 0x0 0x0 0x2 &mpc5200_pic 0x1 0x2 0x3 305 0xc800 0 0 2 &mpc5200_pic 1 2 3
351 0xc800 0x0 0x0 0x3 &mpc5200_pic 0x1 0x3 0x3 306 0xc800 0 0 3 &mpc5200_pic 1 3 3
352 0xc800 0x0 0x0 0x4 &mpc5200_pic 0x0 0x0 0x3>; 307 0xc800 0 0 4 &mpc5200_pic 0 0 3>;
353 clock-frequency = <0>; // From boot loader 308 clock-frequency = <0>; // From boot loader
354 interrupts = <0x2 0x8 0x0 0x2 0x9 0x0 0x2 0xa 0x0>; 309 interrupts = <2 8 0 2 9 0 2 10 0>;
355 interrupt-parent = <&mpc5200_pic>;
356 bus-range = <0 0>; 310 bus-range = <0 0>;
357 ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x20000000 311 ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000
358 0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000 312 0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
359 0x01000000 0x0 0x00000000 0xb0000000 0x0 0x01000000>; 313 0x01000000 0 0x00000000 0xb0000000 0 0x01000000>;
360 }; 314 };
361}; 315};
diff --git a/arch/powerpc/boot/dts/pcm032.dts b/arch/powerpc/boot/dts/pcm032.dts
new file mode 100644
index 000000000000..030042678392
--- /dev/null
+++ b/arch/powerpc/boot/dts/pcm032.dts
@@ -0,0 +1,392 @@
1/*
2 * phyCORE-MPC5200B-IO (pcm032) board Device Tree Source
3 *
4 * Copyright (C) 2006-2009 Pengutronix
5 * Sascha Hauer <s.hauer@pengutronix.de>
6 * Juergen Beisert <j.beisert@pengutronix.de>
7 * Wolfram Sang <w.sang@pengutronix.de>
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 */
14
15/dts-v1/;
16
17/ {
18 model = "phytec,pcm032";
19 compatible = "phytec,pcm032";
20 #address-cells = <1>;
21 #size-cells = <1>;
22 interrupt-parent = <&mpc5200_pic>;
23
24 cpus {
25 #address-cells = <1>;
26 #size-cells = <0>;
27
28 PowerPC,5200@0 {
29 device_type = "cpu";
30 reg = <0>;
31 d-cache-line-size = <32>;
32 i-cache-line-size = <32>;
33 d-cache-size = <0x4000>; // L1, 16K
34 i-cache-size = <0x4000>; // L1, 16K
35 timebase-frequency = <0>; // from bootloader
36 bus-frequency = <0>; // from bootloader
37 clock-frequency = <0>; // from bootloader
38 };
39 };
40
41 memory {
42 device_type = "memory";
43 reg = <0x00000000 0x08000000>; // 128MB
44 };
45
46 soc5200@f0000000 {
47 #address-cells = <1>;
48 #size-cells = <1>;
49 compatible = "fsl,mpc5200b-immr";
50 ranges = <0 0xf0000000 0x0000c000>;
51 bus-frequency = <0>; // from bootloader
52 system-frequency = <0>; // from bootloader
53
54 cdm@200 {
55 compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
56 reg = <0x200 0x38>;
57 };
58
59 mpc5200_pic: interrupt-controller@500 {
60 // 5200 interrupts are encoded into two levels;
61 interrupt-controller;
62 #interrupt-cells = <3>;
63 compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
64 reg = <0x500 0x80>;
65 };
66
67 timer@600 { // General Purpose Timer
68 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
69 reg = <0x600 0x10>;
70 interrupts = <1 9 0>;
71 fsl,has-wdt;
72 };
73
74 timer@610 { // General Purpose Timer
75 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
76 reg = <0x610 0x10>;
77 interrupts = <1 10 0>;
78 };
79
80 gpt2: timer@620 { // General Purpose Timer in GPIO mode
81 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
82 reg = <0x620 0x10>;
83 interrupts = <1 11 0>;
84 gpio-controller;
85 #gpio-cells = <2>;
86 };
87
88 gpt3: timer@630 { // General Purpose Timer in GPIO mode
89 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
90 reg = <0x630 0x10>;
91 interrupts = <1 12 0>;
92 gpio-controller;
93 #gpio-cells = <2>;
94 };
95
96 gpt4: timer@640 { // General Purpose Timer in GPIO mode
97 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
98 reg = <0x640 0x10>;
99 interrupts = <1 13 0>;
100 gpio-controller;
101 #gpio-cells = <2>;
102 };
103
104 gpt5: timer@650 { // General Purpose Timer in GPIO mode
105 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
106 reg = <0x650 0x10>;
107 interrupts = <1 14 0>;
108 gpio-controller;
109 #gpio-cells = <2>;
110 };
111
112 gpt6: timer@660 { // General Purpose Timer in GPIO mode
113 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
114 reg = <0x660 0x10>;
115 interrupts = <1 15 0>;
116 gpio-controller;
117 #gpio-cells = <2>;
118 };
119
120 gpt7: timer@670 { // General Purpose Timer in GPIO mode
121 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
122 reg = <0x670 0x10>;
123 interrupts = <1 16 0>;
124 gpio-controller;
125 #gpio-cells = <2>;
126 };
127
128 rtc@800 { // Real time clock
129 compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
130 reg = <0x800 0x100>;
131 interrupts = <1 5 0 1 6 0>;
132 };
133
134 can@900 {
135 compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
136 interrupts = <2 17 0>;
137 reg = <0x900 0x80>;
138 };
139
140 can@980 {
141 compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
142 interrupts = <2 18 0>;
143 reg = <0x980 0x80>;
144 };
145
146 gpio_simple: gpio@b00 {
147 compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
148 reg = <0xb00 0x40>;
149 interrupts = <1 7 0>;
150 gpio-controller;
151 #gpio-cells = <2>;
152 };
153
154 gpio_wkup: gpio@c00 {
155 compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
156 reg = <0xc00 0x40>;
157 interrupts = <1 8 0 0 3 0>;
158 gpio-controller;
159 #gpio-cells = <2>;
160 };
161
162 spi@f00 {
163 compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
164 reg = <0xf00 0x20>;
165 interrupts = <2 13 0 2 14 0>;
166 };
167
168 usb@1000 {
169 compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
170 reg = <0x1000 0xff>;
171 interrupts = <2 6 0>;
172 };
173
174 dma-controller@1200 {
175 compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
176 reg = <0x1200 0x80>;
177 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
178 3 4 0 3 5 0 3 6 0 3 7 0
179 3 8 0 3 9 0 3 10 0 3 11 0
180 3 12 0 3 13 0 3 14 0 3 15 0>;
181 };
182
183 xlb@1f00 {
184 compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
185 reg = <0x1f00 0x100>;
186 };
187
188 ac97@2000 { /* PSC1 is ac97 */
189 compatible = "fsl,mpc5200b-psc-ac97","fsl,mpc5200-psc-ac97";
190 cell-index = <0>;
191 reg = <0x2000 0x100>;
192 interrupts = <2 1 0>;
193 };
194
195 /* PSC2 port is used by CAN1/2 */
196
197 serial@2400 { /* PSC3 in UART mode */
198 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
199 cell-index = <2>;
200 reg = <0x2400 0x100>;
201 interrupts = <2 3 0>;
202 };
203
204 /* PSC4 is ??? */
205
206 /* PSC5 is ??? */
207
208 serial@2c00 { /* PSC6 in UART mode */
209 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
210 cell-index = <5>;
211 reg = <0x2c00 0x100>;
212 interrupts = <2 4 0>;
213 };
214
215 ethernet@3000 {
216 compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
217 reg = <0x3000 0x400>;
218 local-mac-address = [ 00 00 00 00 00 00 ];
219 interrupts = <2 5 0>;
220 phy-handle = <&phy0>;
221 };
222
223 mdio@3000 {
224 #address-cells = <1>;
225 #size-cells = <0>;
226 compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
227 reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
228 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
229
230 phy0: ethernet-phy@0 {
231 reg = <0>;
232 };
233 };
234
235 ata@3a00 {
236 compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
237 reg = <0x3a00 0x100>;
238 interrupts = <2 7 0>;
239 };
240
241 i2c@3d00 {
242 #address-cells = <1>;
243 #size-cells = <0>;
244 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
245 reg = <0x3d00 0x40>;
246 interrupts = <2 15 0>;
247 fsl5200-clocking;
248 };
249
250 i2c@3d40 {
251 #address-cells = <1>;
252 #size-cells = <0>;
253 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
254 reg = <0x3d40 0x40>;
255 interrupts = <2 16 0>;
256 fsl5200-clocking;
257 rtc@51 {
258 compatible = "nxp,pcf8563";
259 reg = <0x51>;
260 };
261 eeprom@52 {
262 compatible = "at24,24c32";
263 reg = <0x52>;
264 };
265 };
266
267 sram@8000 {
268 compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
269 reg = <0x8000 0x4000>;
270 };
271 };
272
273 pci@f0000d00 {
274 #interrupt-cells = <1>;
275 #size-cells = <2>;
276 #address-cells = <3>;
277 device_type = "pci";
278 compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci";
279 reg = <0xf0000d00 0x100>;
280 interrupt-map-mask = <0xf800 0 0 7>;
281 interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
282 0xc000 0 0 2 &mpc5200_pic 1 1 3
283 0xc000 0 0 3 &mpc5200_pic 1 2 3
284 0xc000 0 0 4 &mpc5200_pic 1 3 3
285
286 0xc800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot
287 0xc800 0 0 2 &mpc5200_pic 1 2 3
288 0xc800 0 0 3 &mpc5200_pic 1 3 3
289 0xc800 0 0 4 &mpc5200_pic 0 0 3>;
290 clock-frequency = <0>; // From boot loader
291 interrupts = <2 8 0 2 9 0 2 10 0>;
292 bus-range = <0 0>;
293 ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000
294 0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
295 0x01000000 0 0x00000000 0xb0000000 0 0x01000000>;
296 };
297
298 localbus {
299 compatible = "fsl,mpc5200b-lpb","fsl,mpc5200-lpb","simple-bus";
300
301 #address-cells = <2>;
302 #size-cells = <1>;
303
304 ranges = <0 0 0xfe000000 0x02000000
305 1 0 0xfc000000 0x02000000
306 2 0 0xfbe00000 0x00200000
307 3 0 0xf9e00000 0x02000000
308 4 0 0xf7e00000 0x02000000
309 5 0 0xe6000000 0x02000000
310 6 0 0xe8000000 0x02000000
311 7 0 0xea000000 0x02000000>;
312
313 flash@0,0 {
314 compatible = "cfi-flash";
315 reg = <0 0 0x02000000>;
316 bank-width = <4>;
317 #size-cells = <1>;
318 #address-cells = <1>;
319
320 partition@0 {
321 label = "ubootl";
322 reg = <0x00000000 0x00040000>;
323 };
324 partition@40000 {
325 label = "kernel";
326 reg = <0x00040000 0x001c0000>;
327 };
328 partition@200000 {
329 label = "jffs2";
330 reg = <0x00200000 0x01d00000>;
331 };
332 partition@1f00000 {
333 label = "uboot";
334 reg = <0x01f00000 0x00040000>;
335 };
336 partition@1f40000 {
337 label = "env";
338 reg = <0x01f40000 0x00040000>;
339 };
340 partition@1f80000 {
341 label = "oftree";
342 reg = <0x01f80000 0x00040000>;
343 };
344 partition@1fc0000 {
345 label = "space";
346 reg = <0x01fc0000 0x00040000>;
347 };
348 };
349
350 sram@2,0 {
351 compatible = "mtd-ram";
352 reg = <2 0 0x00200000>;
353 bank-width = <2>;
354 };
355
356 /*
357 * example snippets for FPGA
358 *
359 * fpga@3,0 {
360 * compatible = "fpga_driver";
361 * reg = <3 0 0x02000000>;
362 * bank-width = <4>;
363 * };
364 *
365 * fpga@4,0 {
366 * compatible = "fpga_driver";
367 * reg = <4 0 0x02000000>;
368 * bank-width = <4>;
369 * };
370 */
371
372 /*
373 * example snippets for free chipselects
374 *
375 * device@5,0 {
376 * compatible = "custom_driver";
377 * reg = <5 0 0x02000000>;
378 * };
379 *
380 * device@6,0 {
381 * compatible = "custom_driver";
382 * reg = <6 0 0x02000000>;
383 * };
384 *
385 * device@7,0 {
386 * compatible = "custom_driver";
387 * reg = <7 0 0x02000000>;
388 * };
389 */
390 };
391};
392
diff --git a/arch/powerpc/boot/dts/redwood.dts b/arch/powerpc/boot/dts/redwood.dts
new file mode 100644
index 000000000000..ad402c488741
--- /dev/null
+++ b/arch/powerpc/boot/dts/redwood.dts
@@ -0,0 +1,244 @@
1/*
2 * Device Tree Source for AMCC Redwood(460SX)
3 *
4 * Copyright 2008 AMCC <tmarri@amcc.com>
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without
8 * any warranty of any kind, whether express or implied.
9 */
10
11/dts-v1/;
12
13/ {
14 #address-cells = <2>;
15 #size-cells = <1>;
16 model = "amcc,redwood";
17 compatible = "amcc,redwood";
18 dcr-parent = <&{/cpus/cpu@0}>;
19
20 aliases {
21 ethernet0 = &EMAC0;
22 serial0 = &UART0;
23 };
24
25 cpus {
26 #address-cells = <1>;
27 #size-cells = <0>;
28
29 cpu@0 {
30 device_type = "cpu";
31 model = "PowerPC,460SX";
32 reg = <0x00000000>;
33 clock-frequency = <0>; /* Filled in by U-Boot */
34 timebase-frequency = <0>; /* Filled in by U-Boot */
35 i-cache-line-size = <32>;
36 d-cache-line-size = <32>;
37 i-cache-size = <32768>;
38 d-cache-size = <32768>;
39 dcr-controller;
40 dcr-access-method = "native";
41 };
42 };
43
44 memory {
45 device_type = "memory";
46 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */
47 };
48
49 UIC0: interrupt-controller0 {
50 compatible = "ibm,uic-460sx","ibm,uic";
51 interrupt-controller;
52 cell-index = <0>;
53 dcr-reg = <0x0c0 0x009>;
54 #address-cells = <0>;
55 #size-cells = <0>;
56 #interrupt-cells = <2>;
57 };
58
59 UIC1: interrupt-controller1 {
60 compatible = "ibm,uic-460sx","ibm,uic";
61 interrupt-controller;
62 cell-index = <1>;
63 dcr-reg = <0x0d0 0x009>;
64 #address-cells = <0>;
65 #size-cells = <0>;
66 #interrupt-cells = <2>;
67 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
68 interrupt-parent = <&UIC0>;
69 };
70
71 UIC2: interrupt-controller2 {
72 compatible = "ibm,uic-460sx","ibm,uic";
73 interrupt-controller;
74 cell-index = <2>;
75 dcr-reg = <0x0e0 0x009>;
76 #address-cells = <0>;
77 #size-cells = <0>;
78 #interrupt-cells = <2>;
79 interrupts = <0xa 0x4 0xb 0x4>; /* cascade */
80 interrupt-parent = <&UIC0>;
81 };
82
83 UIC3: interrupt-controller3 {
84 compatible = "ibm,uic-460sx","ibm,uic";
85 interrupt-controller;
86 cell-index = <3>;
87 dcr-reg = <0x0f0 0x009>;
88 #address-cells = <0>;
89 #size-cells = <0>;
90 #interrupt-cells = <2>;
91 interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
92 interrupt-parent = <&UIC0>;
93 };
94
95 SDR0: sdr {
96 compatible = "ibm,sdr-460sx";
97 dcr-reg = <0x00e 0x002>;
98 };
99
100 CPR0: cpr {
101 compatible = "ibm,cpr-460sx";
102 dcr-reg = <0x00c 0x002>;
103 };
104
105 plb {
106 compatible = "ibm,plb-460sx", "ibm,plb4";
107 #address-cells = <2>;
108 #size-cells = <1>;
109 ranges;
110 clock-frequency = <0>; /* Filled in by U-Boot */
111
112 SDRAM0: sdram {
113 compatible = "ibm,sdram-460sx", "ibm,sdram-405gp";
114 dcr-reg = <0x010 0x002>;
115 };
116
117 MAL0: mcmal {
118 compatible = "ibm,mcmal-460sx", "ibm,mcmal2";
119 dcr-reg = <0x180 0x62>;
120 num-tx-chans = <4>;
121 num-rx-chans = <32>;
122 #address-cells = <1>;
123 #size-cells = <1>;
124 interrupt-parent = <&UIC1>;
125 interrupts = < /*TXEOB*/ 0x6 0x4
126 /*RXEOB*/ 0x7 0x4
127 /*SERR*/ 0x1 0x4
128 /*TXDE*/ 0x2 0x4
129 /*RXDE*/ 0x3 0x4
130 /*COAL TX0*/ 0x18 0x2
131 /*COAL TX1*/ 0x19 0x2
132 /*COAL TX2*/ 0x1a 0x2
133 /*COAL TX3*/ 0x1b 0x2
134 /*COAL RX0*/ 0x1c 0x2
135 /*COAL RX1*/ 0x1d 0x2
136 /*COAL RX2*/ 0x1e 0x2
137 /*COAL RX3*/ 0x1f 0x2>;
138 };
139
140 POB0: opb {
141 compatible = "ibm,opb-460sx", "ibm,opb";
142 #address-cells = <1>;
143 #size-cells = <1>;
144 ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>;
145 clock-frequency = <0>; /* Filled in by U-Boot */
146
147 EBC0: ebc {
148 compatible = "ibm,ebc-460sx", "ibm,ebc";
149 dcr-reg = <0x012 0x002>;
150 #address-cells = <2>;
151 #size-cells = <1>;
152 clock-frequency = <0>; /* Filled in by U-Boot */
153 /* ranges property is supplied by U-Boot */
154 interrupts = <0x6 0x4>;
155 interrupt-parent = <&UIC1>;
156
157 nor_flash@0,0 {
158 compatible = "amd,s29gl512n", "cfi-flash";
159 bank-width = <2>;
160 reg = <0x0000000 0x00000000 0x04000000>;
161 #address-cells = <1>;
162 #size-cells = <1>;
163 partition@0 {
164 label = "kernel";
165 reg = <0x00000000 0x001e0000>;
166 };
167 partition@1e0000 {
168 label = "dtb";
169 reg = <0x001e0000 0x00020000>;
170 };
171 partition@200000 {
172 label = "ramdisk";
173 reg = <0x00200000 0x01400000>;
174 };
175 partition@1600000 {
176 label = "jffs2";
177 reg = <0x01600000 0x00400000>;
178 };
179 partition@1a00000 {
180 label = "user";
181 reg = <0x01a00000 0x02560000>;
182 };
183 partition@3f60000 {
184 label = "env";
185 reg = <0x03f60000 0x00040000>;
186 };
187 partition@3fa0000 {
188 label = "u-boot";
189 reg = <0x03fa0000 0x00060000>;
190 };
191 };
192 };
193
194 UART0: serial@ef600200 {
195 device_type = "serial";
196 compatible = "ns16550";
197 reg = <0xef600200 0x00000008>;
198 virtual-reg = <0xef600200>;
199 clock-frequency = <0>; /* Filled in by U-Boot */
200 current-speed = <0>; /* Filled in by U-Boot */
201 interrupt-parent = <&UIC0>;
202 interrupts = <0x0 0x4>;
203 };
204
205 RGMII0: emac-rgmii@ef600900 {
206 compatible = "ibm,rgmii-460sx", "ibm,rgmii";
207 reg = <0xef600900 0x00000008>;
208 };
209
210 EMAC0: ethernet@ef600a00 {
211 device_type = "network";
212 compatible = "ibm,emac-460sx", "ibm,emac4";
213 interrupt-parent = <&EMAC0>;
214 interrupts = <0x0 0x1>;
215 #interrupt-cells = <1>;
216 #address-cells = <0>;
217 #size-cells = <0>;
218 interrupt-map = </*Status*/ 0x0 &UIC0 0x13 0x4
219 /*Wake*/ 0x1 &UIC2 0x1d 0x4>;
220 reg = <0xef600a00 0x00000070>;
221 local-mac-address = [000000000000]; /* Filled in by U-Boot */
222 mal-device = <&MAL0>;
223 mal-tx-channel = <0>;
224 mal-rx-channel = <0>;
225 cell-index = <0>;
226 max-frame-size = <9000>;
227 rx-fifo-size = <4096>;
228 tx-fifo-size = <2048>;
229 phy-mode = "rgmii";
230 phy-map = <0x00000000>;
231 rgmii-device = <&RGMII0>;
232 rgmii-channel = <0>;
233 has-inverted-stacr-oc;
234 has-new-stacr-staopc;
235 };
236
237 };
238
239 };
240 chosen {
241 linux,stdout-path = "/plb/opb/serial@ef600200";
242 };
243
244};
diff --git a/arch/powerpc/boot/dts/sbc8349.dts b/arch/powerpc/boot/dts/sbc8349.dts
index 8d365a57ebc1..a36dbbc48694 100644
--- a/arch/powerpc/boot/dts/sbc8349.dts
+++ b/arch/powerpc/boot/dts/sbc8349.dts
@@ -159,68 +159,76 @@
159 phy_type = "ulpi"; 159 phy_type = "ulpi";
160 }; 160 };
161 161
162 mdio@24520 {
163 #address-cells = <1>;
164 #size-cells = <0>;
165 compatible = "fsl,gianfar-mdio";
166 reg = <0x24520 0x20>;
167
168 phy0: ethernet-phy@19 {
169 interrupt-parent = <&ipic>;
170 interrupts = <20 0x8>;
171 reg = <0x19>;
172 device_type = "ethernet-phy";
173 };
174 phy1: ethernet-phy@1a {
175 interrupt-parent = <&ipic>;
176 interrupts = <21 0x8>;
177 reg = <0x1a>;
178 device_type = "ethernet-phy";
179 };
180 tbi0: tbi-phy@11 {
181 reg = <0x11>;
182 device_type = "tbi-phy";
183 };
184 };
185
186 mdio@25520 {
187 #address-cells = <1>;
188 #size-cells = <0>;
189 compatible = "fsl,gianfar-tbi";
190 reg = <0x25520 0x20>;
191
192 tbi1: tbi-phy@11 {
193 reg = <0x11>;
194 device_type = "tbi-phy";
195 };
196 };
197
198 enet0: ethernet@24000 { 162 enet0: ethernet@24000 {
163 #address-cells = <1>;
164 #size-cells = <1>;
199 cell-index = <0>; 165 cell-index = <0>;
200 device_type = "network"; 166 device_type = "network";
201 model = "TSEC"; 167 model = "TSEC";
202 compatible = "gianfar"; 168 compatible = "gianfar";
203 reg = <0x24000 0x1000>; 169 reg = <0x24000 0x1000>;
170 ranges = <0x0 0x24000 0x1000>;
204 local-mac-address = [ 00 00 00 00 00 00 ]; 171 local-mac-address = [ 00 00 00 00 00 00 ];
205 interrupts = <32 0x8 33 0x8 34 0x8>; 172 interrupts = <32 0x8 33 0x8 34 0x8>;
206 interrupt-parent = <&ipic>; 173 interrupt-parent = <&ipic>;
207 tbi-handle = <&tbi0>; 174 tbi-handle = <&tbi0>;
208 phy-handle = <&phy0>; 175 phy-handle = <&phy0>;
209 linux,network-index = <0>; 176 linux,network-index = <0>;
177
178 mdio@520 {
179 #address-cells = <1>;
180 #size-cells = <0>;
181 compatible = "fsl,gianfar-mdio";
182 reg = <0x520 0x20>;
183
184 phy0: ethernet-phy@19 {
185 interrupt-parent = <&ipic>;
186 interrupts = <20 0x8>;
187 reg = <0x19>;
188 device_type = "ethernet-phy";
189 };
190
191 phy1: ethernet-phy@1a {
192 interrupt-parent = <&ipic>;
193 interrupts = <21 0x8>;
194 reg = <0x1a>;
195 device_type = "ethernet-phy";
196 };
197
198 tbi0: tbi-phy@11 {
199 reg = <0x11>;
200 device_type = "tbi-phy";
201 };
202 };
210 }; 203 };
211 204
212 enet1: ethernet@25000 { 205 enet1: ethernet@25000 {
206 #address-cells = <1>;
207 #size-cells = <1>;
213 cell-index = <1>; 208 cell-index = <1>;
214 device_type = "network"; 209 device_type = "network";
215 model = "TSEC"; 210 model = "TSEC";
216 compatible = "gianfar"; 211 compatible = "gianfar";
217 reg = <0x25000 0x1000>; 212 reg = <0x25000 0x1000>;
213 ranges = <0x0 0x25000 0x1000>;
218 local-mac-address = [ 00 00 00 00 00 00 ]; 214 local-mac-address = [ 00 00 00 00 00 00 ];
219 interrupts = <35 0x8 36 0x8 37 0x8>; 215 interrupts = <35 0x8 36 0x8 37 0x8>;
220 interrupt-parent = <&ipic>; 216 interrupt-parent = <&ipic>;
221 tbi-handle = <&tbi1>; 217 tbi-handle = <&tbi1>;
222 phy-handle = <&phy1>; 218 phy-handle = <&phy1>;
223 linux,network-index = <1>; 219 linux,network-index = <1>;
220
221 mdio@520 {
222 #address-cells = <1>;
223 #size-cells = <0>;
224 compatible = "fsl,gianfar-tbi";
225 reg = <0x520 0x20>;
226
227 tbi1: tbi-phy@11 {
228 reg = <0x11>;
229 device_type = "tbi-phy";
230 };
231 };
224 }; 232 };
225 233
226 serial0: serial@4500 { 234 serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/sbc8548.dts b/arch/powerpc/boot/dts/sbc8548.dts
index 2baf4a51f224..9c5079fec4f2 100644
--- a/arch/powerpc/boot/dts/sbc8548.dts
+++ b/arch/powerpc/boot/dts/sbc8548.dts
@@ -234,66 +234,72 @@
234 }; 234 };
235 }; 235 };
236 236
237 mdio@24520 {
238 #address-cells = <1>;
239 #size-cells = <0>;
240 compatible = "fsl,gianfar-mdio";
241 reg = <0x24520 0x20>;
242
243 phy0: ethernet-phy@19 {
244 interrupt-parent = <&mpic>;
245 interrupts = <0x6 0x1>;
246 reg = <0x19>;
247 device_type = "ethernet-phy";
248 };
249 phy1: ethernet-phy@1a {
250 interrupt-parent = <&mpic>;
251 interrupts = <0x7 0x1>;
252 reg = <0x1a>;
253 device_type = "ethernet-phy";
254 };
255 tbi0: tbi-phy@11 {
256 reg = <0x11>;
257 device_type = "tbi-phy";
258 };
259 };
260
261 mdio@25520 {
262 #address-cells = <1>;
263 #size-cells = <0>;
264 compatible = "fsl,gianfar-tbi";
265 reg = <0x25520 0x20>;
266
267 tbi1: tbi-phy@11 {
268 reg = <0x11>;
269 device_type = "tbi-phy";
270 };
271 };
272
273 enet0: ethernet@24000 { 237 enet0: ethernet@24000 {
238 #address-cells = <1>;
239 #size-cells = <1>;
274 cell-index = <0>; 240 cell-index = <0>;
275 device_type = "network"; 241 device_type = "network";
276 model = "eTSEC"; 242 model = "eTSEC";
277 compatible = "gianfar"; 243 compatible = "gianfar";
278 reg = <0x24000 0x1000>; 244 reg = <0x24000 0x1000>;
245 ranges = <0x0 0x24000 0x1000>;
279 local-mac-address = [ 00 00 00 00 00 00 ]; 246 local-mac-address = [ 00 00 00 00 00 00 ];
280 interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>; 247 interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
281 interrupt-parent = <&mpic>; 248 interrupt-parent = <&mpic>;
282 tbi-handle = <&tbi0>; 249 tbi-handle = <&tbi0>;
283 phy-handle = <&phy0>; 250 phy-handle = <&phy0>;
251
252 mdio@520 {
253 #address-cells = <1>;
254 #size-cells = <0>;
255 compatible = "fsl,gianfar-mdio";
256 reg = <0x520 0x20>;
257
258 phy0: ethernet-phy@19 {
259 interrupt-parent = <&mpic>;
260 interrupts = <0x6 0x1>;
261 reg = <0x19>;
262 device_type = "ethernet-phy";
263 };
264 phy1: ethernet-phy@1a {
265 interrupt-parent = <&mpic>;
266 interrupts = <0x7 0x1>;
267 reg = <0x1a>;
268 device_type = "ethernet-phy";
269 };
270 tbi0: tbi-phy@11 {
271 reg = <0x11>;
272 device_type = "tbi-phy";
273 };
274 };
284 }; 275 };
285 276
286 enet1: ethernet@25000 { 277 enet1: ethernet@25000 {
278 #address-cells = <1>;
279 #size-cells = <1>;
287 cell-index = <1>; 280 cell-index = <1>;
288 device_type = "network"; 281 device_type = "network";
289 model = "eTSEC"; 282 model = "eTSEC";
290 compatible = "gianfar"; 283 compatible = "gianfar";
291 reg = <0x25000 0x1000>; 284 reg = <0x25000 0x1000>;
285 ranges = <0x0 0x25000 0x1000>;
292 local-mac-address = [ 00 00 00 00 00 00 ]; 286 local-mac-address = [ 00 00 00 00 00 00 ];
293 interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>; 287 interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>;
294 interrupt-parent = <&mpic>; 288 interrupt-parent = <&mpic>;
295 tbi-handle = <&tbi1>; 289 tbi-handle = <&tbi1>;
296 phy-handle = <&phy1>; 290 phy-handle = <&phy1>;
291
292 mdio@520 {
293 #address-cells = <1>;
294 #size-cells = <0>;
295 compatible = "fsl,gianfar-tbi";
296 reg = <0x520 0x20>;
297
298 tbi1: tbi-phy@11 {
299 reg = <0x11>;
300 device_type = "tbi-phy";
301 };
302 };
297 }; 303 };
298 304
299 serial0: serial@4500 { 305 serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/sbc8560.dts b/arch/powerpc/boot/dts/sbc8560.dts
index 01542f7062ab..b772405a9a0a 100644
--- a/arch/powerpc/boot/dts/sbc8560.dts
+++ b/arch/powerpc/boot/dts/sbc8560.dts
@@ -139,77 +139,83 @@
139 }; 139 };
140 }; 140 };
141 141
142 mdio@24520 {
143 #address-cells = <1>;
144 #size-cells = <0>;
145 compatible = "fsl,gianfar-mdio";
146 reg = <0x24520 0x20>;
147 phy0: ethernet-phy@19 {
148 interrupt-parent = <&mpic>;
149 interrupts = <0x6 0x1>;
150 reg = <0x19>;
151 device_type = "ethernet-phy";
152 };
153 phy1: ethernet-phy@1a {
154 interrupt-parent = <&mpic>;
155 interrupts = <0x7 0x1>;
156 reg = <0x1a>;
157 device_type = "ethernet-phy";
158 };
159 phy2: ethernet-phy@1b {
160 interrupt-parent = <&mpic>;
161 interrupts = <0x8 0x1>;
162 reg = <0x1b>;
163 device_type = "ethernet-phy";
164 };
165 phy3: ethernet-phy@1c {
166 interrupt-parent = <&mpic>;
167 interrupts = <0x8 0x1>;
168 reg = <0x1c>;
169 device_type = "ethernet-phy";
170 };
171 tbi0: tbi-phy@11 {
172 reg = <0x11>;
173 device_type = "tbi-phy";
174 };
175 };
176
177 mdio@25520 {
178 #address-cells = <1>;
179 #size-cells = <0>;
180 compatible = "fsl,gianfar-tbi";
181 reg = <0x25520 0x20>;
182
183 tbi1: tbi-phy@11 {
184 reg = <0x11>;
185 device_type = "tbi-phy";
186 };
187 };
188
189 enet0: ethernet@24000 { 142 enet0: ethernet@24000 {
143 #address-cells = <1>;
144 #size-cells = <1>;
190 cell-index = <0>; 145 cell-index = <0>;
191 device_type = "network"; 146 device_type = "network";
192 model = "TSEC"; 147 model = "TSEC";
193 compatible = "gianfar"; 148 compatible = "gianfar";
194 reg = <0x24000 0x1000>; 149 reg = <0x24000 0x1000>;
150 ranges = <0x0 0x24000 0x1000>;
195 local-mac-address = [ 00 00 00 00 00 00 ]; 151 local-mac-address = [ 00 00 00 00 00 00 ];
196 interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>; 152 interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
197 interrupt-parent = <&mpic>; 153 interrupt-parent = <&mpic>;
198 tbi-handle = <&tbi0>; 154 tbi-handle = <&tbi0>;
199 phy-handle = <&phy0>; 155 phy-handle = <&phy0>;
156
157 mdio@520 {
158 #address-cells = <1>;
159 #size-cells = <0>;
160 compatible = "fsl,gianfar-mdio";
161 reg = <0x520 0x20>;
162 phy0: ethernet-phy@19 {
163 interrupt-parent = <&mpic>;
164 interrupts = <0x6 0x1>;
165 reg = <0x19>;
166 device_type = "ethernet-phy";
167 };
168 phy1: ethernet-phy@1a {
169 interrupt-parent = <&mpic>;
170 interrupts = <0x7 0x1>;
171 reg = <0x1a>;
172 device_type = "ethernet-phy";
173 };
174 phy2: ethernet-phy@1b {
175 interrupt-parent = <&mpic>;
176 interrupts = <0x8 0x1>;
177 reg = <0x1b>;
178 device_type = "ethernet-phy";
179 };
180 phy3: ethernet-phy@1c {
181 interrupt-parent = <&mpic>;
182 interrupts = <0x8 0x1>;
183 reg = <0x1c>;
184 device_type = "ethernet-phy";
185 };
186 tbi0: tbi-phy@11 {
187 reg = <0x11>;
188 device_type = "tbi-phy";
189 };
190 };
200 }; 191 };
201 192
202 enet1: ethernet@25000 { 193 enet1: ethernet@25000 {
194 #address-cells = <1>;
195 #size-cells = <1>;
203 cell-index = <1>; 196 cell-index = <1>;
204 device_type = "network"; 197 device_type = "network";
205 model = "TSEC"; 198 model = "TSEC";
206 compatible = "gianfar"; 199 compatible = "gianfar";
207 reg = <0x25000 0x1000>; 200 reg = <0x25000 0x1000>;
201 ranges = <0x0 0x25000 0x1000>;
208 local-mac-address = [ 00 00 00 00 00 00 ]; 202 local-mac-address = [ 00 00 00 00 00 00 ];
209 interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>; 203 interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>;
210 interrupt-parent = <&mpic>; 204 interrupt-parent = <&mpic>;
211 tbi-handle = <&tbi1>; 205 tbi-handle = <&tbi1>;
212 phy-handle = <&phy1>; 206 phy-handle = <&phy1>;
207
208 mdio@520 {
209 #address-cells = <1>;
210 #size-cells = <0>;
211 compatible = "fsl,gianfar-tbi";
212 reg = <0x520 0x20>;
213
214 tbi1: tbi-phy@11 {
215 reg = <0x11>;
216 device_type = "tbi-phy";
217 };
218 };
213 }; 219 };
214 220
215 mpic: pic@40000 { 221 mpic: pic@40000 {
diff --git a/arch/powerpc/boot/dts/sbc8641d.dts b/arch/powerpc/boot/dts/sbc8641d.dts
index 36db981548e4..e3e914e78caa 100644
--- a/arch/powerpc/boot/dts/sbc8641d.dts
+++ b/arch/powerpc/boot/dts/sbc8641d.dts
@@ -192,132 +192,144 @@
192 }; 192 };
193 }; 193 };
194 194
195 mdio@24520 {
196 #address-cells = <1>;
197 #size-cells = <0>;
198 compatible = "fsl,gianfar-mdio";
199 reg = <0x24520 0x20>;
200
201 phy0: ethernet-phy@1f {
202 interrupt-parent = <&mpic>;
203 interrupts = <10 1>;
204 reg = <0x1f>;
205 device_type = "ethernet-phy";
206 };
207 phy1: ethernet-phy@0 {
208 interrupt-parent = <&mpic>;
209 interrupts = <10 1>;
210 reg = <0>;
211 device_type = "ethernet-phy";
212 };
213 phy2: ethernet-phy@1 {
214 interrupt-parent = <&mpic>;
215 interrupts = <10 1>;
216 reg = <1>;
217 device_type = "ethernet-phy";
218 };
219 phy3: ethernet-phy@2 {
220 interrupt-parent = <&mpic>;
221 interrupts = <10 1>;
222 reg = <2>;
223 device_type = "ethernet-phy";
224 };
225 tbi0: tbi-phy@11 {
226 reg = <0x11>;
227 device_type = "tbi-phy";
228 };
229 };
230
231 mdio@25520 {
232 #address-cells = <1>;
233 #size-cells = <0>;
234 compatible = "fsl,gianfar-tbi";
235 reg = <0x25520 0x20>;
236
237 tbi1: tbi-phy@11 {
238 reg = <0x11>;
239 device_type = "tbi-phy";
240 };
241 };
242
243 mdio@26520 {
244 #address-cells = <1>;
245 #size-cells = <0>;
246 compatible = "fsl,gianfar-tbi";
247 reg = <0x26520 0x20>;
248
249 tbi2: tbi-phy@11 {
250 reg = <0x11>;
251 device_type = "tbi-phy";
252 };
253 };
254
255 mdio@27520 {
256 #address-cells = <1>;
257 #size-cells = <0>;
258 compatible = "fsl,gianfar-tbi";
259 reg = <0x27520 0x20>;
260
261 tbi3: tbi-phy@11 {
262 reg = <0x11>;
263 device_type = "tbi-phy";
264 };
265 };
266
267 enet0: ethernet@24000 { 195 enet0: ethernet@24000 {
196 #address-cells = <1>;
197 #size-cells = <1>;
268 cell-index = <0>; 198 cell-index = <0>;
269 device_type = "network"; 199 device_type = "network";
270 model = "TSEC"; 200 model = "TSEC";
271 compatible = "gianfar"; 201 compatible = "gianfar";
272 reg = <0x24000 0x1000>; 202 reg = <0x24000 0x1000>;
203 ranges = <0x0 0x24000 0x1000>;
273 local-mac-address = [ 00 00 00 00 00 00 ]; 204 local-mac-address = [ 00 00 00 00 00 00 ];
274 interrupts = <29 2 30 2 34 2>; 205 interrupts = <29 2 30 2 34 2>;
275 interrupt-parent = <&mpic>; 206 interrupt-parent = <&mpic>;
276 tbi-handle = <&tbi0>; 207 tbi-handle = <&tbi0>;
277 phy-handle = <&phy0>; 208 phy-handle = <&phy0>;
278 phy-connection-type = "rgmii-id"; 209 phy-connection-type = "rgmii-id";
210
211 mdio@520 {
212 #address-cells = <1>;
213 #size-cells = <0>;
214 compatible = "fsl,gianfar-mdio";
215 reg = <0x520 0x20>;
216
217 phy0: ethernet-phy@1f {
218 interrupt-parent = <&mpic>;
219 interrupts = <10 1>;
220 reg = <0x1f>;
221 device_type = "ethernet-phy";
222 };
223 phy1: ethernet-phy@0 {
224 interrupt-parent = <&mpic>;
225 interrupts = <10 1>;
226 reg = <0>;
227 device_type = "ethernet-phy";
228 };
229 phy2: ethernet-phy@1 {
230 interrupt-parent = <&mpic>;
231 interrupts = <10 1>;
232 reg = <1>;
233 device_type = "ethernet-phy";
234 };
235 phy3: ethernet-phy@2 {
236 interrupt-parent = <&mpic>;
237 interrupts = <10 1>;
238 reg = <2>;
239 device_type = "ethernet-phy";
240 };
241 tbi0: tbi-phy@11 {
242 reg = <0x11>;
243 device_type = "tbi-phy";
244 };
245 };
279 }; 246 };
280 247
281 enet1: ethernet@25000 { 248 enet1: ethernet@25000 {
249 #address-cells = <1>;
250 #size-cells = <1>;
282 cell-index = <1>; 251 cell-index = <1>;
283 device_type = "network"; 252 device_type = "network";
284 model = "TSEC"; 253 model = "TSEC";
285 compatible = "gianfar"; 254 compatible = "gianfar";
286 reg = <0x25000 0x1000>; 255 reg = <0x25000 0x1000>;
256 ranges = <0x0 0x25000 0x1000>;
287 local-mac-address = [ 00 00 00 00 00 00 ]; 257 local-mac-address = [ 00 00 00 00 00 00 ];
288 interrupts = <35 2 36 2 40 2>; 258 interrupts = <35 2 36 2 40 2>;
289 interrupt-parent = <&mpic>; 259 interrupt-parent = <&mpic>;
290 tbi-handle = <&tbi1>; 260 tbi-handle = <&tbi1>;
291 phy-handle = <&phy1>; 261 phy-handle = <&phy1>;
292 phy-connection-type = "rgmii-id"; 262 phy-connection-type = "rgmii-id";
263
264 mdio@520 {
265 #address-cells = <1>;
266 #size-cells = <0>;
267 compatible = "fsl,gianfar-tbi";
268 reg = <0x520 0x20>;
269
270 tbi1: tbi-phy@11 {
271 reg = <0x11>;
272 device_type = "tbi-phy";
273 };
274 };
293 }; 275 };
294 276
295 enet2: ethernet@26000 { 277 enet2: ethernet@26000 {
278 #address-cells = <1>;
279 #size-cells = <1>;
296 cell-index = <2>; 280 cell-index = <2>;
297 device_type = "network"; 281 device_type = "network";
298 model = "TSEC"; 282 model = "TSEC";
299 compatible = "gianfar"; 283 compatible = "gianfar";
300 reg = <0x26000 0x1000>; 284 reg = <0x26000 0x1000>;
285 ranges = <0x0 0x26000 0x1000>;
301 local-mac-address = [ 00 00 00 00 00 00 ]; 286 local-mac-address = [ 00 00 00 00 00 00 ];
302 interrupts = <31 2 32 2 33 2>; 287 interrupts = <31 2 32 2 33 2>;
303 interrupt-parent = <&mpic>; 288 interrupt-parent = <&mpic>;
304 tbi-handle = <&tbi2>; 289 tbi-handle = <&tbi2>;
305 phy-handle = <&phy2>; 290 phy-handle = <&phy2>;
306 phy-connection-type = "rgmii-id"; 291 phy-connection-type = "rgmii-id";
292
293 mdio@520 {
294 #address-cells = <1>;
295 #size-cells = <0>;
296 compatible = "fsl,gianfar-tbi";
297 reg = <0x520 0x20>;
298
299 tbi2: tbi-phy@11 {
300 reg = <0x11>;
301 device_type = "tbi-phy";
302 };
303 };
307 }; 304 };
308 305
309 enet3: ethernet@27000 { 306 enet3: ethernet@27000 {
307 #address-cells = <1>;
308 #size-cells = <1>;
310 cell-index = <3>; 309 cell-index = <3>;
311 device_type = "network"; 310 device_type = "network";
312 model = "TSEC"; 311 model = "TSEC";
313 compatible = "gianfar"; 312 compatible = "gianfar";
314 reg = <0x27000 0x1000>; 313 reg = <0x27000 0x1000>;
314 ranges = <0x0 0x27000 0x1000>;
315 local-mac-address = [ 00 00 00 00 00 00 ]; 315 local-mac-address = [ 00 00 00 00 00 00 ];
316 interrupts = <37 2 38 2 39 2>; 316 interrupts = <37 2 38 2 39 2>;
317 interrupt-parent = <&mpic>; 317 interrupt-parent = <&mpic>;
318 tbi-handle = <&tbi3>; 318 tbi-handle = <&tbi3>;
319 phy-handle = <&phy3>; 319 phy-handle = <&phy3>;
320 phy-connection-type = "rgmii-id"; 320 phy-connection-type = "rgmii-id";
321
322 mdio@520 {
323 #address-cells = <1>;
324 #size-cells = <0>;
325 compatible = "fsl,gianfar-tbi";
326 reg = <0x520 0x20>;
327
328 tbi3: tbi-phy@11 {
329 reg = <0x11>;
330 device_type = "tbi-phy";
331 };
332 };
321 }; 333 };
322 334
323 serial0: serial@4500 { 335 serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/socrates.dts b/arch/powerpc/boot/dts/socrates.dts
new file mode 100644
index 000000000000..b8d0fc6f0042
--- /dev/null
+++ b/arch/powerpc/boot/dts/socrates.dts
@@ -0,0 +1,338 @@
1/*
2 * Device Tree Source for the Socrates board (MPC8544).
3 *
4 * Copyright (c) 2008 Emcraft Systems.
5 * Sergei Poselenov, <sposelenov@emcraft.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13/dts-v1/;
14
15/ {
16 model = "abb,socrates";
17 compatible = "abb,socrates";
18 #address-cells = <1>;
19 #size-cells = <1>;
20
21 aliases {
22 ethernet0 = &enet0;
23 ethernet1 = &enet1;
24 serial0 = &serial0;
25 serial1 = &serial1;
26 pci0 = &pci0;
27 };
28
29 cpus {
30 #address-cells = <1>;
31 #size-cells = <0>;
32
33 PowerPC,8544@0 {
34 device_type = "cpu";
35 reg = <0>;
36 d-cache-line-size = <32>;
37 i-cache-line-size = <32>;
38 d-cache-size = <0x8000>; // L1, 32K
39 i-cache-size = <0x8000>; // L1, 32K
40 timebase-frequency = <0>;
41 bus-frequency = <0>;
42 clock-frequency = <0>;
43 next-level-cache = <&L2>;
44 };
45 };
46
47 memory {
48 device_type = "memory";
49 reg = <0x00000000 0x00000000>; // Filled in by U-Boot
50 };
51
52 soc8544@e0000000 {
53 #address-cells = <1>;
54 #size-cells = <1>;
55
56 ranges = <0x00000000 0xe0000000 0x00100000>;
57 reg = <0xe0000000 0x00001000>; // CCSRBAR 1M
58 bus-frequency = <0>; // Filled in by U-Boot
59 compatible = "fsl,mpc8544-immr", "simple-bus";
60
61 memory-controller@2000 {
62 compatible = "fsl,mpc8544-memory-controller";
63 reg = <0x2000 0x1000>;
64 interrupt-parent = <&mpic>;
65 interrupts = <18 2>;
66 };
67
68 L2: l2-cache-controller@20000 {
69 compatible = "fsl,mpc8544-l2-cache-controller";
70 reg = <0x20000 0x1000>;
71 cache-line-size = <32>;
72 cache-size = <0x40000>; // L2, 256K
73 interrupt-parent = <&mpic>;
74 interrupts = <16 2>;
75 };
76
77 i2c@3000 {
78 #address-cells = <1>;
79 #size-cells = <0>;
80 cell-index = <0>;
81 compatible = "fsl-i2c";
82 reg = <0x3000 0x100>;
83 interrupts = <43 2>;
84 interrupt-parent = <&mpic>;
85 dfsrr;
86
87 dtt@28 {
88 compatible = "winbond,w83782d";
89 reg = <0x28>;
90 };
91 rtc@32 {
92 compatible = "epson,rx8025";
93 reg = <0x32>;
94 interrupts = <7 1>;
95 interrupt-parent = <&mpic>;
96 };
97 dtt@4c {
98 compatible = "dallas,ds75";
99 reg = <0x4c>;
100 };
101 ts@4a {
102 compatible = "ti,tsc2003";
103 reg = <0x4a>;
104 interrupt-parent = <&mpic>;
105 interrupts = <8 1>;
106 };
107 };
108
109 i2c@3100 {
110 #address-cells = <1>;
111 #size-cells = <0>;
112 cell-index = <1>;
113 compatible = "fsl-i2c";
114 reg = <0x3100 0x100>;
115 interrupts = <43 2>;
116 interrupt-parent = <&mpic>;
117 dfsrr;
118 };
119
120 enet0: ethernet@24000 {
121 #address-cells = <1>;
122 #size-cells = <1>;
123 cell-index = <0>;
124 device_type = "network";
125 model = "eTSEC";
126 compatible = "gianfar";
127 reg = <0x24000 0x1000>;
128 ranges = <0x0 0x24000 0x1000>;
129 local-mac-address = [ 00 00 00 00 00 00 ];
130 interrupts = <29 2 30 2 34 2>;
131 interrupt-parent = <&mpic>;
132 phy-handle = <&phy0>;
133 tbi-handle = <&tbi0>;
134 phy-connection-type = "rgmii-id";
135
136 mdio@520 {
137 #address-cells = <1>;
138 #size-cells = <0>;
139 compatible = "fsl,gianfar-mdio";
140 reg = <0x520 0x20>;
141
142 phy0: ethernet-phy@0 {
143 interrupt-parent = <&mpic>;
144 interrupts = <0 1>;
145 reg = <0>;
146 };
147 phy1: ethernet-phy@1 {
148 interrupt-parent = <&mpic>;
149 interrupts = <0 1>;
150 reg = <1>;
151 };
152 tbi0: tbi-phy@11 {
153 reg = <0x11>;
154 };
155 };
156 };
157
158 enet1: ethernet@26000 {
159 #address-cells = <1>;
160 #size-cells = <1>;
161 cell-index = <1>;
162 device_type = "network";
163 model = "eTSEC";
164 compatible = "gianfar";
165 reg = <0x26000 0x1000>;
166 ranges = <0x0 0x26000 0x1000>;
167 local-mac-address = [ 00 00 00 00 00 00 ];
168 interrupts = <31 2 32 2 33 2>;
169 interrupt-parent = <&mpic>;
170 phy-handle = <&phy1>;
171 tbi-handle = <&tbi1>;
172 phy-connection-type = "rgmii-id";
173
174 mdio@520 {
175 #address-cells = <1>;
176 #size-cells = <0>;
177 compatible = "fsl,gianfar-tbi";
178 reg = <0x520 0x20>;
179
180 tbi1: tbi-phy@11 {
181 reg = <0x11>;
182 };
183 };
184 };
185
186 serial0: serial@4500 {
187 cell-index = <0>;
188 device_type = "serial";
189 compatible = "ns16550";
190 reg = <0x4500 0x100>;
191 clock-frequency = <0>;
192 interrupts = <42 2>;
193 interrupt-parent = <&mpic>;
194 };
195
196 serial1: serial@4600 {
197 cell-index = <1>;
198 device_type = "serial";
199 compatible = "ns16550";
200 reg = <0x4600 0x100>;
201 clock-frequency = <0>;
202 interrupts = <42 2>;
203 interrupt-parent = <&mpic>;
204 };
205
206 global-utilities@e0000 { //global utilities block
207 compatible = "fsl,mpc8548-guts";
208 reg = <0xe0000 0x1000>;
209 fsl,has-rstcr;
210 };
211
212 mpic: pic@40000 {
213 interrupt-controller;
214 #address-cells = <0>;
215 #interrupt-cells = <2>;
216 reg = <0x40000 0x40000>;
217 compatible = "chrp,open-pic";
218 device_type = "open-pic";
219 };
220 };
221
222
223 localbus {
224 compatible = "fsl,mpc8544-localbus",
225 "fsl,pq3-localbus",
226 "simple-bus";
227 #address-cells = <2>;
228 #size-cells = <1>;
229 reg = <0xe0005000 0x40>;
230
231 ranges = <0 0 0xfc000000 0x04000000
232 2 0 0xc8000000 0x04000000
233 3 0 0xc0000000 0x00100000
234 >; /* Overwritten by U-Boot */
235
236 nor_flash@0,0 {
237 compatible = "amd,s29gl256n", "cfi-flash";
238 bank-width = <2>;
239 reg = <0x0 0x000000 0x4000000>;
240 #address-cells = <1>;
241 #size-cells = <1>;
242 partition@0 {
243 label = "kernel";
244 reg = <0x0 0x1e0000>;
245 read-only;
246 };
247 partition@1e0000 {
248 label = "dtb";
249 reg = <0x1e0000 0x20000>;
250 };
251 partition@200000 {
252 label = "root";
253 reg = <0x200000 0x200000>;
254 };
255 partition@400000 {
256 label = "user";
257 reg = <0x400000 0x3b80000>;
258 };
259 partition@3f80000 {
260 label = "env";
261 reg = <0x3f80000 0x40000>;
262 read-only;
263 };
264 partition@3fc0000 {
265 label = "u-boot";
266 reg = <0x3fc0000 0x40000>;
267 read-only;
268 };
269 };
270
271 display@2,0 {
272 compatible = "fujitsu,lime";
273 reg = <2 0x0 0x4000000>;
274 interrupt-parent = <&mpic>;
275 interrupts = <6 1>;
276 };
277
278 fpga_pic: fpga-pic@3,10 {
279 compatible = "abb,socrates-fpga-pic";
280 reg = <3 0x10 0x10>;
281 interrupt-controller;
282 /* IRQs 2, 10, 11, active low, level-sensitive */
283 interrupts = <2 1 10 1 11 1>;
284 interrupt-parent = <&mpic>;
285 #interrupt-cells = <3>;
286 };
287
288 spi@3,60 {
289 compatible = "abb,socrates-spi";
290 reg = <3 0x60 0x10>;
291 interrupts = <8 4 0>; // number, type, routing
292 interrupt-parent = <&fpga_pic>;
293 };
294
295 nand@3,70 {
296 compatible = "abb,socrates-nand";
297 reg = <3 0x70 0x04>;
298 bank-width = <1>;
299 #address-cells = <1>;
300 #size-cells = <1>;
301 data@0 {
302 label = "data";
303 reg = <0x0 0x40000000>;
304 };
305 };
306
307 can@3,100 {
308 compatible = "philips,sja1000";
309 reg = <3 0x100 0x80>;
310 interrupts = <2 8 1>; // number, type, routing
311 interrupt-parent = <&fpga_pic>;
312 };
313 };
314
315 pci0: pci@e0008000 {
316 cell-index = <0>;
317 #interrupt-cells = <1>;
318 #size-cells = <2>;
319 #address-cells = <3>;
320 compatible = "fsl,mpc8540-pci";
321 device_type = "pci";
322 reg = <0xe0008000 0x1000>;
323 clock-frequency = <66666666>;
324
325 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
326 interrupt-map = <
327 /* IDSEL 0x11 */
328 0x8800 0x0 0x0 1 &mpic 5 1
329 /* IDSEL 0x12 */
330 0x9000 0x0 0x0 1 &mpic 4 1>;
331 interrupt-parent = <&mpic>;
332 interrupts = <24 2>;
333 bus-range = <0x0 0x0>;
334 ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000
335 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x01000000>;
336 };
337
338};
diff --git a/arch/powerpc/boot/dts/stx_gp3_8560.dts b/arch/powerpc/boot/dts/stx_gp3_8560.dts
index fff33fe6efc6..8b173957fb5f 100644
--- a/arch/powerpc/boot/dts/stx_gp3_8560.dts
+++ b/arch/powerpc/boot/dts/stx_gp3_8560.dts
@@ -124,66 +124,72 @@
124 }; 124 };
125 }; 125 };
126 126
127 mdio@24520 {
128 #address-cells = <1>;
129 #size-cells = <0>;
130 compatible = "fsl,gianfar-mdio";
131 reg = <0x24520 0x20>;
132
133 phy2: ethernet-phy@2 {
134 interrupt-parent = <&mpic>;
135 interrupts = <5 4>;
136 reg = <2>;
137 device_type = "ethernet-phy";
138 };
139 phy4: ethernet-phy@4 {
140 interrupt-parent = <&mpic>;
141 interrupts = <5 4>;
142 reg = <4>;
143 device_type = "ethernet-phy";
144 };
145 tbi0: tbi-phy@11 {
146 reg = <0x11>;
147 device_type = "tbi-phy";
148 };
149 };
150
151 mdio@25520 {
152 #address-cells = <1>;
153 #size-cells = <0>;
154 compatible = "fsl,gianfar-tbi";
155 reg = <0x25520 0x20>;
156
157 tbi1: tbi-phy@11 {
158 reg = <0x11>;
159 device_type = "tbi-phy";
160 };
161 };
162
163 enet0: ethernet@24000 { 127 enet0: ethernet@24000 {
128 #address-cells = <1>;
129 #size-cells = <1>;
164 cell-index = <0>; 130 cell-index = <0>;
165 device_type = "network"; 131 device_type = "network";
166 model = "TSEC"; 132 model = "TSEC";
167 compatible = "gianfar"; 133 compatible = "gianfar";
168 reg = <0x24000 0x1000>; 134 reg = <0x24000 0x1000>;
135 ranges = <0x0 0x24000 0x1000>;
169 local-mac-address = [ 00 00 00 00 00 00 ]; 136 local-mac-address = [ 00 00 00 00 00 00 ];
170 interrupts = <29 2 30 2 34 2>; 137 interrupts = <29 2 30 2 34 2>;
171 interrupt-parent = <&mpic>; 138 interrupt-parent = <&mpic>;
172 tbi-handle = <&tbi0>; 139 tbi-handle = <&tbi0>;
173 phy-handle = <&phy2>; 140 phy-handle = <&phy2>;
141
142 mdio@520 {
143 #address-cells = <1>;
144 #size-cells = <0>;
145 compatible = "fsl,gianfar-mdio";
146 reg = <0x520 0x20>;
147
148 phy2: ethernet-phy@2 {
149 interrupt-parent = <&mpic>;
150 interrupts = <5 4>;
151 reg = <2>;
152 device_type = "ethernet-phy";
153 };
154 phy4: ethernet-phy@4 {
155 interrupt-parent = <&mpic>;
156 interrupts = <5 4>;
157 reg = <4>;
158 device_type = "ethernet-phy";
159 };
160 tbi0: tbi-phy@11 {
161 reg = <0x11>;
162 device_type = "tbi-phy";
163 };
164 };
174 }; 165 };
175 166
176 enet1: ethernet@25000 { 167 enet1: ethernet@25000 {
168 #address-cells = <1>;
169 #size-cells = <1>;
177 cell-index = <1>; 170 cell-index = <1>;
178 device_type = "network"; 171 device_type = "network";
179 model = "TSEC"; 172 model = "TSEC";
180 compatible = "gianfar"; 173 compatible = "gianfar";
181 reg = <0x25000 0x1000>; 174 reg = <0x25000 0x1000>;
175 ranges = <0x0 0x25000 0x1000>;
182 local-mac-address = [ 00 00 00 00 00 00 ]; 176 local-mac-address = [ 00 00 00 00 00 00 ];
183 interrupts = <35 2 36 2 40 2>; 177 interrupts = <35 2 36 2 40 2>;
184 interrupt-parent = <&mpic>; 178 interrupt-parent = <&mpic>;
185 tbi-handle = <&tbi1>; 179 tbi-handle = <&tbi1>;
186 phy-handle = <&phy4>; 180 phy-handle = <&phy4>;
181
182 mdio@520 {
183 #address-cells = <1>;
184 #size-cells = <0>;
185 compatible = "fsl,gianfar-tbi";
186 reg = <0x520 0x20>;
187
188 tbi1: tbi-phy@11 {
189 reg = <0x11>;
190 device_type = "tbi-phy";
191 };
192 };
187 }; 193 };
188 194
189 mpic: pic@40000 { 195 mpic: pic@40000 {
diff --git a/arch/powerpc/boot/dts/tqm5200.dts b/arch/powerpc/boot/dts/tqm5200.dts
index 906302e26a62..c9590b58b7b0 100644
--- a/arch/powerpc/boot/dts/tqm5200.dts
+++ b/arch/powerpc/boot/dts/tqm5200.dts
@@ -17,6 +17,7 @@
17 compatible = "tqc,tqm5200"; 17 compatible = "tqc,tqm5200";
18 #address-cells = <1>; 18 #address-cells = <1>;
19 #size-cells = <1>; 19 #size-cells = <1>;
20 interrupt-parent = <&mpc5200_pic>;
20 21
21 cpus { 22 cpus {
22 #address-cells = <1>; 23 #address-cells = <1>;
@@ -66,36 +67,33 @@
66 compatible = "fsl,mpc5200-gpt"; 67 compatible = "fsl,mpc5200-gpt";
67 reg = <0x600 0x10>; 68 reg = <0x600 0x10>;
68 interrupts = <1 9 0>; 69 interrupts = <1 9 0>;
69 interrupt-parent = <&mpc5200_pic>;
70 fsl,has-wdt; 70 fsl,has-wdt;
71 }; 71 };
72 72
73 can@900 { 73 can@900 {
74 compatible = "fsl,mpc5200-mscan"; 74 compatible = "fsl,mpc5200-mscan";
75 interrupts = <2 17 0>; 75 interrupts = <2 17 0>;
76 interrupt-parent = <&mpc5200_pic>;
77 reg = <0x900 0x80>; 76 reg = <0x900 0x80>;
78 }; 77 };
79 78
80 can@980 { 79 can@980 {
81 compatible = "fsl,mpc5200-mscan"; 80 compatible = "fsl,mpc5200-mscan";
82 interrupts = <2 18 0>; 81 interrupts = <2 18 0>;
83 interrupt-parent = <&mpc5200_pic>;
84 reg = <0x980 0x80>; 82 reg = <0x980 0x80>;
85 }; 83 };
86 84
87 gpio@b00 { 85 gpio_simple: gpio@b00 {
88 compatible = "fsl,mpc5200-gpio"; 86 compatible = "fsl,mpc5200-gpio";
89 reg = <0xb00 0x40>; 87 reg = <0xb00 0x40>;
90 interrupts = <1 7 0>; 88 interrupts = <1 7 0>;
91 interrupt-parent = <&mpc5200_pic>; 89 gpio-controller;
90 #gpio-cells = <2>;
92 }; 91 };
93 92
94 usb@1000 { 93 usb@1000 {
95 compatible = "fsl,mpc5200-ohci","ohci-be"; 94 compatible = "fsl,mpc5200-ohci","ohci-be";
96 reg = <0x1000 0xff>; 95 reg = <0x1000 0xff>;
97 interrupts = <2 6 0>; 96 interrupts = <2 6 0>;
98 interrupt-parent = <&mpc5200_pic>;
99 }; 97 };
100 98
101 dma-controller@1200 { 99 dma-controller@1200 {
@@ -105,7 +103,6 @@
105 3 4 0 3 5 0 3 6 0 3 7 0 103 3 4 0 3 5 0 3 6 0 3 7 0
106 3 8 0 3 9 0 3 10 0 3 11 0 104 3 8 0 3 9 0 3 10 0 3 11 0
107 3 12 0 3 13 0 3 14 0 3 15 0>; 105 3 12 0 3 13 0 3 14 0 3 15 0>;
108 interrupt-parent = <&mpc5200_pic>;
109 }; 106 };
110 107
111 xlb@1f00 { 108 xlb@1f00 {
@@ -114,39 +111,28 @@
114 }; 111 };
115 112
116 serial@2000 { // PSC1 113 serial@2000 { // PSC1
117 device_type = "serial";
118 compatible = "fsl,mpc5200-psc-uart"; 114 compatible = "fsl,mpc5200-psc-uart";
119 port-number = <0>; // Logical port assignment
120 reg = <0x2000 0x100>; 115 reg = <0x2000 0x100>;
121 interrupts = <2 1 0>; 116 interrupts = <2 1 0>;
122 interrupt-parent = <&mpc5200_pic>;
123 }; 117 };
124 118
125 serial@2200 { // PSC2 119 serial@2200 { // PSC2
126 device_type = "serial";
127 compatible = "fsl,mpc5200-psc-uart"; 120 compatible = "fsl,mpc5200-psc-uart";
128 port-number = <1>; // Logical port assignment
129 reg = <0x2200 0x100>; 121 reg = <0x2200 0x100>;
130 interrupts = <2 2 0>; 122 interrupts = <2 2 0>;
131 interrupt-parent = <&mpc5200_pic>;
132 }; 123 };
133 124
134 serial@2400 { // PSC3 125 serial@2400 { // PSC3
135 device_type = "serial";
136 compatible = "fsl,mpc5200-psc-uart"; 126 compatible = "fsl,mpc5200-psc-uart";
137 port-number = <2>; // Logical port assignment
138 reg = <0x2400 0x100>; 127 reg = <0x2400 0x100>;
139 interrupts = <2 3 0>; 128 interrupts = <2 3 0>;
140 interrupt-parent = <&mpc5200_pic>;
141 }; 129 };
142 130
143 ethernet@3000 { 131 ethernet@3000 {
144 device_type = "network";
145 compatible = "fsl,mpc5200-fec"; 132 compatible = "fsl,mpc5200-fec";
146 reg = <0x3000 0x400>; 133 reg = <0x3000 0x400>;
147 local-mac-address = [ 00 00 00 00 00 00 ]; 134 local-mac-address = [ 00 00 00 00 00 00 ];
148 interrupts = <2 5 0>; 135 interrupts = <2 5 0>;
149 interrupt-parent = <&mpc5200_pic>;
150 phy-handle = <&phy0>; 136 phy-handle = <&phy0>;
151 }; 137 };
152 138
@@ -156,10 +142,8 @@
156 compatible = "fsl,mpc5200-mdio"; 142 compatible = "fsl,mpc5200-mdio";
157 reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts 143 reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
158 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. 144 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
159 interrupt-parent = <&mpc5200_pic>;
160 145
161 phy0: ethernet-phy@0 { 146 phy0: ethernet-phy@0 {
162 device_type = "ethernet-phy";
163 reg = <0>; 147 reg = <0>;
164 }; 148 };
165 }; 149 };
@@ -168,7 +152,6 @@
168 compatible = "fsl,mpc5200-ata"; 152 compatible = "fsl,mpc5200-ata";
169 reg = <0x3a00 0x100>; 153 reg = <0x3a00 0x100>;
170 interrupts = <2 7 0>; 154 interrupts = <2 7 0>;
171 interrupt-parent = <&mpc5200_pic>;
172 }; 155 };
173 156
174 i2c@3d40 { 157 i2c@3d40 {
@@ -177,7 +160,6 @@
177 compatible = "fsl,mpc5200-i2c","fsl-i2c"; 160 compatible = "fsl,mpc5200-i2c","fsl-i2c";
178 reg = <0x3d40 0x40>; 161 reg = <0x3d40 0x40>;
179 interrupts = <2 16 0>; 162 interrupts = <2 16 0>;
180 interrupt-parent = <&mpc5200_pic>;
181 fsl5200-clocking; 163 fsl5200-clocking;
182 164
183 rtc@68 { 165 rtc@68 {
@@ -192,9 +174,8 @@
192 }; 174 };
193 }; 175 };
194 176
195 lpb { 177 localbus {
196 model = "fsl,lpb"; 178 compatible = "fsl,mpc5200-lpb","simple-bus";
197 compatible = "fsl,lpb";
198 #address-cells = <2>; 179 #address-cells = <2>;
199 #size-cells = <1>; 180 #size-cells = <1>;
200 ranges = <0 0 0xfc000000 0x02000000>; 181 ranges = <0 0 0xfc000000 0x02000000>;
@@ -223,7 +204,6 @@
223 0xc000 0 0 4 &mpc5200_pic 0 0 3>; 204 0xc000 0 0 4 &mpc5200_pic 0 0 3>;
224 clock-frequency = <0>; // From boot loader 205 clock-frequency = <0>; // From boot loader
225 interrupts = <2 8 0 2 9 0 2 10 0>; 206 interrupts = <2 8 0 2 9 0 2 10 0>;
226 interrupt-parent = <&mpc5200_pic>;
227 bus-range = <0 0>; 207 bus-range = <0 0>;
228 ranges = <0x42000000 0 0x80000000 0x80000000 0 0x10000000 208 ranges = <0x42000000 0 0x80000000 0x80000000 0 0x10000000
229 0x02000000 0 0x90000000 0x90000000 0 0x10000000 209 0x02000000 0 0x90000000 0x90000000 0 0x10000000
diff --git a/arch/powerpc/boot/dts/tqm8540.dts b/arch/powerpc/boot/dts/tqm8540.dts
index a693f01c21aa..ac9413a29f9f 100644
--- a/arch/powerpc/boot/dts/tqm8540.dts
+++ b/arch/powerpc/boot/dts/tqm8540.dts
@@ -84,6 +84,11 @@
84 interrupt-parent = <&mpic>; 84 interrupt-parent = <&mpic>;
85 dfsrr; 85 dfsrr;
86 86
87 dtt@50 {
88 compatible = "national,lm75";
89 reg = <0x50>;
90 };
91
87 rtc@68 { 92 rtc@68 {
88 compatible = "dallas,ds1337"; 93 compatible = "dallas,ds1337";
89 reg = <0x68>; 94 reg = <0x68>;
@@ -131,94 +136,103 @@
131 }; 136 };
132 }; 137 };
133 138
134 mdio@24520 {
135 #address-cells = <1>;
136 #size-cells = <0>;
137 compatible = "fsl,gianfar-mdio";
138 reg = <0x24520 0x20>;
139
140 phy1: ethernet-phy@1 {
141 interrupt-parent = <&mpic>;
142 interrupts = <8 1>;
143 reg = <1>;
144 device_type = "ethernet-phy";
145 };
146 phy2: ethernet-phy@2 {
147 interrupt-parent = <&mpic>;
148 interrupts = <8 1>;
149 reg = <2>;
150 device_type = "ethernet-phy";
151 };
152 phy3: ethernet-phy@3 {
153 interrupt-parent = <&mpic>;
154 interrupts = <8 1>;
155 reg = <3>;
156 device_type = "ethernet-phy";
157 };
158 tbi0: tbi-phy@11 {
159 reg = <0x11>;
160 device_type = "tbi-phy";
161 };
162 };
163
164 mdio@25520 {
165 #address-cells = <1>;
166 #size-cells = <0>;
167 compatible = "fsl,gianfar-tbi";
168 reg = <0x25520 0x20>;
169
170 tbi1: tbi-phy@11 {
171 reg = <0x11>;
172 device_type = "tbi-phy";
173 };
174 };
175
176 mdio@26520 {
177 #address-cells = <1>;
178 #size-cells = <0>;
179 compatible = "fsl,gianfar-tbi";
180 reg = <0x26520 0x20>;
181
182 tbi2: tbi-phy@11 {
183 reg = <0x11>;
184 device_type = "tbi-phy";
185 };
186 };
187
188 enet0: ethernet@24000 { 139 enet0: ethernet@24000 {
140 #address-cells = <1>;
141 #size-cells = <1>;
189 cell-index = <0>; 142 cell-index = <0>;
190 device_type = "network"; 143 device_type = "network";
191 model = "TSEC"; 144 model = "TSEC";
192 compatible = "gianfar"; 145 compatible = "gianfar";
193 reg = <0x24000 0x1000>; 146 reg = <0x24000 0x1000>;
147 ranges = <0x0 0x24000 0x1000>;
194 local-mac-address = [ 00 00 00 00 00 00 ]; 148 local-mac-address = [ 00 00 00 00 00 00 ];
195 interrupts = <29 2 30 2 34 2>; 149 interrupts = <29 2 30 2 34 2>;
196 interrupt-parent = <&mpic>; 150 interrupt-parent = <&mpic>;
197 phy-handle = <&phy2>; 151 phy-handle = <&phy2>;
152
153 mdio@520 {
154 #address-cells = <1>;
155 #size-cells = <0>;
156 compatible = "fsl,gianfar-mdio";
157 reg = <0x520 0x20>;
158
159 phy1: ethernet-phy@1 {
160 interrupt-parent = <&mpic>;
161 interrupts = <8 1>;
162 reg = <1>;
163 device_type = "ethernet-phy";
164 };
165 phy2: ethernet-phy@2 {
166 interrupt-parent = <&mpic>;
167 interrupts = <8 1>;
168 reg = <2>;
169 device_type = "ethernet-phy";
170 };
171 phy3: ethernet-phy@3 {
172 interrupt-parent = <&mpic>;
173 interrupts = <8 1>;
174 reg = <3>;
175 device_type = "ethernet-phy";
176 };
177 tbi0: tbi-phy@11 {
178 reg = <0x11>;
179 device_type = "tbi-phy";
180 };
181 };
198 }; 182 };
199 183
200 enet1: ethernet@25000 { 184 enet1: ethernet@25000 {
185 #address-cells = <1>;
186 #size-cells = <1>;
201 cell-index = <1>; 187 cell-index = <1>;
202 device_type = "network"; 188 device_type = "network";
203 model = "TSEC"; 189 model = "TSEC";
204 compatible = "gianfar"; 190 compatible = "gianfar";
205 reg = <0x25000 0x1000>; 191 reg = <0x25000 0x1000>;
192 ranges = <0x0 0x25000 0x1000>;
206 local-mac-address = [ 00 00 00 00 00 00 ]; 193 local-mac-address = [ 00 00 00 00 00 00 ];
207 interrupts = <35 2 36 2 40 2>; 194 interrupts = <35 2 36 2 40 2>;
208 interrupt-parent = <&mpic>; 195 interrupt-parent = <&mpic>;
209 phy-handle = <&phy1>; 196 phy-handle = <&phy1>;
197
198 mdio@520 {
199 #address-cells = <1>;
200 #size-cells = <0>;
201 compatible = "fsl,gianfar-tbi";
202 reg = <0x520 0x20>;
203
204 tbi1: tbi-phy@11 {
205 reg = <0x11>;
206 device_type = "tbi-phy";
207 };
208 };
210 }; 209 };
211 210
212 enet2: ethernet@26000 { 211 enet2: ethernet@26000 {
212 #address-cells = <1>;
213 #size-cells = <1>;
213 cell-index = <2>; 214 cell-index = <2>;
214 device_type = "network"; 215 device_type = "network";
215 model = "FEC"; 216 model = "FEC";
216 compatible = "gianfar"; 217 compatible = "gianfar";
217 reg = <0x26000 0x1000>; 218 reg = <0x26000 0x1000>;
219 ranges = <0x0 0x26000 0x1000>;
218 local-mac-address = [ 00 00 00 00 00 00 ]; 220 local-mac-address = [ 00 00 00 00 00 00 ];
219 interrupts = <41 2>; 221 interrupts = <41 2>;
220 interrupt-parent = <&mpic>; 222 interrupt-parent = <&mpic>;
221 phy-handle = <&phy3>; 223 phy-handle = <&phy3>;
224
225 mdio@520 {
226 #address-cells = <1>;
227 #size-cells = <0>;
228 compatible = "fsl,gianfar-tbi";
229 reg = <0x520 0x20>;
230
231 tbi2: tbi-phy@11 {
232 reg = <0x11>;
233 device_type = "tbi-phy";
234 };
235 };
222 }; 236 };
223 237
224 serial0: serial@4500 { 238 serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/tqm8541.dts b/arch/powerpc/boot/dts/tqm8541.dts
index 9e3f5f0dde20..c71bb5dd5e5e 100644
--- a/arch/powerpc/boot/dts/tqm8541.dts
+++ b/arch/powerpc/boot/dts/tqm8541.dts
@@ -83,6 +83,11 @@
83 interrupt-parent = <&mpic>; 83 interrupt-parent = <&mpic>;
84 dfsrr; 84 dfsrr;
85 85
86 dtt@50 {
87 compatible = "national,lm75";
88 reg = <0x50>;
89 };
90
86 rtc@68 { 91 rtc@68 {
87 compatible = "dallas,ds1337"; 92 compatible = "dallas,ds1337";
88 reg = <0x68>; 93 reg = <0x68>;
@@ -130,72 +135,78 @@
130 }; 135 };
131 }; 136 };
132 137
133 mdio@24520 {
134 #address-cells = <1>;
135 #size-cells = <0>;
136 compatible = "fsl,gianfar-mdio";
137 reg = <0x24520 0x20>;
138
139 phy1: ethernet-phy@1 {
140 interrupt-parent = <&mpic>;
141 interrupts = <8 1>;
142 reg = <1>;
143 device_type = "ethernet-phy";
144 };
145 phy2: ethernet-phy@2 {
146 interrupt-parent = <&mpic>;
147 interrupts = <8 1>;
148 reg = <2>;
149 device_type = "ethernet-phy";
150 };
151 phy3: ethernet-phy@3 {
152 interrupt-parent = <&mpic>;
153 interrupts = <8 1>;
154 reg = <3>;
155 device_type = "ethernet-phy";
156 };
157 tbi0: tbi-phy@11 {
158 reg = <0x11>;
159 device_type = "tbi-phy";
160 };
161 };
162
163 mdio@25520 {
164 #address-cells = <1>;
165 #size-cells = <0>;
166 compatible = "fsl,gianfar-tbi";
167 reg = <0x25520 0x20>;
168
169 tbi1: tbi-phy@11 {
170 reg = <0x11>;
171 device_type = "tbi-phy";
172 };
173 };
174
175 enet0: ethernet@24000 { 138 enet0: ethernet@24000 {
139 #address-cells = <1>;
140 #size-cells = <1>;
176 cell-index = <0>; 141 cell-index = <0>;
177 device_type = "network"; 142 device_type = "network";
178 model = "TSEC"; 143 model = "TSEC";
179 compatible = "gianfar"; 144 compatible = "gianfar";
180 reg = <0x24000 0x1000>; 145 reg = <0x24000 0x1000>;
146 ranges = <0x0 0x24000 0x1000>;
181 local-mac-address = [ 00 00 00 00 00 00 ]; 147 local-mac-address = [ 00 00 00 00 00 00 ];
182 interrupts = <29 2 30 2 34 2>; 148 interrupts = <29 2 30 2 34 2>;
183 interrupt-parent = <&mpic>; 149 interrupt-parent = <&mpic>;
184 tbi-handle = <&tbi0>; 150 tbi-handle = <&tbi0>;
185 phy-handle = <&phy2>; 151 phy-handle = <&phy2>;
152
153 mdio@520 {
154 #address-cells = <1>;
155 #size-cells = <0>;
156 compatible = "fsl,gianfar-mdio";
157 reg = <0x520 0x20>;
158
159 phy1: ethernet-phy@1 {
160 interrupt-parent = <&mpic>;
161 interrupts = <8 1>;
162 reg = <1>;
163 device_type = "ethernet-phy";
164 };
165 phy2: ethernet-phy@2 {
166 interrupt-parent = <&mpic>;
167 interrupts = <8 1>;
168 reg = <2>;
169 device_type = "ethernet-phy";
170 };
171 phy3: ethernet-phy@3 {
172 interrupt-parent = <&mpic>;
173 interrupts = <8 1>;
174 reg = <3>;
175 device_type = "ethernet-phy";
176 };
177 tbi0: tbi-phy@11 {
178 reg = <0x11>;
179 device_type = "tbi-phy";
180 };
181 };
186 }; 182 };
187 183
188 enet1: ethernet@25000 { 184 enet1: ethernet@25000 {
185 #address-cells = <1>;
186 #size-cells = <1>;
189 cell-index = <1>; 187 cell-index = <1>;
190 device_type = "network"; 188 device_type = "network";
191 model = "TSEC"; 189 model = "TSEC";
192 compatible = "gianfar"; 190 compatible = "gianfar";
193 reg = <0x25000 0x1000>; 191 reg = <0x25000 0x1000>;
192 ranges = <0x0 0x25000 0x1000>;
194 local-mac-address = [ 00 00 00 00 00 00 ]; 193 local-mac-address = [ 00 00 00 00 00 00 ];
195 interrupts = <35 2 36 2 40 2>; 194 interrupts = <35 2 36 2 40 2>;
196 interrupt-parent = <&mpic>; 195 interrupt-parent = <&mpic>;
197 tbi-handle = <&tbi1>; 196 tbi-handle = <&tbi1>;
198 phy-handle = <&phy1>; 197 phy-handle = <&phy1>;
198
199 mdio@520 {
200 #address-cells = <1>;
201 #size-cells = <0>;
202 compatible = "fsl,gianfar-tbi";
203 reg = <0x520 0x20>;
204
205 tbi1: tbi-phy@11 {
206 reg = <0x11>;
207 device_type = "tbi-phy";
208 };
209 };
199 }; 210 };
200 211
201 serial0: serial@4500 { 212 serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/tqm8548-bigflash.dts b/arch/powerpc/boot/dts/tqm8548-bigflash.dts
index 15086eb65c50..28b1a95257cd 100644
--- a/arch/powerpc/boot/dts/tqm8548-bigflash.dts
+++ b/arch/powerpc/boot/dts/tqm8548-bigflash.dts
@@ -85,6 +85,11 @@
85 interrupt-parent = <&mpic>; 85 interrupt-parent = <&mpic>;
86 dfsrr; 86 dfsrr;
87 87
88 dtt@50 {
89 compatible = "national,lm75";
90 reg = <0x50>;
91 };
92
88 rtc@68 { 93 rtc@68 {
89 compatible = "dallas,ds1337"; 94 compatible = "dallas,ds1337";
90 reg = <0x68>; 95 reg = <0x68>;
@@ -143,134 +148,146 @@
143 }; 148 };
144 }; 149 };
145 150
146 mdio@24520 {
147 #address-cells = <1>;
148 #size-cells = <0>;
149 compatible = "fsl,gianfar-mdio";
150 reg = <0x24520 0x20>;
151
152 phy1: ethernet-phy@0 {
153 interrupt-parent = <&mpic>;
154 interrupts = <8 1>;
155 reg = <1>;
156 device_type = "ethernet-phy";
157 };
158 phy2: ethernet-phy@1 {
159 interrupt-parent = <&mpic>;
160 interrupts = <8 1>;
161 reg = <2>;
162 device_type = "ethernet-phy";
163 };
164 phy3: ethernet-phy@3 {
165 interrupt-parent = <&mpic>;
166 interrupts = <8 1>;
167 reg = <3>;
168 device_type = "ethernet-phy";
169 };
170 phy4: ethernet-phy@4 {
171 interrupt-parent = <&mpic>;
172 interrupts = <8 1>;
173 reg = <4>;
174 device_type = "ethernet-phy";
175 };
176 phy5: ethernet-phy@5 {
177 interrupt-parent = <&mpic>;
178 interrupts = <8 1>;
179 reg = <5>;
180 device_type = "ethernet-phy";
181 };
182 tbi0: tbi-phy@11 {
183 reg = <0x11>;
184 device_type = "tbi-phy";
185 };
186 };
187
188 mdio@25520 {
189 #address-cells = <1>;
190 #size-cells = <0>;
191 compatible = "fsl,gianfar-tbi";
192 reg = <0x25520 0x20>;
193
194 tbi1: tbi-phy@11 {
195 reg = <0x11>;
196 device_type = "tbi-phy";
197 };
198 };
199
200 mdio@26520 {
201 #address-cells = <1>;
202 #size-cells = <0>;
203 compatible = "fsl,gianfar-tbi";
204 reg = <0x26520 0x20>;
205
206 tbi2: tbi-phy@11 {
207 reg = <0x11>;
208 device_type = "tbi-phy";
209 };
210 };
211
212 mdio@27520 {
213 #address-cells = <1>;
214 #size-cells = <0>;
215 compatible = "fsl,gianfar-tbi";
216 reg = <0x27520 0x20>;
217
218 tbi3: tbi-phy@11 {
219 reg = <0x11>;
220 device_type = "tbi-phy";
221 };
222 };
223
224 enet0: ethernet@24000 { 151 enet0: ethernet@24000 {
152 #address-cells = <1>;
153 #size-cells = <1>;
225 cell-index = <0>; 154 cell-index = <0>;
226 device_type = "network"; 155 device_type = "network";
227 model = "eTSEC"; 156 model = "eTSEC";
228 compatible = "gianfar"; 157 compatible = "gianfar";
229 reg = <0x24000 0x1000>; 158 reg = <0x24000 0x1000>;
159 ranges = <0x0 0x24000 0x1000>;
230 local-mac-address = [ 00 00 00 00 00 00 ]; 160 local-mac-address = [ 00 00 00 00 00 00 ];
231 interrupts = <29 2 30 2 34 2>; 161 interrupts = <29 2 30 2 34 2>;
232 interrupt-parent = <&mpic>; 162 interrupt-parent = <&mpic>;
233 tbi-handle = <&tbi0>; 163 tbi-handle = <&tbi0>;
234 phy-handle = <&phy2>; 164 phy-handle = <&phy2>;
165
166 mdio@520 {
167 #address-cells = <1>;
168 #size-cells = <0>;
169 compatible = "fsl,gianfar-mdio";
170 reg = <0x520 0x20>;
171
172 phy1: ethernet-phy@0 {
173 interrupt-parent = <&mpic>;
174 interrupts = <8 1>;
175 reg = <1>;
176 device_type = "ethernet-phy";
177 };
178 phy2: ethernet-phy@1 {
179 interrupt-parent = <&mpic>;
180 interrupts = <8 1>;
181 reg = <2>;
182 device_type = "ethernet-phy";
183 };
184 phy3: ethernet-phy@3 {
185 interrupt-parent = <&mpic>;
186 interrupts = <8 1>;
187 reg = <3>;
188 device_type = "ethernet-phy";
189 };
190 phy4: ethernet-phy@4 {
191 interrupt-parent = <&mpic>;
192 interrupts = <8 1>;
193 reg = <4>;
194 device_type = "ethernet-phy";
195 };
196 phy5: ethernet-phy@5 {
197 interrupt-parent = <&mpic>;
198 interrupts = <8 1>;
199 reg = <5>;
200 device_type = "ethernet-phy";
201 };
202 tbi0: tbi-phy@11 {
203 reg = <0x11>;
204 device_type = "tbi-phy";
205 };
206 };
235 }; 207 };
236 208
237 enet1: ethernet@25000 { 209 enet1: ethernet@25000 {
210 #address-cells = <1>;
211 #size-cells = <1>;
238 cell-index = <1>; 212 cell-index = <1>;
239 device_type = "network"; 213 device_type = "network";
240 model = "eTSEC"; 214 model = "eTSEC";
241 compatible = "gianfar"; 215 compatible = "gianfar";
242 reg = <0x25000 0x1000>; 216 reg = <0x25000 0x1000>;
217 ranges = <0x0 0x25000 0x1000>;
243 local-mac-address = [ 00 00 00 00 00 00 ]; 218 local-mac-address = [ 00 00 00 00 00 00 ];
244 interrupts = <35 2 36 2 40 2>; 219 interrupts = <35 2 36 2 40 2>;
245 interrupt-parent = <&mpic>; 220 interrupt-parent = <&mpic>;
246 tbi-handle = <&tbi1>; 221 tbi-handle = <&tbi1>;
247 phy-handle = <&phy1>; 222 phy-handle = <&phy1>;
223
224 mdio@520 {
225 #address-cells = <1>;
226 #size-cells = <0>;
227 compatible = "fsl,gianfar-tbi";
228 reg = <0x520 0x20>;
229
230 tbi1: tbi-phy@11 {
231 reg = <0x11>;
232 device_type = "tbi-phy";
233 };
234 };
248 }; 235 };
249 236
250 enet2: ethernet@26000 { 237 enet2: ethernet@26000 {
238 #address-cells = <1>;
239 #size-cells = <1>;
251 cell-index = <2>; 240 cell-index = <2>;
252 device_type = "network"; 241 device_type = "network";
253 model = "eTSEC"; 242 model = "eTSEC";
254 compatible = "gianfar"; 243 compatible = "gianfar";
255 reg = <0x26000 0x1000>; 244 reg = <0x26000 0x1000>;
245 ranges = <0x0 0x26000 0x1000>;
256 local-mac-address = [ 00 00 00 00 00 00 ]; 246 local-mac-address = [ 00 00 00 00 00 00 ];
257 interrupts = <31 2 32 2 33 2>; 247 interrupts = <31 2 32 2 33 2>;
258 interrupt-parent = <&mpic>; 248 interrupt-parent = <&mpic>;
259 tbi-handle = <&tbi2>; 249 tbi-handle = <&tbi2>;
260 phy-handle = <&phy3>; 250 phy-handle = <&phy3>;
251
252 mdio@520 {
253 #address-cells = <1>;
254 #size-cells = <0>;
255 compatible = "fsl,gianfar-tbi";
256 reg = <0x520 0x20>;
257
258 tbi2: tbi-phy@11 {
259 reg = <0x11>;
260 device_type = "tbi-phy";
261 };
262 };
261 }; 263 };
262 264
263 enet3: ethernet@27000 { 265 enet3: ethernet@27000 {
266 #address-cells = <1>;
267 #size-cells = <1>;
264 cell-index = <3>; 268 cell-index = <3>;
265 device_type = "network"; 269 device_type = "network";
266 model = "eTSEC"; 270 model = "eTSEC";
267 compatible = "gianfar"; 271 compatible = "gianfar";
268 reg = <0x27000 0x1000>; 272 reg = <0x27000 0x1000>;
273 ranges = <0x0 0x27000 0x1000>;
269 local-mac-address = [ 00 00 00 00 00 00 ]; 274 local-mac-address = [ 00 00 00 00 00 00 ];
270 interrupts = <37 2 38 2 39 2>; 275 interrupts = <37 2 38 2 39 2>;
271 interrupt-parent = <&mpic>; 276 interrupt-parent = <&mpic>;
272 tbi-handle = <&tbi3>; 277 tbi-handle = <&tbi3>;
273 phy-handle = <&phy4>; 278 phy-handle = <&phy4>;
279
280 mdio@520 {
281 #address-cells = <1>;
282 #size-cells = <0>;
283 compatible = "fsl,gianfar-tbi";
284 reg = <0x520 0x20>;
285
286 tbi3: tbi-phy@11 {
287 reg = <0x11>;
288 device_type = "tbi-phy";
289 };
290 };
274 }; 291 };
275 292
276 serial0: serial@4500 { 293 serial0: serial@4500 {
@@ -365,14 +382,14 @@
365 can0@2,0 { 382 can0@2,0 {
366 compatible = "intel,82527"; // Bosch CC770 383 compatible = "intel,82527"; // Bosch CC770
367 reg = <2 0x0 0x100>; 384 reg = <2 0x0 0x100>;
368 interrupts = <4 0>; 385 interrupts = <4 1>;
369 interrupt-parent = <&mpic>; 386 interrupt-parent = <&mpic>;
370 }; 387 };
371 388
372 can1@2,100 { 389 can1@2,100 {
373 compatible = "intel,82527"; // Bosch CC770 390 compatible = "intel,82527"; // Bosch CC770
374 reg = <2 0x100 0x100>; 391 reg = <2 0x100 0x100>;
375 interrupts = <4 0>; 392 interrupts = <4 1>;
376 interrupt-parent = <&mpic>; 393 interrupt-parent = <&mpic>;
377 }; 394 };
378 395
diff --git a/arch/powerpc/boot/dts/tqm8548.dts b/arch/powerpc/boot/dts/tqm8548.dts
index b7b65f5e79b6..826fb622cd3c 100644
--- a/arch/powerpc/boot/dts/tqm8548.dts
+++ b/arch/powerpc/boot/dts/tqm8548.dts
@@ -85,6 +85,11 @@
85 interrupt-parent = <&mpic>; 85 interrupt-parent = <&mpic>;
86 dfsrr; 86 dfsrr;
87 87
88 dtt@50 {
89 compatible = "national,lm75";
90 reg = <0x50>;
91 };
92
88 rtc@68 { 93 rtc@68 {
89 compatible = "dallas,ds1337"; 94 compatible = "dallas,ds1337";
90 reg = <0x68>; 95 reg = <0x68>;
@@ -143,134 +148,146 @@
143 }; 148 };
144 }; 149 };
145 150
146 mdio@24520 {
147 #address-cells = <1>;
148 #size-cells = <0>;
149 compatible = "fsl,gianfar-mdio";
150 reg = <0x24520 0x20>;
151
152 phy1: ethernet-phy@0 {
153 interrupt-parent = <&mpic>;
154 interrupts = <8 1>;
155 reg = <1>;
156 device_type = "ethernet-phy";
157 };
158 phy2: ethernet-phy@1 {
159 interrupt-parent = <&mpic>;
160 interrupts = <8 1>;
161 reg = <2>;
162 device_type = "ethernet-phy";
163 };
164 phy3: ethernet-phy@3 {
165 interrupt-parent = <&mpic>;
166 interrupts = <8 1>;
167 reg = <3>;
168 device_type = "ethernet-phy";
169 };
170 phy4: ethernet-phy@4 {
171 interrupt-parent = <&mpic>;
172 interrupts = <8 1>;
173 reg = <4>;
174 device_type = "ethernet-phy";
175 };
176 phy5: ethernet-phy@5 {
177 interrupt-parent = <&mpic>;
178 interrupts = <8 1>;
179 reg = <5>;
180 device_type = "ethernet-phy";
181 };
182 tbi0: tbi-phy@11 {
183 reg = <0x11>;
184 device_type = "tbi-phy";
185 };
186 };
187
188 mdio@25520 {
189 #address-cells = <1>;
190 #size-cells = <0>;
191 compatible = "fsl,gianfar-tbi";
192 reg = <0x25520 0x20>;
193
194 tbi1: tbi-phy@11 {
195 reg = <0x11>;
196 device_type = "tbi-phy";
197 };
198 };
199
200 mdio@26520 {
201 #address-cells = <1>;
202 #size-cells = <0>;
203 compatible = "fsl,gianfar-tbi";
204 reg = <0x26520 0x20>;
205
206 tbi2: tbi-phy@11 {
207 reg = <0x11>;
208 device_type = "tbi-phy";
209 };
210 };
211
212 mdio@27520 {
213 #address-cells = <1>;
214 #size-cells = <0>;
215 compatible = "fsl,gianfar-tbi";
216 reg = <0x27520 0x20>;
217
218 tbi3: tbi-phy@11 {
219 reg = <0x11>;
220 device_type = "tbi-phy";
221 };
222 };
223
224 enet0: ethernet@24000 { 151 enet0: ethernet@24000 {
152 #address-cells = <1>;
153 #size-cells = <1>;
225 cell-index = <0>; 154 cell-index = <0>;
226 device_type = "network"; 155 device_type = "network";
227 model = "eTSEC"; 156 model = "eTSEC";
228 compatible = "gianfar"; 157 compatible = "gianfar";
229 reg = <0x24000 0x1000>; 158 reg = <0x24000 0x1000>;
159 ranges = <0x0 0x24000 0x1000>;
230 local-mac-address = [ 00 00 00 00 00 00 ]; 160 local-mac-address = [ 00 00 00 00 00 00 ];
231 interrupts = <29 2 30 2 34 2>; 161 interrupts = <29 2 30 2 34 2>;
232 interrupt-parent = <&mpic>; 162 interrupt-parent = <&mpic>;
233 tbi-handle = <&tbi0>; 163 tbi-handle = <&tbi0>;
234 phy-handle = <&phy2>; 164 phy-handle = <&phy2>;
165
166 mdio@520 {
167 #address-cells = <1>;
168 #size-cells = <0>;
169 compatible = "fsl,gianfar-mdio";
170 reg = <0x520 0x20>;
171
172 phy1: ethernet-phy@0 {
173 interrupt-parent = <&mpic>;
174 interrupts = <8 1>;
175 reg = <1>;
176 device_type = "ethernet-phy";
177 };
178 phy2: ethernet-phy@1 {
179 interrupt-parent = <&mpic>;
180 interrupts = <8 1>;
181 reg = <2>;
182 device_type = "ethernet-phy";
183 };
184 phy3: ethernet-phy@3 {
185 interrupt-parent = <&mpic>;
186 interrupts = <8 1>;
187 reg = <3>;
188 device_type = "ethernet-phy";
189 };
190 phy4: ethernet-phy@4 {
191 interrupt-parent = <&mpic>;
192 interrupts = <8 1>;
193 reg = <4>;
194 device_type = "ethernet-phy";
195 };
196 phy5: ethernet-phy@5 {
197 interrupt-parent = <&mpic>;
198 interrupts = <8 1>;
199 reg = <5>;
200 device_type = "ethernet-phy";
201 };
202 tbi0: tbi-phy@11 {
203 reg = <0x11>;
204 device_type = "tbi-phy";
205 };
206 };
235 }; 207 };
236 208
237 enet1: ethernet@25000 { 209 enet1: ethernet@25000 {
210 #address-cells = <1>;
211 #size-cells = <1>;
238 cell-index = <1>; 212 cell-index = <1>;
239 device_type = "network"; 213 device_type = "network";
240 model = "eTSEC"; 214 model = "eTSEC";
241 compatible = "gianfar"; 215 compatible = "gianfar";
242 reg = <0x25000 0x1000>; 216 reg = <0x25000 0x1000>;
217 ranges = <0x0 0x25000 0x1000>;
243 local-mac-address = [ 00 00 00 00 00 00 ]; 218 local-mac-address = [ 00 00 00 00 00 00 ];
244 interrupts = <35 2 36 2 40 2>; 219 interrupts = <35 2 36 2 40 2>;
245 interrupt-parent = <&mpic>; 220 interrupt-parent = <&mpic>;
246 tbi-handle = <&tbi1>; 221 tbi-handle = <&tbi1>;
247 phy-handle = <&phy1>; 222 phy-handle = <&phy1>;
223
224 mdio@520 {
225 #address-cells = <1>;
226 #size-cells = <0>;
227 compatible = "fsl,gianfar-tbi";
228 reg = <0x520 0x20>;
229
230 tbi1: tbi-phy@11 {
231 reg = <0x11>;
232 device_type = "tbi-phy";
233 };
234 };
248 }; 235 };
249 236
250 enet2: ethernet@26000 { 237 enet2: ethernet@26000 {
238 #address-cells = <1>;
239 #size-cells = <1>;
251 cell-index = <2>; 240 cell-index = <2>;
252 device_type = "network"; 241 device_type = "network";
253 model = "eTSEC"; 242 model = "eTSEC";
254 compatible = "gianfar"; 243 compatible = "gianfar";
255 reg = <0x26000 0x1000>; 244 reg = <0x26000 0x1000>;
245 ranges = <0x0 0x26000 0x1000>;
256 local-mac-address = [ 00 00 00 00 00 00 ]; 246 local-mac-address = [ 00 00 00 00 00 00 ];
257 interrupts = <31 2 32 2 33 2>; 247 interrupts = <31 2 32 2 33 2>;
258 interrupt-parent = <&mpic>; 248 interrupt-parent = <&mpic>;
259 tbi-handle = <&tbi2>; 249 tbi-handle = <&tbi2>;
260 phy-handle = <&phy3>; 250 phy-handle = <&phy3>;
251
252 mdio@520 {
253 #address-cells = <1>;
254 #size-cells = <0>;
255 compatible = "fsl,gianfar-tbi";
256 reg = <0x520 0x20>;
257
258 tbi2: tbi-phy@11 {
259 reg = <0x11>;
260 device_type = "tbi-phy";
261 };
262 };
261 }; 263 };
262 264
263 enet3: ethernet@27000 { 265 enet3: ethernet@27000 {
266 #address-cells = <1>;
267 #size-cells = <1>;
264 cell-index = <3>; 268 cell-index = <3>;
265 device_type = "network"; 269 device_type = "network";
266 model = "eTSEC"; 270 model = "eTSEC";
267 compatible = "gianfar"; 271 compatible = "gianfar";
268 reg = <0x27000 0x1000>; 272 reg = <0x27000 0x1000>;
273 ranges = <0x0 0x27000 0x1000>;
269 local-mac-address = [ 00 00 00 00 00 00 ]; 274 local-mac-address = [ 00 00 00 00 00 00 ];
270 interrupts = <37 2 38 2 39 2>; 275 interrupts = <37 2 38 2 39 2>;
271 interrupt-parent = <&mpic>; 276 interrupt-parent = <&mpic>;
272 tbi-handle = <&tbi3>; 277 tbi-handle = <&tbi3>;
273 phy-handle = <&phy4>; 278 phy-handle = <&phy4>;
279
280 mdio@520 {
281 #address-cells = <1>;
282 #size-cells = <0>;
283 compatible = "fsl,gianfar-tbi";
284 reg = <0x520 0x20>;
285
286 tbi3: tbi-phy@11 {
287 reg = <0x11>;
288 device_type = "tbi-phy";
289 };
290 };
274 }; 291 };
275 292
276 serial0: serial@4500 { 293 serial0: serial@4500 {
@@ -365,14 +382,14 @@
365 can0@2,0 { 382 can0@2,0 {
366 compatible = "intel,82527"; // Bosch CC770 383 compatible = "intel,82527"; // Bosch CC770
367 reg = <2 0x0 0x100>; 384 reg = <2 0x0 0x100>;
368 interrupts = <4 0>; 385 interrupts = <4 1>;
369 interrupt-parent = <&mpic>; 386 interrupt-parent = <&mpic>;
370 }; 387 };
371 388
372 can1@2,100 { 389 can1@2,100 {
373 compatible = "intel,82527"; // Bosch CC770 390 compatible = "intel,82527"; // Bosch CC770
374 reg = <2 0x100 0x100>; 391 reg = <2 0x100 0x100>;
375 interrupts = <4 0>; 392 interrupts = <4 1>;
376 interrupt-parent = <&mpic>; 393 interrupt-parent = <&mpic>;
377 }; 394 };
378 395
diff --git a/arch/powerpc/boot/dts/tqm8555.dts b/arch/powerpc/boot/dts/tqm8555.dts
index cf92b4e7945e..a133ded6dddb 100644
--- a/arch/powerpc/boot/dts/tqm8555.dts
+++ b/arch/powerpc/boot/dts/tqm8555.dts
@@ -83,6 +83,11 @@
83 interrupt-parent = <&mpic>; 83 interrupt-parent = <&mpic>;
84 dfsrr; 84 dfsrr;
85 85
86 dtt@50 {
87 compatible = "national,lm75";
88 reg = <0x50>;
89 };
90
86 rtc@68 { 91 rtc@68 {
87 compatible = "dallas,ds1337"; 92 compatible = "dallas,ds1337";
88 reg = <0x68>; 93 reg = <0x68>;
@@ -130,72 +135,78 @@
130 }; 135 };
131 }; 136 };
132 137
133 mdio@24520 {
134 #address-cells = <1>;
135 #size-cells = <0>;
136 compatible = "fsl,gianfar-mdio";
137 reg = <0x24520 0x20>;
138
139 phy1: ethernet-phy@1 {
140 interrupt-parent = <&mpic>;
141 interrupts = <8 1>;
142 reg = <1>;
143 device_type = "ethernet-phy";
144 };
145 phy2: ethernet-phy@2 {
146 interrupt-parent = <&mpic>;
147 interrupts = <8 1>;
148 reg = <2>;
149 device_type = "ethernet-phy";
150 };
151 phy3: ethernet-phy@3 {
152 interrupt-parent = <&mpic>;
153 interrupts = <8 1>;
154 reg = <3>;
155 device_type = "ethernet-phy";
156 };
157 tbi0: tbi-phy@11 {
158 reg = <0x11>;
159 device_type = "tbi-phy";
160 };
161 };
162
163 mdio@25520 {
164 #address-cells = <1>;
165 #size-cells = <0>;
166 compatible = "fsl,gianfar-tbi";
167 reg = <0x25520 0x20>;
168
169 tbi1: tbi-phy@11 {
170 reg = <0x11>;
171 device_type = "tbi-phy";
172 };
173 };
174
175 enet0: ethernet@24000 { 138 enet0: ethernet@24000 {
139 #address-cells = <1>;
140 #size-cells = <1>;
176 cell-index = <0>; 141 cell-index = <0>;
177 device_type = "network"; 142 device_type = "network";
178 model = "TSEC"; 143 model = "TSEC";
179 compatible = "gianfar"; 144 compatible = "gianfar";
180 reg = <0x24000 0x1000>; 145 reg = <0x24000 0x1000>;
146 ranges = <0x0 0x24000 0x1000>;
181 local-mac-address = [ 00 00 00 00 00 00 ]; 147 local-mac-address = [ 00 00 00 00 00 00 ];
182 interrupts = <29 2 30 2 34 2>; 148 interrupts = <29 2 30 2 34 2>;
183 interrupt-parent = <&mpic>; 149 interrupt-parent = <&mpic>;
184 tbi-handle = <&tbi0>; 150 tbi-handle = <&tbi0>;
185 phy-handle = <&phy2>; 151 phy-handle = <&phy2>;
152
153 mdio@520 {
154 #address-cells = <1>;
155 #size-cells = <0>;
156 compatible = "fsl,gianfar-mdio";
157 reg = <0x520 0x20>;
158
159 phy1: ethernet-phy@1 {
160 interrupt-parent = <&mpic>;
161 interrupts = <8 1>;
162 reg = <1>;
163 device_type = "ethernet-phy";
164 };
165 phy2: ethernet-phy@2 {
166 interrupt-parent = <&mpic>;
167 interrupts = <8 1>;
168 reg = <2>;
169 device_type = "ethernet-phy";
170 };
171 phy3: ethernet-phy@3 {
172 interrupt-parent = <&mpic>;
173 interrupts = <8 1>;
174 reg = <3>;
175 device_type = "ethernet-phy";
176 };
177 tbi0: tbi-phy@11 {
178 reg = <0x11>;
179 device_type = "tbi-phy";
180 };
181 };
186 }; 182 };
187 183
188 enet1: ethernet@25000 { 184 enet1: ethernet@25000 {
185 #address-cells = <1>;
186 #size-cells = <1>;
189 cell-index = <1>; 187 cell-index = <1>;
190 device_type = "network"; 188 device_type = "network";
191 model = "TSEC"; 189 model = "TSEC";
192 compatible = "gianfar"; 190 compatible = "gianfar";
193 reg = <0x25000 0x1000>; 191 reg = <0x25000 0x1000>;
192 ranges = <0x0 0x25000 0x1000>;
194 local-mac-address = [ 00 00 00 00 00 00 ]; 193 local-mac-address = [ 00 00 00 00 00 00 ];
195 interrupts = <35 2 36 2 40 2>; 194 interrupts = <35 2 36 2 40 2>;
196 interrupt-parent = <&mpic>; 195 interrupt-parent = <&mpic>;
197 tbi-handle = <&tbi1>; 196 tbi-handle = <&tbi1>;
198 phy-handle = <&phy1>; 197 phy-handle = <&phy1>;
198
199 mdio@520 {
200 #address-cells = <1>;
201 #size-cells = <0>;
202 compatible = "fsl,gianfar-tbi";
203 reg = <0x520 0x20>;
204
205 tbi1: tbi-phy@11 {
206 reg = <0x11>;
207 device_type = "tbi-phy";
208 };
209 };
199 }; 210 };
200 211
201 serial0: serial@4500 { 212 serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/tqm8560.dts b/arch/powerpc/boot/dts/tqm8560.dts
index 9e1ab2d2f669..649e2e576267 100644
--- a/arch/powerpc/boot/dts/tqm8560.dts
+++ b/arch/powerpc/boot/dts/tqm8560.dts
@@ -85,6 +85,11 @@
85 interrupt-parent = <&mpic>; 85 interrupt-parent = <&mpic>;
86 dfsrr; 86 dfsrr;
87 87
88 dtt@50 {
89 compatible = "national,lm75";
90 reg = <0x50>;
91 };
92
88 rtc@68 { 93 rtc@68 {
89 compatible = "dallas,ds1337"; 94 compatible = "dallas,ds1337";
90 reg = <0x68>; 95 reg = <0x68>;
@@ -132,72 +137,78 @@
132 }; 137 };
133 }; 138 };
134 139
135 mdio@24520 {
136 #address-cells = <1>;
137 #size-cells = <0>;
138 compatible = "fsl,gianfar-mdio";
139 reg = <0x24520 0x20>;
140
141 phy1: ethernet-phy@1 {
142 interrupt-parent = <&mpic>;
143 interrupts = <8 1>;
144 reg = <1>;
145 device_type = "ethernet-phy";
146 };
147 phy2: ethernet-phy@2 {
148 interrupt-parent = <&mpic>;
149 interrupts = <8 1>;
150 reg = <2>;
151 device_type = "ethernet-phy";
152 };
153 phy3: ethernet-phy@3 {
154 interrupt-parent = <&mpic>;
155 interrupts = <8 1>;
156 reg = <3>;
157 device_type = "ethernet-phy";
158 };
159 tbi0: tbi-phy@11 {
160 reg = <0x11>;
161 device_type = "tbi-phy";
162 };
163 };
164
165 mdio@25520 {
166 #address-cells = <1>;
167 #size-cells = <0>;
168 compatible = "fsl,gianfar-tbi";
169 reg = <0x25520 0x20>;
170
171 tbi1: tbi-phy@11 {
172 reg = <0x11>;
173 device_type = "tbi-phy";
174 };
175 };
176
177 enet0: ethernet@24000 { 140 enet0: ethernet@24000 {
141 #address-cells = <1>;
142 #size-cells = <1>;
178 cell-index = <0>; 143 cell-index = <0>;
179 device_type = "network"; 144 device_type = "network";
180 model = "TSEC"; 145 model = "TSEC";
181 compatible = "gianfar"; 146 compatible = "gianfar";
182 reg = <0x24000 0x1000>; 147 reg = <0x24000 0x1000>;
148 ranges = <0x0 0x24000 0x1000>;
183 local-mac-address = [ 00 00 00 00 00 00 ]; 149 local-mac-address = [ 00 00 00 00 00 00 ];
184 interrupts = <29 2 30 2 34 2>; 150 interrupts = <29 2 30 2 34 2>;
185 interrupt-parent = <&mpic>; 151 interrupt-parent = <&mpic>;
186 tbi-handle = <&tbi0>; 152 tbi-handle = <&tbi0>;
187 phy-handle = <&phy2>; 153 phy-handle = <&phy2>;
154
155 mdio@520 {
156 #address-cells = <1>;
157 #size-cells = <0>;
158 compatible = "fsl,gianfar-mdio";
159 reg = <0x520 0x20>;
160
161 phy1: ethernet-phy@1 {
162 interrupt-parent = <&mpic>;
163 interrupts = <8 1>;
164 reg = <1>;
165 device_type = "ethernet-phy";
166 };
167 phy2: ethernet-phy@2 {
168 interrupt-parent = <&mpic>;
169 interrupts = <8 1>;
170 reg = <2>;
171 device_type = "ethernet-phy";
172 };
173 phy3: ethernet-phy@3 {
174 interrupt-parent = <&mpic>;
175 interrupts = <8 1>;
176 reg = <3>;
177 device_type = "ethernet-phy";
178 };
179 tbi0: tbi-phy@11 {
180 reg = <0x11>;
181 device_type = "tbi-phy";
182 };
183 };
188 }; 184 };
189 185
190 enet1: ethernet@25000 { 186 enet1: ethernet@25000 {
187 #address-cells = <1>;
188 #size-cells = <1>;
191 cell-index = <1>; 189 cell-index = <1>;
192 device_type = "network"; 190 device_type = "network";
193 model = "TSEC"; 191 model = "TSEC";
194 compatible = "gianfar"; 192 compatible = "gianfar";
195 reg = <0x25000 0x1000>; 193 reg = <0x25000 0x1000>;
194 ranges = <0x0 0x25000 0x1000>;
196 local-mac-address = [ 00 00 00 00 00 00 ]; 195 local-mac-address = [ 00 00 00 00 00 00 ];
197 interrupts = <35 2 36 2 40 2>; 196 interrupts = <35 2 36 2 40 2>;
198 interrupt-parent = <&mpic>; 197 interrupt-parent = <&mpic>;
199 tbi-handle = <&tbi1>; 198 tbi-handle = <&tbi1>;
200 phy-handle = <&phy1>; 199 phy-handle = <&phy1>;
200
201 mdio@520 {
202 #address-cells = <1>;
203 #size-cells = <0>;
204 compatible = "fsl,gianfar-tbi";
205 reg = <0x520 0x20>;
206
207 tbi1: tbi-phy@11 {
208 reg = <0x11>;
209 device_type = "tbi-phy";
210 };
211 };
201 }; 212 };
202 213
203 mpic: pic@40000 { 214 mpic: pic@40000 {
@@ -335,14 +346,14 @@
335 can0@2,0 { 346 can0@2,0 {
336 compatible = "intel,82527"; // Bosch CC770 347 compatible = "intel,82527"; // Bosch CC770
337 reg = <2 0x0 0x100>; 348 reg = <2 0x0 0x100>;
338 interrupts = <4 0>; 349 interrupts = <4 1>;
339 interrupt-parent = <&mpic>; 350 interrupt-parent = <&mpic>;
340 }; 351 };
341 352
342 can1@2,100 { 353 can1@2,100 {
343 compatible = "intel,82527"; // Bosch CC770 354 compatible = "intel,82527"; // Bosch CC770
344 reg = <2 0x100 0x100>; 355 reg = <2 0x100 0x100>;
345 interrupts = <4 0>; 356 interrupts = <4 1>;
346 interrupt-parent = <&mpic>; 357 interrupt-parent = <&mpic>;
347 }; 358 };
348 }; 359 };
diff --git a/arch/powerpc/boot/dts/virtex440-ml507.dts b/arch/powerpc/boot/dts/virtex440-ml507.dts
index dc8e78e2dceb..52d8c1ad26a1 100644
--- a/arch/powerpc/boot/dts/virtex440-ml507.dts
+++ b/arch/powerpc/boot/dts/virtex440-ml507.dts
@@ -7,6 +7,15 @@
7 * This file is licensed under the terms of the GNU General Public License 7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any 8 * version 2. This program is licensed "as is" without any warranty of any
9 * kind, whether express or implied. 9 * kind, whether express or implied.
10 *
11 * ---
12 *
13 * Device Tree Generator version: 1.1
14 *
15 * CAUTION: This file is automatically generated by libgen.
16 * Version: Xilinx EDK 10.1.03 EDK_K_SP3.6
17 *
18 * XPS project directory: ml507_ppc440_emb_ref
10 */ 19 */
11 20
12/dts-v1/; 21/dts-v1/;
@@ -22,8 +31,8 @@
22 reg = < 0 0x10000000 >; 31 reg = < 0 0x10000000 >;
23 } ; 32 } ;
24 chosen { 33 chosen {
25 bootargs = "console=ttyS0 ip=on root=/dev/ram"; 34 bootargs = "console=ttyS0 root=/dev/ram";
26 linux,stdout-path = "/plb@0/serial@83e00000"; 35 linux,stdout-path = &RS232_Uart_1;
27 } ; 36 } ;
28 cpus { 37 cpus {
29 #address-cells = <1>; 38 #address-cells = <1>;
@@ -136,19 +145,19 @@
136 compatible = "xlnx,ll-dma-1.00.a"; 145 compatible = "xlnx,ll-dma-1.00.a";
137 dcr-reg = < 0x80 0x11 >; 146 dcr-reg = < 0x80 0x11 >;
138 interrupt-parent = <&xps_intc_0>; 147 interrupt-parent = <&xps_intc_0>;
139 interrupts = < 9 2 0xa 2 >; 148 interrupts = < 10 2 11 2 >;
140 } ; 149 } ;
141 } ; 150 } ;
142 } ; 151 } ;
143 plb_v46_0: plb@0 { 152 plb_v46_0: plb@0 {
144 #address-cells = <1>; 153 #address-cells = <1>;
145 #size-cells = <1>; 154 #size-cells = <1>;
146 compatible = "xlnx,plb-v46-1.02.a", "simple-bus"; 155 compatible = "xlnx,plb-v46-1.03.a", "simple-bus";
147 ranges ; 156 ranges ;
148 DIP_Switches_8Bit: gpio@81460000 { 157 DIP_Switches_8Bit: gpio@81460000 {
149 compatible = "xlnx,xps-gpio-1.00.a"; 158 compatible = "xlnx,xps-gpio-1.00.a";
150 interrupt-parent = <&xps_intc_0>; 159 interrupt-parent = <&xps_intc_0>;
151 interrupts = < 6 2 >; 160 interrupts = < 7 2 >;
152 reg = < 0x81460000 0x10000 >; 161 reg = < 0x81460000 0x10000 >;
153 xlnx,all-inputs = <1>; 162 xlnx,all-inputs = <1>;
154 xlnx,all-inputs-2 = <0>; 163 xlnx,all-inputs-2 = <0>;
@@ -163,6 +172,86 @@
163 xlnx,tri-default = <0xffffffff>; 172 xlnx,tri-default = <0xffffffff>;
164 xlnx,tri-default-2 = <0xffffffff>; 173 xlnx,tri-default-2 = <0xffffffff>;
165 } ; 174 } ;
175 FLASH: flash@fc000000 {
176 bank-width = <2>;
177 compatible = "xlnx,xps-mch-emc-2.00.a", "cfi-flash";
178 reg = < 0xfc000000 0x2000000 >;
179 xlnx,family = "virtex5";
180 xlnx,include-datawidth-matching-0 = <0x1>;
181 xlnx,include-datawidth-matching-1 = <0x0>;
182 xlnx,include-datawidth-matching-2 = <0x0>;
183 xlnx,include-datawidth-matching-3 = <0x0>;
184 xlnx,include-negedge-ioregs = <0x0>;
185 xlnx,include-plb-ipif = <0x1>;
186 xlnx,include-wrbuf = <0x1>;
187 xlnx,max-mem-width = <0x10>;
188 xlnx,mch-native-dwidth = <0x20>;
189 xlnx,mch-plb-clk-period-ps = <0x2710>;
190 xlnx,mch-splb-awidth = <0x20>;
191 xlnx,mch0-accessbuf-depth = <0x10>;
192 xlnx,mch0-protocol = <0x0>;
193 xlnx,mch0-rddatabuf-depth = <0x10>;
194 xlnx,mch1-accessbuf-depth = <0x10>;
195 xlnx,mch1-protocol = <0x0>;
196 xlnx,mch1-rddatabuf-depth = <0x10>;
197 xlnx,mch2-accessbuf-depth = <0x10>;
198 xlnx,mch2-protocol = <0x0>;
199 xlnx,mch2-rddatabuf-depth = <0x10>;
200 xlnx,mch3-accessbuf-depth = <0x10>;
201 xlnx,mch3-protocol = <0x0>;
202 xlnx,mch3-rddatabuf-depth = <0x10>;
203 xlnx,mem0-width = <0x10>;
204 xlnx,mem1-width = <0x20>;
205 xlnx,mem2-width = <0x20>;
206 xlnx,mem3-width = <0x20>;
207 xlnx,num-banks-mem = <0x1>;
208 xlnx,num-channels = <0x2>;
209 xlnx,priority-mode = <0x0>;
210 xlnx,synch-mem-0 = <0x0>;
211 xlnx,synch-mem-1 = <0x0>;
212 xlnx,synch-mem-2 = <0x0>;
213 xlnx,synch-mem-3 = <0x0>;
214 xlnx,synch-pipedelay-0 = <0x2>;
215 xlnx,synch-pipedelay-1 = <0x2>;
216 xlnx,synch-pipedelay-2 = <0x2>;
217 xlnx,synch-pipedelay-3 = <0x2>;
218 xlnx,tavdv-ps-mem-0 = <0x1adb0>;
219 xlnx,tavdv-ps-mem-1 = <0x3a98>;
220 xlnx,tavdv-ps-mem-2 = <0x3a98>;
221 xlnx,tavdv-ps-mem-3 = <0x3a98>;
222 xlnx,tcedv-ps-mem-0 = <0x1adb0>;
223 xlnx,tcedv-ps-mem-1 = <0x3a98>;
224 xlnx,tcedv-ps-mem-2 = <0x3a98>;
225 xlnx,tcedv-ps-mem-3 = <0x3a98>;
226 xlnx,thzce-ps-mem-0 = <0x88b8>;
227 xlnx,thzce-ps-mem-1 = <0x1b58>;
228 xlnx,thzce-ps-mem-2 = <0x1b58>;
229 xlnx,thzce-ps-mem-3 = <0x1b58>;
230 xlnx,thzoe-ps-mem-0 = <0x1b58>;
231 xlnx,thzoe-ps-mem-1 = <0x1b58>;
232 xlnx,thzoe-ps-mem-2 = <0x1b58>;
233 xlnx,thzoe-ps-mem-3 = <0x1b58>;
234 xlnx,tlzwe-ps-mem-0 = <0x88b8>;
235 xlnx,tlzwe-ps-mem-1 = <0x0>;
236 xlnx,tlzwe-ps-mem-2 = <0x0>;
237 xlnx,tlzwe-ps-mem-3 = <0x0>;
238 xlnx,twc-ps-mem-0 = <0x2af8>;
239 xlnx,twc-ps-mem-1 = <0x3a98>;
240 xlnx,twc-ps-mem-2 = <0x3a98>;
241 xlnx,twc-ps-mem-3 = <0x3a98>;
242 xlnx,twp-ps-mem-0 = <0x11170>;
243 xlnx,twp-ps-mem-1 = <0x2ee0>;
244 xlnx,twp-ps-mem-2 = <0x2ee0>;
245 xlnx,twp-ps-mem-3 = <0x2ee0>;
246 xlnx,xcl0-linesize = <0x4>;
247 xlnx,xcl0-writexfer = <0x1>;
248 xlnx,xcl1-linesize = <0x4>;
249 xlnx,xcl1-writexfer = <0x1>;
250 xlnx,xcl2-linesize = <0x4>;
251 xlnx,xcl2-writexfer = <0x1>;
252 xlnx,xcl3-linesize = <0x4>;
253 xlnx,xcl3-writexfer = <0x1>;
254 } ;
166 Hard_Ethernet_MAC: xps-ll-temac@81c00000 { 255 Hard_Ethernet_MAC: xps-ll-temac@81c00000 {
167 #address-cells = <1>; 256 #address-cells = <1>;
168 #size-cells = <1>; 257 #size-cells = <1>;
@@ -185,6 +274,19 @@
185 xlnx,txfifo = <0x1000>; 274 xlnx,txfifo = <0x1000>;
186 } ; 275 } ;
187 } ; 276 } ;
277 IIC_EEPROM: i2c@81600000 {
278 compatible = "xlnx,xps-iic-2.00.a";
279 interrupt-parent = <&xps_intc_0>;
280 interrupts = < 6 2 >;
281 reg = < 0x81600000 0x10000 >;
282 xlnx,clk-freq = <0x5f5e100>;
283 xlnx,family = "virtex5";
284 xlnx,gpo-width = <0x1>;
285 xlnx,iic-freq = <0x186a0>;
286 xlnx,scl-inertial-delay = <0x0>;
287 xlnx,sda-inertial-delay = <0x0>;
288 xlnx,ten-bit-adr = <0x0>;
289 } ;
188 LEDs_8Bit: gpio@81400000 { 290 LEDs_8Bit: gpio@81400000 {
189 compatible = "xlnx,xps-gpio-1.00.a"; 291 compatible = "xlnx,xps-gpio-1.00.a";
190 reg = < 0x81400000 0x10000 >; 292 reg = < 0x81400000 0x10000 >;
@@ -220,7 +322,7 @@
220 Push_Buttons_5Bit: gpio@81440000 { 322 Push_Buttons_5Bit: gpio@81440000 {
221 compatible = "xlnx,xps-gpio-1.00.a"; 323 compatible = "xlnx,xps-gpio-1.00.a";
222 interrupt-parent = <&xps_intc_0>; 324 interrupt-parent = <&xps_intc_0>;
223 interrupts = < 7 2 >; 325 interrupts = < 8 2 >;
224 reg = < 0x81440000 0x10000 >; 326 reg = < 0x81440000 0x10000 >;
225 xlnx,all-inputs = <1>; 327 xlnx,all-inputs = <1>;
226 xlnx,all-inputs-2 = <0>; 328 xlnx,all-inputs-2 = <0>;
@@ -237,13 +339,13 @@
237 } ; 339 } ;
238 RS232_Uart_1: serial@83e00000 { 340 RS232_Uart_1: serial@83e00000 {
239 clock-frequency = <100000000>; 341 clock-frequency = <100000000>;
240 compatible = "xlnx,xps-uart16550-2.00.a", "ns16550"; 342 compatible = "xlnx,xps-uart16550-2.00.b", "ns16550";
241 current-speed = <0x2580>; 343 current-speed = <9600>;
242 device_type = "serial"; 344 device_type = "serial";
243 interrupt-parent = <&xps_intc_0>; 345 interrupt-parent = <&xps_intc_0>;
244 interrupts = < 8 2 >; 346 interrupts = < 9 2 >;
245 reg = < 0x83e00000 0x10000 >; 347 reg = < 0x83e00000 0x10000 >;
246 reg-offset = <3>; 348 reg-offset = <0x1003>;
247 reg-shift = <2>; 349 reg-shift = <2>;
248 xlnx,family = "virtex5"; 350 xlnx,family = "virtex5";
249 xlnx,has-external-rclk = <0>; 351 xlnx,has-external-rclk = <0>;
@@ -268,7 +370,7 @@
268 compatible = "xlnx,xps-intc-1.00.a"; 370 compatible = "xlnx,xps-intc-1.00.a";
269 interrupt-controller ; 371 interrupt-controller ;
270 reg = < 0x81800000 0x10000 >; 372 reg = < 0x81800000 0x10000 >;
271 xlnx,num-intr-inputs = <0xb>; 373 xlnx,num-intr-inputs = <0xc>;
272 } ; 374 } ;
273 xps_timebase_wdt_1: xps-timebase-wdt@83a00000 { 375 xps_timebase_wdt_1: xps-timebase-wdt@83a00000 {
274 compatible = "xlnx,xps-timebase-wdt-1.00.b"; 376 compatible = "xlnx,xps-timebase-wdt-1.00.b";
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-04 23:14:25 -0400