aboutsummaryrefslogtreecommitdiffstats
path: root/arch/powerpc/boot/dts
diff options
context:
space:
mode:
Diffstat (limited to 'arch/powerpc/boot/dts')
-rw-r--r--arch/powerpc/boot/dts/kuroboxHD.dts18
-rw-r--r--arch/powerpc/boot/dts/kuroboxHG.dts19
-rw-r--r--arch/powerpc/boot/dts/mpc7448hpc2.dts2
-rw-r--r--arch/powerpc/boot/dts/mpc8313erdb.dts2
-rw-r--r--arch/powerpc/boot/dts/mpc832x_mds.dts2
-rw-r--r--arch/powerpc/boot/dts/mpc832x_rdb.dts2
-rw-r--r--arch/powerpc/boot/dts/mpc8349emitx.dts4
-rw-r--r--arch/powerpc/boot/dts/mpc8349emitxgp.dts2
-rw-r--r--arch/powerpc/boot/dts/mpc834x_mds.dts4
-rw-r--r--arch/powerpc/boot/dts/mpc836x_mds.dts2
-rw-r--r--arch/powerpc/boot/dts/mpc8540ads.dts2
-rw-r--r--arch/powerpc/boot/dts/mpc8541cds.dts4
-rw-r--r--arch/powerpc/boot/dts/mpc8544ds.dts219
-rw-r--r--arch/powerpc/boot/dts/mpc8548cds.dts250
-rw-r--r--arch/powerpc/boot/dts/mpc8555cds.dts4
-rw-r--r--arch/powerpc/boot/dts/mpc8560ads.dts2
-rw-r--r--arch/powerpc/boot/dts/mpc8568mds.dts60
-rw-r--r--arch/powerpc/boot/dts/mpc8641_hpcn.dts8
18 files changed, 502 insertions, 104 deletions
diff --git a/arch/powerpc/boot/dts/kuroboxHD.dts b/arch/powerpc/boot/dts/kuroboxHD.dts
index a983680c3263..122537419d9f 100644
--- a/arch/powerpc/boot/dts/kuroboxHD.dts
+++ b/arch/powerpc/boot/dts/kuroboxHD.dts
@@ -33,12 +33,10 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHD.dtb -V 16 kuroboxHD.dts"
33 PowerPC,603e { /* Really 8241 */ 33 PowerPC,603e { /* Really 8241 */
34 device_type = "cpu"; 34 device_type = "cpu";
35 reg = <0>; 35 reg = <0>;
36 clock-frequency = <bebc200>; /* Fixed by bootwrapper */ 36 clock-frequency = <bebc200>; /* Fixed by bootloader */
37 timebase-frequency = <1743000>; /* Fixed by bootwrapper */ 37 timebase-frequency = <1743000>; /* Fixed by bootloader */
38 bus-frequency = <0>; /* From bootloader */ 38 bus-frequency = <0>; /* Fixed by bootloader */
39 /* Following required by dtc but not used */ 39 /* Following required by dtc but not used */
40 i-cache-line-size = <0>;
41 d-cache-line-size = <0>;
42 i-cache-size = <4000>; 40 i-cache-size = <4000>;
43 d-cache-size = <4000>; 41 d-cache-size = <4000>;
44 }; 42 };
@@ -64,11 +62,19 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHD.dtb -V 16 kuroboxHD.dts"
64 fef00000 fef00000 00100000>; /* pci iack */ 62 fef00000 fef00000 00100000>; /* pci iack */
65 63
66 i2c@80003000 { 64 i2c@80003000 {
65 #address-cells = <1>;
66 #size-cells = <0>;
67 device_type = "i2c"; 67 device_type = "i2c";
68 compatible = "fsl-i2c"; 68 compatible = "fsl-i2c";
69 reg = <80003000 1000>; 69 reg = <80003000 1000>;
70 interrupts = <5 2>; 70 interrupts = <5 2>;
71 interrupt-parent = <&mpic>; 71 interrupt-parent = <&mpic>;
72
73 rtc@32 {
74 device_type = "rtc";
75 compatible = "ricoh,rs5c372b";
76 reg = <32>;
77 };
72 }; 78 };
73 79
74 serial@80004500 { 80 serial@80004500 {
@@ -91,7 +97,7 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHD.dtb -V 16 kuroboxHD.dts"
91 interrupt-parent = <&mpic>; 97 interrupt-parent = <&mpic>;
92 }; 98 };
93 99
94 mpic: pic@80040000 { 100 mpic: interrupt-controller@80040000 {
95 #interrupt-cells = <2>; 101 #interrupt-cells = <2>;
96 #address-cells = <0>; 102 #address-cells = <0>;
97 device_type = "open-pic"; 103 device_type = "open-pic";
diff --git a/arch/powerpc/boot/dts/kuroboxHG.dts b/arch/powerpc/boot/dts/kuroboxHG.dts
index 5cf42dc022df..579aa8b967d9 100644
--- a/arch/powerpc/boot/dts/kuroboxHG.dts
+++ b/arch/powerpc/boot/dts/kuroboxHG.dts
@@ -33,12 +33,10 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHG.dtb -V 16 kuroboxHG.dts"
33 PowerPC,603e { /* Really 8241 */ 33 PowerPC,603e { /* Really 8241 */
34 device_type = "cpu"; 34 device_type = "cpu";
35 reg = <0>; 35 reg = <0>;
36 clock-frequency = <fdad680>; /* Fixed by bootwrapper */ 36 clock-frequency = <fdad680>; /* Fixed by bootloader */
37 timebase-frequency = <1F04000>; /* Fixed by bootwrapper */ 37 timebase-frequency = <1F04000>; /* Fixed by bootloader */
38 bus-frequency = <0>; /* From bootloader */ 38 bus-frequency = <0>; /* Fixed by bootloader */
39 /* Following required by dtc but not used */ 39 /* Following required by dtc but not used */
40 i-cache-line-size = <0>;
41 d-cache-line-size = <0>;
42 i-cache-size = <4000>; 40 i-cache-size = <4000>;
43 d-cache-size = <4000>; 41 d-cache-size = <4000>;
44 }; 42 };
@@ -64,11 +62,19 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHG.dtb -V 16 kuroboxHG.dts"
64 fef00000 fef00000 00100000>; /* pci iack */ 62 fef00000 fef00000 00100000>; /* pci iack */
65 63
66 i2c@80003000 { 64 i2c@80003000 {
65 #address-cells = <1>;
66 #size-cells = <0>;
67 device_type = "i2c"; 67 device_type = "i2c";
68 compatible = "fsl-i2c"; 68 compatible = "fsl-i2c";
69 reg = <80003000 1000>; 69 reg = <80003000 1000>;
70 interrupts = <5 2>; 70 interrupts = <5 2>;
71 interrupt-parent = <&mpic>; 71 interrupt-parent = <&mpic>;
72
73 rtc@32 {
74 device_type = "rtc";
75 compatible = "ricoh,rs5c372b";
76 reg = <32>;
77 };
72 }; 78 };
73 79
74 serial@80004500 { 80 serial@80004500 {
@@ -91,8 +97,7 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHG.dtb -V 16 kuroboxHG.dts"
91 interrupt-parent = <&mpic>; 97 interrupt-parent = <&mpic>;
92 }; 98 };
93 99
94 mpic: pic@80040000 { 100 mpic: interrupt-controller@80040000 {
95 interrupt-parent = <&mpic>;
96 #interrupt-cells = <2>; 101 #interrupt-cells = <2>;
97 #address-cells = <0>; 102 #address-cells = <0>;
98 device_type = "open-pic"; 103 device_type = "open-pic";
diff --git a/arch/powerpc/boot/dts/mpc7448hpc2.dts b/arch/powerpc/boot/dts/mpc7448hpc2.dts
index 0e3d314a7158..b9158eb2797e 100644
--- a/arch/powerpc/boot/dts/mpc7448hpc2.dts
+++ b/arch/powerpc/boot/dts/mpc7448hpc2.dts
@@ -45,7 +45,7 @@
45 #address-cells = <1>; 45 #address-cells = <1>;
46 #size-cells = <1>; 46 #size-cells = <1>;
47 #interrupt-cells = <2>; 47 #interrupt-cells = <2>;
48 device_type = "tsi108-bridge"; 48 device_type = "tsi-bridge";
49 ranges = <00000000 c0000000 00010000>; 49 ranges = <00000000 c0000000 00010000>;
50 reg = <c0000000 00010000>; 50 reg = <c0000000 00010000>;
51 bus-frequency = <0>; 51 bus-frequency = <0>;
diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts b/arch/powerpc/boot/dts/mpc8313erdb.dts
index a1533cc07d09..c5adbe40364e 100644
--- a/arch/powerpc/boot/dts/mpc8313erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8313erdb.dts
@@ -178,7 +178,7 @@
178 #size-cells = <2>; 178 #size-cells = <2>;
179 #address-cells = <3>; 179 #address-cells = <3>;
180 reg = <8500 100>; 180 reg = <8500 100>;
181 compatible = "83xx"; 181 compatible = "fsl,mpc8349-pci";
182 device_type = "pci"; 182 device_type = "pci";
183 }; 183 };
184 184
diff --git a/arch/powerpc/boot/dts/mpc832x_mds.dts b/arch/powerpc/boot/dts/mpc832x_mds.dts
index 4fc0c4d34aa8..f158ed781ba8 100644
--- a/arch/powerpc/boot/dts/mpc832x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc832x_mds.dts
@@ -154,7 +154,7 @@
154 #size-cells = <2>; 154 #size-cells = <2>;
155 #address-cells = <3>; 155 #address-cells = <3>;
156 reg = <8500 100>; 156 reg = <8500 100>;
157 compatible = "83xx"; 157 compatible = "fsl,mpc8349-pci";
158 device_type = "pci"; 158 device_type = "pci";
159 }; 159 };
160 160
diff --git a/arch/powerpc/boot/dts/mpc832x_rdb.dts b/arch/powerpc/boot/dts/mpc832x_rdb.dts
index 447c03ffabbc..7c4beff3e200 100644
--- a/arch/powerpc/boot/dts/mpc832x_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc832x_rdb.dts
@@ -123,7 +123,7 @@
123 #size-cells = <2>; 123 #size-cells = <2>;
124 #address-cells = <3>; 124 #address-cells = <3>;
125 reg = <8500 100>; 125 reg = <8500 100>;
126 compatible = "83xx"; 126 compatible = "fsl,mpc8349-pci";
127 device_type = "pci"; 127 device_type = "pci";
128 }; 128 };
129 129
diff --git a/arch/powerpc/boot/dts/mpc8349emitx.dts b/arch/powerpc/boot/dts/mpc8349emitx.dts
index ae9bca575453..502f47c01797 100644
--- a/arch/powerpc/boot/dts/mpc8349emitx.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitx.dts
@@ -197,7 +197,7 @@
197 #size-cells = <2>; 197 #size-cells = <2>;
198 #address-cells = <3>; 198 #address-cells = <3>;
199 reg = <8500 100>; 199 reg = <8500 100>;
200 compatible = "83xx"; 200 compatible = "fsl,mpc8349-pci";
201 device_type = "pci"; 201 device_type = "pci";
202 }; 202 };
203 203
@@ -222,7 +222,7 @@
222 #size-cells = <2>; 222 #size-cells = <2>;
223 #address-cells = <3>; 223 #address-cells = <3>;
224 reg = <8600 100>; 224 reg = <8600 100>;
225 compatible = "83xx"; 225 compatible = "fsl,mpc8349-pci";
226 device_type = "pci"; 226 device_type = "pci";
227 }; 227 };
228 228
diff --git a/arch/powerpc/boot/dts/mpc8349emitxgp.dts b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
index f636528a3c72..0b8387141d88 100644
--- a/arch/powerpc/boot/dts/mpc8349emitxgp.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
@@ -154,7 +154,7 @@
154 #size-cells = <2>; 154 #size-cells = <2>;
155 #address-cells = <3>; 155 #address-cells = <3>;
156 reg = <8600 100>; 156 reg = <8600 100>;
157 compatible = "83xx"; 157 compatible = "fsl,mpc8349-pci";
158 device_type = "pci"; 158 device_type = "pci";
159 }; 159 };
160 160
diff --git a/arch/powerpc/boot/dts/mpc834x_mds.dts b/arch/powerpc/boot/dts/mpc834x_mds.dts
index 310e877826b4..481099756e44 100644
--- a/arch/powerpc/boot/dts/mpc834x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc834x_mds.dts
@@ -241,7 +241,7 @@
241 #size-cells = <2>; 241 #size-cells = <2>;
242 #address-cells = <3>; 242 #address-cells = <3>;
243 reg = <8500 100>; 243 reg = <8500 100>;
244 compatible = "83xx"; 244 compatible = "fsl,mpc8349-pci";
245 device_type = "pci"; 245 device_type = "pci";
246 }; 246 };
247 247
@@ -301,7 +301,7 @@
301 #size-cells = <2>; 301 #size-cells = <2>;
302 #address-cells = <3>; 302 #address-cells = <3>;
303 reg = <8600 100>; 303 reg = <8600 100>;
304 compatible = "83xx"; 304 compatible = "fsl,mpc8349-pci";
305 device_type = "pci"; 305 device_type = "pci";
306 }; 306 };
307 307
diff --git a/arch/powerpc/boot/dts/mpc836x_mds.dts b/arch/powerpc/boot/dts/mpc836x_mds.dts
index 1e914f31dd92..e3f7c1282068 100644
--- a/arch/powerpc/boot/dts/mpc836x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc836x_mds.dts
@@ -169,7 +169,7 @@
169 #size-cells = <2>; 169 #size-cells = <2>;
170 #address-cells = <3>; 170 #address-cells = <3>;
171 reg = <8500 100>; 171 reg = <8500 100>;
172 compatible = "83xx"; 172 compatible = "fsl,mpc8349-pci";
173 device_type = "pci"; 173 device_type = "pci";
174 }; 174 };
175 175
diff --git a/arch/powerpc/boot/dts/mpc8540ads.dts b/arch/powerpc/boot/dts/mpc8540ads.dts
index 364a969f5c2f..fc8dff9f6201 100644
--- a/arch/powerpc/boot/dts/mpc8540ads.dts
+++ b/arch/powerpc/boot/dts/mpc8540ads.dts
@@ -258,7 +258,7 @@
258 #size-cells = <2>; 258 #size-cells = <2>;
259 #address-cells = <3>; 259 #address-cells = <3>;
260 reg = <8000 1000>; 260 reg = <8000 1000>;
261 compatible = "85xx"; 261 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
262 device_type = "pci"; 262 device_type = "pci";
263 }; 263 };
264 264
diff --git a/arch/powerpc/boot/dts/mpc8541cds.dts b/arch/powerpc/boot/dts/mpc8541cds.dts
index 070206fffe88..fb0b647f8c2a 100644
--- a/arch/powerpc/boot/dts/mpc8541cds.dts
+++ b/arch/powerpc/boot/dts/mpc8541cds.dts
@@ -193,7 +193,7 @@
193 #size-cells = <2>; 193 #size-cells = <2>;
194 #address-cells = <3>; 194 #address-cells = <3>;
195 reg = <8000 1000>; 195 reg = <8000 1000>;
196 compatible = "85xx"; 196 compatible = "fsl,mpc8540-pci";
197 device_type = "pci"; 197 device_type = "pci";
198 198
199 i8259@19000 { 199 i8259@19000 {
@@ -230,7 +230,7 @@
230 #size-cells = <2>; 230 #size-cells = <2>;
231 #address-cells = <3>; 231 #address-cells = <3>;
232 reg = <9000 1000>; 232 reg = <9000 1000>;
233 compatible = "85xx"; 233 compatible = "fsl,mpc8540-pci";
234 device_type = "pci"; 234 device_type = "pci";
235 }; 235 };
236 236
diff --git a/arch/powerpc/boot/dts/mpc8544ds.dts b/arch/powerpc/boot/dts/mpc8544ds.dts
index 828592592460..4680e2010887 100644
--- a/arch/powerpc/boot/dts/mpc8544ds.dts
+++ b/arch/powerpc/boot/dts/mpc8544ds.dts
@@ -104,6 +104,7 @@
104 interrupts = <1d 2 1e 2 22 2>; 104 interrupts = <1d 2 1e 2 22 2>;
105 interrupt-parent = <&mpic>; 105 interrupt-parent = <&mpic>;
106 phy-handle = <&phy0>; 106 phy-handle = <&phy0>;
107 phy-connection-type = "rgmii-id";
107 }; 108 };
108 109
109 ethernet@26000 { 110 ethernet@26000 {
@@ -117,6 +118,7 @@
117 interrupts = <1f 2 20 2 21 2>; 118 interrupts = <1f 2 20 2 21 2>;
118 interrupt-parent = <&mpic>; 119 interrupt-parent = <&mpic>;
119 phy-handle = <&phy1>; 120 phy-handle = <&phy1>;
121 phy-connection-type = "rgmii-id";
120 }; 122 };
121 123
122 serial@4500 { 124 serial@4500 {
@@ -137,6 +139,223 @@
137 interrupt-parent = <&mpic>; 139 interrupt-parent = <&mpic>;
138 }; 140 };
139 141
142 pci@8000 {
143 compatible = "fsl,mpc8540-pci";
144 device_type = "pci";
145 interrupt-map-mask = <f800 0 0 7>;
146 interrupt-map = <
147
148 /* IDSEL 0x11 J17 Slot 1 */
149 8800 0 0 1 &mpic 2 1
150 8800 0 0 2 &mpic 3 1
151 8800 0 0 3 &mpic 4 1
152 8800 0 0 4 &mpic 1 1
153
154 /* IDSEL 0x12 J16 Slot 2 */
155
156 9000 0 0 1 &mpic 3 1
157 9000 0 0 2 &mpic 4 1
158 9000 0 0 3 &mpic 2 1
159 9000 0 0 4 &mpic 1 1>;
160
161 interrupt-parent = <&mpic>;
162 interrupts = <18 2>;
163 bus-range = <0 ff>;
164 ranges = <02000000 0 80000000 80000000 0 10000000
165 01000000 0 00000000 e2000000 0 00800000>;
166 clock-frequency = <3f940aa>;
167 #interrupt-cells = <1>;
168 #size-cells = <2>;
169 #address-cells = <3>;
170 reg = <8000 1000>;
171 };
172
173 pcie@9000 {
174 compatible = "fsl,mpc8548-pcie";
175 device_type = "pci";
176 #interrupt-cells = <1>;
177 #size-cells = <2>;
178 #address-cells = <3>;
179 reg = <9000 1000>;
180 bus-range = <0 ff>;
181 ranges = <02000000 0 90000000 90000000 0 10000000
182 01000000 0 00000000 e3000000 0 00800000>;
183 clock-frequency = <1fca055>;
184 interrupt-parent = <&mpic>;
185 interrupts = <1a 2>;
186 interrupt-map-mask = <f800 0 0 7>;
187 interrupt-map = <
188 /* IDSEL 0x0 */
189 0000 0 0 1 &mpic 4 1
190 0000 0 0 2 &mpic 5 1
191 0000 0 0 3 &mpic 6 1
192 0000 0 0 4 &mpic 7 1
193 >;
194 };
195
196 pcie@a000 {
197 compatible = "fsl,mpc8548-pcie";
198 device_type = "pci";
199 #interrupt-cells = <1>;
200 #size-cells = <2>;
201 #address-cells = <3>;
202 reg = <a000 1000>;
203 bus-range = <0 ff>;
204 ranges = <02000000 0 a0000000 a0000000 0 10000000
205 01000000 0 00000000 e2800000 0 00800000>;
206 clock-frequency = <1fca055>;
207 interrupt-parent = <&mpic>;
208 interrupts = <19 2>;
209 interrupt-map-mask = <f800 0 0 7>;
210 interrupt-map = <
211 /* IDSEL 0x0 */
212 0000 0 0 1 &mpic 0 1
213 0000 0 0 2 &mpic 1 1
214 0000 0 0 3 &mpic 2 1
215 0000 0 0 4 &mpic 3 1
216 >;
217 };
218
219 pcie@b000 {
220 compatible = "fsl,mpc8548-pcie";
221 device_type = "pci";
222 #interrupt-cells = <1>;
223 #size-cells = <2>;
224 #address-cells = <3>;
225 reg = <b000 1000>;
226 bus-range = <0 ff>;
227 ranges = <02000000 0 b0000000 b0000000 0 10000000
228 01000000 0 00000000 e3800000 0 00800000>;
229 clock-frequency = <1fca055>;
230 interrupt-parent = <&mpic>;
231 interrupts = <1b 2>;
232 interrupt-map-mask = <f800 0 0 7>;
233 interrupt-map = <
234
235 // IDSEL 0x1a
236 d000 0 0 1 &i8259 6 2
237 d000 0 0 2 &i8259 3 2
238 d000 0 0 3 &i8259 4 2
239 d000 0 0 4 &i8259 5 2
240
241 // IDSEL 0x1b
242 d800 0 0 1 &i8259 5 2
243 d800 0 0 2 &i8259 0 0
244 d800 0 0 3 &i8259 0 0
245 d800 0 0 4 &i8259 0 0
246
247 // IDSEL 0x1c USB
248 e000 0 0 1 &i8259 9 2
249 e000 0 0 2 &i8259 a 2
250 e000 0 0 3 &i8259 c 2
251 e000 0 0 4 &i8259 7 2
252
253 // IDSEL 0x1d Audio
254 e800 0 0 1 &i8259 9 2
255 e800 0 0 2 &i8259 a 2
256 e800 0 0 3 &i8259 b 2
257 e800 0 0 4 &i8259 0 0
258
259 // IDSEL 0x1e Legacy
260 f000 0 0 1 &i8259 c 2
261 f000 0 0 2 &i8259 0 0
262 f000 0 0 3 &i8259 0 0
263 f000 0 0 4 &i8259 0 0
264
265 // IDSEL 0x1f IDE/SATA
266 f800 0 0 1 &i8259 6 2
267 f800 0 0 2 &i8259 0 0
268 f800 0 0 3 &i8259 0 0
269 f800 0 0 4 &i8259 0 0
270 >;
271 uli1575@0 {
272 reg = <0 0 0 0 0>;
273 #size-cells = <2>;
274 #address-cells = <3>;
275 ranges = <02000000 0 b0000000
276 02000000 0 b0000000
277 0 10000000
278 01000000 0 00000000
279 01000000 0 00000000
280 0 00080000>;
281
282 pci_bridge@0 {
283 reg = <0 0 0 0 0>;
284 #size-cells = <2>;
285 #address-cells = <3>;
286 ranges = <02000000 0 b0000000
287 02000000 0 b0000000
288 0 20000000
289 01000000 0 00000000
290 01000000 0 00000000
291 0 00100000>;
292
293 isa@1e {
294 device_type = "isa";
295 #interrupt-cells = <2>;
296 #size-cells = <1>;
297 #address-cells = <2>;
298 reg = <f000 0 0 0 0>;
299 ranges = <1 0 01000000 0 0
300 00001000>;
301 interrupt-parent = <&i8259>;
302
303 i8259: interrupt-controller@20 {
304 reg = <1 20 2
305 1 a0 2
306 1 4d0 2>;
307 clock-frequency = <0>;
308 interrupt-controller;
309 device_type = "interrupt-controller";
310 #address-cells = <0>;
311 #interrupt-cells = <2>;
312 built-in;
313 compatible = "chrp,iic";
314 interrupts = <9 2>;
315 interrupt-parent =
316 <&mpic>;
317 };
318
319 i8042@60 {
320 #size-cells = <0>;
321 #address-cells = <1>;
322 reg = <1 60 1 1 64 1>;
323 interrupts = <1 3 c 3>;
324 interrupt-parent =
325 <&i8259>;
326
327 keyboard@0 {
328 reg = <0>;
329 compatible = "pnpPNP,303";
330 };
331
332 mouse@1 {
333 reg = <1>;
334 compatible = "pnpPNP,f03";
335 };
336 };
337
338 rtc@70 {
339 compatible =
340 "pnpPNP,b00";
341 reg = <1 70 2>;
342 };
343
344 gpio@400 {
345 reg = <1 400 80>;
346 };
347 };
348 };
349 };
350
351 };
352
353 global-utilities@e0000 { //global utilities block
354 compatible = "fsl,mpc8548-guts";
355 reg = <e0000 1000>;
356 fsl,has-rstcr;
357 };
358
140 mpic: pic@40000 { 359 mpic: pic@40000 {
141 clock-frequency = <0>; 360 clock-frequency = <0>;
142 interrupt-controller; 361 interrupt-controller;
diff --git a/arch/powerpc/boot/dts/mpc8548cds.dts b/arch/powerpc/boot/dts/mpc8548cds.dts
index 9d0b84b66cd4..d215d21fff42 100644
--- a/arch/powerpc/boot/dts/mpc8548cds.dts
+++ b/arch/powerpc/boot/dts/mpc8548cds.dts
@@ -1,5 +1,5 @@
1/* 1/*
2 * MPC8555 CDS Device Tree Source 2 * MPC8548 CDS Device Tree Source
3 * 3 *
4 * Copyright 2006 Freescale Semiconductor Inc. 4 * Copyright 2006 Freescale Semiconductor Inc.
5 * 5 *
@@ -44,8 +44,14 @@
44 #size-cells = <1>; 44 #size-cells = <1>;
45 #interrupt-cells = <2>; 45 #interrupt-cells = <2>;
46 device_type = "soc"; 46 device_type = "soc";
47 ranges = <0 e0000000 00100000>; 47 ranges = <00001000 e0001000 000ff000
48 reg = <e0000000 00100000>; // CCSRBAR 1M 48 80000000 80000000 10000000
49 e2000000 e2000000 00800000
50 90000000 90000000 10000000
51 e2800000 e2800000 00800000
52 a0000000 a0000000 20000000
53 e3000000 e3000000 01000000>;
54 reg = <e0000000 00001000>; // CCSRBAR
49 bus-frequency = <0>; 55 bus-frequency = <0>;
50 56
51 memory-controller@2000 { 57 memory-controller@2000 {
@@ -162,8 +168,8 @@
162 serial@4500 { 168 serial@4500 {
163 device_type = "serial"; 169 device_type = "serial";
164 compatible = "ns16550"; 170 compatible = "ns16550";
165 reg = <4500 100>; // reg base, size 171 reg = <4500 100>; // reg base, size
166 clock-frequency = <0>; // should we fill in in uboot? 172 clock-frequency = <0>; // should we fill in in uboot?
167 interrupts = <2a 2>; 173 interrupts = <2a 2>;
168 interrupt-parent = <&mpic>; 174 interrupt-parent = <&mpic>;
169 }; 175 };
@@ -172,7 +178,7 @@
172 device_type = "serial"; 178 device_type = "serial";
173 compatible = "ns16550"; 179 compatible = "ns16550";
174 reg = <4600 100>; // reg base, size 180 reg = <4600 100>; // reg base, size
175 clock-frequency = <0>; // should we fill in in uboot? 181 clock-frequency = <0>; // should we fill in in uboot?
176 interrupts = <2a 2>; 182 interrupts = <2a 2>;
177 interrupt-parent = <&mpic>; 183 interrupt-parent = <&mpic>;
178 }; 184 };
@@ -183,77 +189,154 @@
183 fsl,has-rstcr; 189 fsl,has-rstcr;
184 }; 190 };
185 191
186 pci1: pci@8000 { 192 pci@8000 {
187 interrupt-map-mask = <1f800 0 0 7>; 193 interrupt-map-mask = <f800 0 0 7>;
188 interrupt-map = < 194 interrupt-map = <
195 /* IDSEL 0x4 (PCIX Slot 2) */
196 02000 0 0 1 &mpic 0 1
197 02000 0 0 2 &mpic 1 1
198 02000 0 0 3 &mpic 2 1
199 02000 0 0 4 &mpic 3 1
200
201 /* IDSEL 0x5 (PCIX Slot 3) */
202 02800 0 0 1 &mpic 1 1
203 02800 0 0 2 &mpic 2 1
204 02800 0 0 3 &mpic 3 1
205 02800 0 0 4 &mpic 0 1
206
207 /* IDSEL 0x6 (PCIX Slot 4) */
208 03000 0 0 1 &mpic 2 1
209 03000 0 0 2 &mpic 3 1
210 03000 0 0 3 &mpic 0 1
211 03000 0 0 4 &mpic 1 1
212
213 /* IDSEL 0x8 (PCIX Slot 5) */
214 04000 0 0 1 &mpic 0 1
215 04000 0 0 2 &mpic 1 1
216 04000 0 0 3 &mpic 2 1
217 04000 0 0 4 &mpic 3 1
218
219 /* IDSEL 0xC (Tsi310 bridge) */
220 06000 0 0 1 &mpic 0 1
221 06000 0 0 2 &mpic 1 1
222 06000 0 0 3 &mpic 2 1
223 06000 0 0 4 &mpic 3 1
224
225 /* IDSEL 0x14 (Slot 2) */
226 0a000 0 0 1 &mpic 0 1
227 0a000 0 0 2 &mpic 1 1
228 0a000 0 0 3 &mpic 2 1
229 0a000 0 0 4 &mpic 3 1
230
231 /* IDSEL 0x15 (Slot 3) */
232 0a800 0 0 1 &mpic 1 1
233 0a800 0 0 2 &mpic 2 1
234 0a800 0 0 3 &mpic 3 1
235 0a800 0 0 4 &mpic 0 1
236
237 /* IDSEL 0x16 (Slot 4) */
238 0b000 0 0 1 &mpic 2 1
239 0b000 0 0 2 &mpic 3 1
240 0b000 0 0 3 &mpic 0 1
241 0b000 0 0 4 &mpic 1 1
242
243 /* IDSEL 0x18 (Slot 5) */
244 0c000 0 0 1 &mpic 0 1
245 0c000 0 0 2 &mpic 1 1
246 0c000 0 0 3 &mpic 2 1
247 0c000 0 0 4 &mpic 3 1
248
249 /* IDSEL 0x1C (Tsi310 bridge PCI primary) */
250 0E000 0 0 1 &mpic 0 1
251 0E000 0 0 2 &mpic 1 1
252 0E000 0 0 3 &mpic 2 1
253 0E000 0 0 4 &mpic 3 1>;
189 254
190 /* IDSEL 0x10 */
191 08000 0 0 1 &mpic 0 1
192 08000 0 0 2 &mpic 1 1
193 08000 0 0 3 &mpic 2 1
194 08000 0 0 4 &mpic 3 1
195
196 /* IDSEL 0x11 */
197 08800 0 0 1 &mpic 0 1
198 08800 0 0 2 &mpic 1 1
199 08800 0 0 3 &mpic 2 1
200 08800 0 0 4 &mpic 3 1
201
202 /* IDSEL 0x12 (Slot 1) */
203 09000 0 0 1 &mpic 0 1
204 09000 0 0 2 &mpic 1 1
205 09000 0 0 3 &mpic 2 1
206 09000 0 0 4 &mpic 3 1
207
208 /* IDSEL 0x13 (Slot 2) */
209 09800 0 0 1 &mpic 1 1
210 09800 0 0 2 &mpic 2 1
211 09800 0 0 3 &mpic 3 1
212 09800 0 0 4 &mpic 0 1
213
214 /* IDSEL 0x14 (Slot 3) */
215 0a000 0 0 1 &mpic 2 1
216 0a000 0 0 2 &mpic 3 1
217 0a000 0 0 3 &mpic 0 1
218 0a000 0 0 4 &mpic 1 1
219
220 /* IDSEL 0x15 (Slot 4) */
221 0a800 0 0 1 &mpic 3 1
222 0a800 0 0 2 &mpic 0 1
223 0a800 0 0 3 &mpic 1 1
224 0a800 0 0 4 &mpic 2 1
225
226 /* Bus 1 (Tundra Bridge) */
227 /* IDSEL 0x12 (ISA bridge) */
228 19000 0 0 1 &mpic 0 1
229 19000 0 0 2 &mpic 1 1
230 19000 0 0 3 &mpic 2 1
231 19000 0 0 4 &mpic 3 1>;
232 interrupt-parent = <&mpic>; 255 interrupt-parent = <&mpic>;
233 interrupts = <18 2>; 256 interrupts = <18 2>;
234 bus-range = <0 0>; 257 bus-range = <0 0>;
235 ranges = <02000000 0 80000000 80000000 0 20000000 258 ranges = <02000000 0 80000000 80000000 0 10000000
236 01000000 0 00000000 e2000000 0 00100000>; 259 01000000 0 00000000 e2000000 0 00800000>;
237 clock-frequency = <3f940aa>; 260 clock-frequency = <3f940aa>;
238 #interrupt-cells = <1>; 261 #interrupt-cells = <1>;
239 #size-cells = <2>; 262 #size-cells = <2>;
240 #address-cells = <3>; 263 #address-cells = <3>;
241 reg = <8000 1000>; 264 reg = <8000 1000>;
242 compatible = "85xx"; 265 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
243 device_type = "pci"; 266 device_type = "pci";
244 267
245 i8259@19000 { 268 pci_bridge@1c {
246 clock-frequency = <0>; 269 interrupt-map-mask = <f800 0 0 7>;
247 interrupt-controller; 270 interrupt-map = <
248 device_type = "interrupt-controller"; 271
249 reg = <19000 0 0 0 1>; 272 /* IDSEL 0x00 (PrPMC Site) */
250 #address-cells = <0>; 273 0000 0 0 1 &mpic 0 1
251 #interrupt-cells = <2>; 274 0000 0 0 2 &mpic 1 1
252 built-in; 275 0000 0 0 3 &mpic 2 1
253 compatible = "chrp,iic"; 276 0000 0 0 4 &mpic 3 1
254 big-endian; 277
255 interrupts = <1>; 278 /* IDSEL 0x04 (VIA chip) */
256 interrupt-parent = <&pci1>; 279 2000 0 0 1 &mpic 0 1
280 2000 0 0 2 &mpic 1 1
281 2000 0 0 3 &mpic 2 1
282 2000 0 0 4 &mpic 3 1
283
284 /* IDSEL 0x05 (8139) */
285 2800 0 0 1 &mpic 1 1
286
287 /* IDSEL 0x06 (Slot 6) */
288 3000 0 0 1 &mpic 2 1
289 3000 0 0 2 &mpic 3 1
290 3000 0 0 3 &mpic 0 1
291 3000 0 0 4 &mpic 1 1
292
293 /* IDESL 0x07 (Slot 7) */
294 3800 0 0 1 &mpic 3 1
295 3800 0 0 2 &mpic 0 1
296 3800 0 0 3 &mpic 1 1
297 3800 0 0 4 &mpic 2 1>;
298
299 reg = <e000 0 0 0 0>;
300 #interrupt-cells = <1>;
301 #size-cells = <2>;
302 #address-cells = <3>;
303 ranges = <02000000 0 80000000
304 02000000 0 80000000
305 0 20000000
306 01000000 0 00000000
307 01000000 0 00000000
308 0 00080000>;
309 clock-frequency = <1fca055>;
310
311 isa@4 {
312 device_type = "isa";
313 #interrupt-cells = <2>;
314 #size-cells = <1>;
315 #address-cells = <2>;
316 reg = <2000 0 0 0 0>;
317 ranges = <1 0 01000000 0 0 00001000>;
318 interrupt-parent = <&i8259>;
319
320 i8259: interrupt-controller@20 {
321 clock-frequency = <0>;
322 interrupt-controller;
323 device_type = "interrupt-controller";
324 reg = <1 20 2
325 1 a0 2
326 1 4d0 2>;
327 #address-cells = <0>;
328 #interrupt-cells = <2>;
329 built-in;
330 compatible = "chrp,iic";
331 interrupts = <0 1>;
332 interrupt-parent = <&mpic>;
333 };
334
335 rtc@70 {
336 compatible = "pnpPNP,b00";
337 reg = <1 70 2>;
338 };
339 };
257 }; 340 };
258 }; 341 };
259 342
@@ -263,20 +346,45 @@
263 346
264 /* IDSEL 0x15 */ 347 /* IDSEL 0x15 */
265 a800 0 0 1 &mpic b 1 348 a800 0 0 1 &mpic b 1
266 a800 0 0 2 &mpic b 1 349 a800 0 0 2 &mpic 1 1
267 a800 0 0 3 &mpic b 1 350 a800 0 0 3 &mpic 2 1
268 a800 0 0 4 &mpic b 1>; 351 a800 0 0 4 &mpic 3 1>;
352
269 interrupt-parent = <&mpic>; 353 interrupt-parent = <&mpic>;
270 interrupts = <19 2>; 354 interrupts = <19 2>;
271 bus-range = <0 0>; 355 bus-range = <0 0>;
272 ranges = <02000000 0 a0000000 a0000000 0 20000000 356 ranges = <02000000 0 90000000 90000000 0 10000000
273 01000000 0 00000000 e3000000 0 00100000>; 357 01000000 0 00000000 e2800000 0 00800000>;
274 clock-frequency = <3f940aa>; 358 clock-frequency = <3f940aa>;
275 #interrupt-cells = <1>; 359 #interrupt-cells = <1>;
276 #size-cells = <2>; 360 #size-cells = <2>;
277 #address-cells = <3>; 361 #address-cells = <3>;
278 reg = <9000 1000>; 362 reg = <9000 1000>;
279 compatible = "85xx"; 363 compatible = "fsl,mpc8540-pci";
364 device_type = "pci";
365 };
366 /* PCI Express */
367 pcie@a000 {
368 interrupt-map-mask = <f800 0 0 7>;
369 interrupt-map = <
370
371 /* IDSEL 0x0 (PEX) */
372 00000 0 0 1 &mpic 0 1
373 00000 0 0 2 &mpic 1 1
374 00000 0 0 3 &mpic 2 1
375 00000 0 0 4 &mpic 3 1>;
376
377 interrupt-parent = <&mpic>;
378 interrupts = <1a 2>;
379 bus-range = <0 ff>;
380 ranges = <02000000 0 a0000000 a0000000 0 20000000
381 01000000 0 00000000 e3000000 0 08000000>;
382 clock-frequency = <1fca055>;
383 #interrupt-cells = <1>;
384 #size-cells = <2>;
385 #address-cells = <3>;
386 reg = <a000 1000>;
387 compatible = "fsl,mpc8548-pcie";
280 device_type = "pci"; 388 device_type = "pci";
281 }; 389 };
282 390
diff --git a/arch/powerpc/boot/dts/mpc8555cds.dts b/arch/powerpc/boot/dts/mpc8555cds.dts
index 17e45d9a382a..c3c888252121 100644
--- a/arch/powerpc/boot/dts/mpc8555cds.dts
+++ b/arch/powerpc/boot/dts/mpc8555cds.dts
@@ -193,7 +193,7 @@
193 #size-cells = <2>; 193 #size-cells = <2>;
194 #address-cells = <3>; 194 #address-cells = <3>;
195 reg = <8000 1000>; 195 reg = <8000 1000>;
196 compatible = "85xx"; 196 compatible = "fsl,mpc8540-pci";
197 device_type = "pci"; 197 device_type = "pci";
198 198
199 i8259@19000 { 199 i8259@19000 {
@@ -230,7 +230,7 @@
230 #size-cells = <2>; 230 #size-cells = <2>;
231 #address-cells = <3>; 231 #address-cells = <3>;
232 reg = <9000 1000>; 232 reg = <9000 1000>;
233 compatible = "85xx"; 233 compatible = "fsl,mpc8540-pci";
234 device_type = "pci"; 234 device_type = "pci";
235 }; 235 };
236 236
diff --git a/arch/powerpc/boot/dts/mpc8560ads.dts b/arch/powerpc/boot/dts/mpc8560ads.dts
index 21ccaaa27993..16dbe848cecf 100644
--- a/arch/powerpc/boot/dts/mpc8560ads.dts
+++ b/arch/powerpc/boot/dts/mpc8560ads.dts
@@ -136,7 +136,7 @@
136 #interrupt-cells = <1>; 136 #interrupt-cells = <1>;
137 #size-cells = <2>; 137 #size-cells = <2>;
138 #address-cells = <3>; 138 #address-cells = <3>;
139 compatible = "85xx"; 139 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
140 device_type = "pci"; 140 device_type = "pci";
141 reg = <8000 1000>; 141 reg = <8000 1000>;
142 clock-frequency = <3f940aa>; 142 clock-frequency = <3f940aa>;
diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts/mpc8568mds.dts
index 6bb18f2807a8..b1dcfbe8c1f8 100644
--- a/arch/powerpc/boot/dts/mpc8568mds.dts
+++ b/arch/powerpc/boot/dts/mpc8568mds.dts
@@ -170,6 +170,66 @@
170 interrupt-parent = <&mpic>; 170 interrupt-parent = <&mpic>;
171 }; 171 };
172 172
173 global-utilities@e0000 { //global utilities block
174 compatible = "fsl,mpc8548-guts";
175 reg = <e0000 1000>;
176 fsl,has-rstcr;
177 };
178
179 pci@8000 {
180 interrupt-map-mask = <f800 0 0 7>;
181 interrupt-map = <
182 /* IDSEL 0x12 AD18 */
183 9000 0 0 1 &mpic 5 1
184 9000 0 0 2 &mpic 6 1
185 9000 0 0 3 &mpic 7 1
186 9000 0 0 4 &mpic 4 1
187
188 /* IDSEL 0x13 AD19 */
189 9800 0 0 1 &mpic 6 1
190 9800 0 0 2 &mpic 7 1
191 9800 0 0 3 &mpic 4 1
192 9800 0 0 4 &mpic 5 1>;
193
194 interrupt-parent = <&mpic>;
195 interrupts = <18 2>;
196 bus-range = <0 ff>;
197 ranges = <02000000 0 80000000 80000000 0 20000000
198 01000000 0 00000000 e2000000 0 00800000>;
199 clock-frequency = <3f940aa>;
200 #interrupt-cells = <1>;
201 #size-cells = <2>;
202 #address-cells = <3>;
203 reg = <8000 1000>;
204 compatible = "fsl,mpc8540-pci";
205 device_type = "pci";
206 };
207
208 /* PCI Express */
209 pcie@a000 {
210 interrupt-map-mask = <f800 0 0 7>;
211 interrupt-map = <
212
213 /* IDSEL 0x0 (PEX) */
214 00000 0 0 1 &mpic 0 1
215 00000 0 0 2 &mpic 1 1
216 00000 0 0 3 &mpic 2 1
217 00000 0 0 4 &mpic 3 1>;
218
219 interrupt-parent = <&mpic>;
220 interrupts = <1a 2>;
221 bus-range = <0 ff>;
222 ranges = <02000000 0 a0000000 a0000000 0 20000000
223 01000000 0 00000000 e3000000 0 08000000>;
224 clock-frequency = <1fca055>;
225 #interrupt-cells = <1>;
226 #size-cells = <2>;
227 #address-cells = <3>;
228 reg = <a000 1000>;
229 compatible = "fsl,mpc8548-pcie";
230 device_type = "pci";
231 };
232
173 serial@4600 { 233 serial@4600 {
174 device_type = "serial"; 234 device_type = "serial";
175 compatible = "ns16550"; 235 compatible = "ns16550";
diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn.dts b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
index 6a78a2b37c08..5d82709cfcbb 100644
--- a/arch/powerpc/boot/dts/mpc8641_hpcn.dts
+++ b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
@@ -211,8 +211,8 @@
211 interrupt-parent = <&mpic>; 211 interrupt-parent = <&mpic>;
212 }; 212 };
213 213
214 pci@8000 { 214 pcie@8000 {
215 compatible = "86xx"; 215 compatible = "fsl,mpc8641-pcie";
216 device_type = "pci"; 216 device_type = "pci";
217 #interrupt-cells = <1>; 217 #interrupt-cells = <1>;
218 #size-cells = <2>; 218 #size-cells = <2>;
@@ -399,8 +399,8 @@
399 399
400 }; 400 };
401 401
402 pci@9000 { 402 pcie@9000 {
403 compatible = "86xx"; 403 compatible = "fsl,mpc8641-pcie";
404 device_type = "pci"; 404 device_type = "pci";
405 #interrupt-cells = <1>; 405 #interrupt-cells = <1>;
406 #size-cells = <2>; 406 #size-cells = <2>;
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-28 19:28:39 -0500