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-rw-r--r--arch/powerpc/boot/dts/arches.dts293
-rw-r--r--arch/powerpc/boot/dts/asp834x-redboot.dts4
-rw-r--r--arch/powerpc/boot/dts/gef_sbc610.dts293
-rw-r--r--arch/powerpc/boot/dts/glacier.dts2
-rw-r--r--arch/powerpc/boot/dts/holly.dts106
-rw-r--r--arch/powerpc/boot/dts/mgcoge.dts174
-rw-r--r--arch/powerpc/boot/dts/mgsuvd.dts163
-rw-r--r--arch/powerpc/boot/dts/mpc5121ads.dts3
-rw-r--r--arch/powerpc/boot/dts/mpc8313erdb.dts7
-rw-r--r--arch/powerpc/boot/dts/mpc8315erdb.dts7
-rw-r--r--arch/powerpc/boot/dts/mpc832x_mds.dts7
-rw-r--r--arch/powerpc/boot/dts/mpc832x_rdb.dts7
-rw-r--r--arch/powerpc/boot/dts/mpc8349emitx.dts10
-rw-r--r--arch/powerpc/boot/dts/mpc8349emitxgp.dts7
-rw-r--r--arch/powerpc/boot/dts/mpc834x_mds.dts10
-rw-r--r--arch/powerpc/boot/dts/mpc836x_mds.dts30
-rw-r--r--arch/powerpc/boot/dts/mpc836x_rdk.dts19
-rw-r--r--arch/powerpc/boot/dts/mpc8377_mds.dts14
-rw-r--r--arch/powerpc/boot/dts/mpc8377_rdb.dts7
-rw-r--r--arch/powerpc/boot/dts/mpc8378_mds.dts14
-rw-r--r--arch/powerpc/boot/dts/mpc8378_rdb.dts7
-rw-r--r--arch/powerpc/boot/dts/mpc8379_mds.dts14
-rw-r--r--arch/powerpc/boot/dts/mpc8379_rdb.dts7
-rw-r--r--arch/powerpc/boot/dts/mpc8536ds.dts2
-rw-r--r--arch/powerpc/boot/dts/mpc8610_hpcd.dts20
-rw-r--r--arch/powerpc/boot/dts/sbc8349.dts7
-rw-r--r--arch/powerpc/boot/dts/sequoia.dts9
-rw-r--r--arch/powerpc/boot/dts/yosemite.dts2
28 files changed, 1159 insertions, 86 deletions
diff --git a/arch/powerpc/boot/dts/arches.dts b/arch/powerpc/boot/dts/arches.dts
new file mode 100644
index 000000000000..d9113b1e8c1d
--- /dev/null
+++ b/arch/powerpc/boot/dts/arches.dts
@@ -0,0 +1,293 @@
1/*
2 * Device Tree Source for AMCC Arches (dual 460GT board)
3 *
4 * (C) Copyright 2008 Applied Micro Circuits Corporation
5 * Victor Gallardo <vgallardo@amcc.com>
6 * Adam Graham <agraham@amcc.com>
7 *
8 * Based on the glacier.dts file
9 * Stefan Roese <sr@denx.de>
10 * Copyright 2008 DENX Software Engineering
11 *
12 * See file CREDITS for list of people who contributed to this
13 * project.
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 * MA 02111-1307 USA
29 */
30
31/dts-v1/;
32
33/ {
34 #address-cells = <2>;
35 #size-cells = <1>;
36 model = "amcc,arches";
37 compatible = "amcc,arches";
38 dcr-parent = <&{/cpus/cpu@0}>;
39
40 aliases {
41 ethernet0 = &EMAC0;
42 ethernet1 = &EMAC1;
43 ethernet2 = &EMAC2;
44 serial0 = &UART0;
45 };
46
47 cpus {
48 #address-cells = <1>;
49 #size-cells = <0>;
50
51 cpu@0 {
52 device_type = "cpu";
53 model = "PowerPC,460GT";
54 reg = <0x00000000>;
55 clock-frequency = <0>; /* Filled in by U-Boot */
56 timebase-frequency = <0>; /* Filled in by U-Boot */
57 i-cache-line-size = <32>;
58 d-cache-line-size = <32>;
59 i-cache-size = <32768>;
60 d-cache-size = <32768>;
61 dcr-controller;
62 dcr-access-method = "native";
63 };
64 };
65
66 memory {
67 device_type = "memory";
68 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */
69 };
70
71 UIC0: interrupt-controller0 {
72 compatible = "ibm,uic-460gt","ibm,uic";
73 interrupt-controller;
74 cell-index = <0>;
75 dcr-reg = <0x0c0 0x009>;
76 #address-cells = <0>;
77 #size-cells = <0>;
78 #interrupt-cells = <2>;
79 };
80
81 UIC1: interrupt-controller1 {
82 compatible = "ibm,uic-460gt","ibm,uic";
83 interrupt-controller;
84 cell-index = <1>;
85 dcr-reg = <0x0d0 0x009>;
86 #address-cells = <0>;
87 #size-cells = <0>;
88 #interrupt-cells = <2>;
89 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
90 interrupt-parent = <&UIC0>;
91 };
92
93 UIC2: interrupt-controller2 {
94 compatible = "ibm,uic-460gt","ibm,uic";
95 interrupt-controller;
96 cell-index = <2>;
97 dcr-reg = <0x0e0 0x009>;
98 #address-cells = <0>;
99 #size-cells = <0>;
100 #interrupt-cells = <2>;
101 interrupts = <0xa 0x4 0xb 0x4>; /* cascade */
102 interrupt-parent = <&UIC0>;
103 };
104
105 UIC3: interrupt-controller3 {
106 compatible = "ibm,uic-460gt","ibm,uic";
107 interrupt-controller;
108 cell-index = <3>;
109 dcr-reg = <0x0f0 0x009>;
110 #address-cells = <0>;
111 #size-cells = <0>;
112 #interrupt-cells = <2>;
113 interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
114 interrupt-parent = <&UIC0>;
115 };
116
117 SDR0: sdr {
118 compatible = "ibm,sdr-460gt";
119 dcr-reg = <0x00e 0x002>;
120 };
121
122 CPR0: cpr {
123 compatible = "ibm,cpr-460gt";
124 dcr-reg = <0x00c 0x002>;
125 };
126
127 plb {
128 compatible = "ibm,plb-460gt", "ibm,plb4";
129 #address-cells = <2>;
130 #size-cells = <1>;
131 ranges;
132 clock-frequency = <0>; /* Filled in by U-Boot */
133
134 SDRAM0: sdram {
135 compatible = "ibm,sdram-460gt", "ibm,sdram-405gp";
136 dcr-reg = <0x010 0x002>;
137 };
138
139 MAL0: mcmal {
140 compatible = "ibm,mcmal-460gt", "ibm,mcmal2";
141 dcr-reg = <0x180 0x062>;
142 num-tx-chans = <3>;
143 num-rx-chans = <24>;
144 #address-cells = <0>;
145 #size-cells = <0>;
146 interrupt-parent = <&UIC2>;
147 interrupts = < /*TXEOB*/ 0x6 0x4
148 /*RXEOB*/ 0x7 0x4
149 /*SERR*/ 0x3 0x4
150 /*TXDE*/ 0x4 0x4
151 /*RXDE*/ 0x5 0x4>;
152 desc-base-addr-high = <0x8>;
153 };
154
155 POB0: opb {
156 compatible = "ibm,opb-460gt", "ibm,opb";
157 #address-cells = <1>;
158 #size-cells = <1>;
159 ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>;
160 clock-frequency = <0>; /* Filled in by U-Boot */
161
162 EBC0: ebc {
163 compatible = "ibm,ebc-460gt", "ibm,ebc";
164 dcr-reg = <0x012 0x002>;
165 #address-cells = <2>;
166 #size-cells = <1>;
167 clock-frequency = <0>; /* Filled in by U-Boot */
168 /* ranges property is supplied by U-Boot */
169 interrupts = <0x6 0x4>;
170 interrupt-parent = <&UIC1>;
171 };
172
173 UART0: serial@ef600300 {
174 device_type = "serial";
175 compatible = "ns16550";
176 reg = <0xef600300 0x00000008>;
177 virtual-reg = <0xef600300>;
178 clock-frequency = <0>; /* Filled in by U-Boot */
179 current-speed = <0>; /* Filled in by U-Boot */
180 interrupt-parent = <&UIC1>;
181 interrupts = <0x1 0x4>;
182 };
183
184 IIC0: i2c@ef600700 {
185 compatible = "ibm,iic-460gt", "ibm,iic";
186 reg = <0xef600700 0x00000014>;
187 interrupt-parent = <&UIC0>;
188 interrupts = <0x2 0x4>;
189 };
190
191 IIC1: i2c@ef600800 {
192 compatible = "ibm,iic-460gt", "ibm,iic";
193 reg = <0xef600800 0x00000014>;
194 interrupt-parent = <&UIC0>;
195 interrupts = <0x3 0x4>;
196 };
197
198 TAH0: emac-tah@ef601350 {
199 compatible = "ibm,tah-460gt", "ibm,tah";
200 reg = <0xef601350 0x00000030>;
201 };
202
203 TAH1: emac-tah@ef601450 {
204 compatible = "ibm,tah-460gt", "ibm,tah";
205 reg = <0xef601450 0x00000030>;
206 };
207
208 EMAC0: ethernet@ef600e00 {
209 device_type = "network";
210 compatible = "ibm,emac-460gt", "ibm,emac4sync";
211 interrupt-parent = <&EMAC0>;
212 interrupts = <0x0 0x1>;
213 #interrupt-cells = <1>;
214 #address-cells = <0>;
215 #size-cells = <0>;
216 interrupt-map = </*Status*/ 0x0 &UIC2 0x10 0x4
217 /*Wake*/ 0x1 &UIC2 0x14 0x4>;
218 reg = <0xef600e00 0x000000c4>;
219 local-mac-address = [000000000000]; /* Filled in by U-Boot */
220 mal-device = <&MAL0>;
221 mal-tx-channel = <0>;
222 mal-rx-channel = <0>;
223 cell-index = <0>;
224 max-frame-size = <9000>;
225 rx-fifo-size = <4096>;
226 tx-fifo-size = <2048>;
227 phy-mode = "sgmii";
228 phy-map = <0xffffffff>;
229 gpcs-address = <0x0000000a>;
230 tah-device = <&TAH0>;
231 tah-channel = <0>;
232 has-inverted-stacr-oc;
233 has-new-stacr-staopc;
234 };
235
236 EMAC1: ethernet@ef600f00 {
237 device_type = "network";
238 compatible = "ibm,emac-460gt", "ibm,emac4sync";
239 interrupt-parent = <&EMAC1>;
240 interrupts = <0x0 0x1>;
241 #interrupt-cells = <1>;
242 #address-cells = <0>;
243 #size-cells = <0>;
244 interrupt-map = </*Status*/ 0x0 &UIC2 0x11 0x4
245 /*Wake*/ 0x1 &UIC2 0x15 0x4>;
246 reg = <0xef600f00 0x000000c4>;
247 local-mac-address = [000000000000]; /* Filled in by U-Boot */
248 mal-device = <&MAL0>;
249 mal-tx-channel = <1>;
250 mal-rx-channel = <8>;
251 cell-index = <1>;
252 max-frame-size = <9000>;
253 rx-fifo-size = <4096>;
254 tx-fifo-size = <2048>;
255 phy-mode = "sgmii";
256 phy-map = <0x00000000>;
257 gpcs-address = <0x0000000b>;
258 tah-device = <&TAH1>;
259 tah-channel = <1>;
260 has-inverted-stacr-oc;
261 has-new-stacr-staopc;
262 mdio-device = <&EMAC0>;
263 };
264
265 EMAC2: ethernet@ef601100 {
266 device_type = "network";
267 compatible = "ibm,emac-460gt", "ibm,emac4sync";
268 interrupt-parent = <&EMAC2>;
269 interrupts = <0x0 0x1>;
270 #interrupt-cells = <1>;
271 #address-cells = <0>;
272 #size-cells = <0>;
273 interrupt-map = </*Status*/ 0x0 &UIC2 0x12 0x4
274 /*Wake*/ 0x1 &UIC2 0x16 0x4>;
275 reg = <0xef601100 0x000000c4>;
276 local-mac-address = [000000000000]; /* Filled in by U-Boot */
277 mal-device = <&MAL0>;
278 mal-tx-channel = <2>;
279 mal-rx-channel = <16>;
280 cell-index = <2>;
281 max-frame-size = <9000>;
282 rx-fifo-size = <4096>;
283 tx-fifo-size = <2048>;
284 phy-mode = "sgmii";
285 phy-map = <0x00000001>;
286 gpcs-address = <0x0000000C>;
287 has-inverted-stacr-oc;
288 has-new-stacr-staopc;
289 mdio-device = <&EMAC0>;
290 };
291 };
292 };
293};
diff --git a/arch/powerpc/boot/dts/asp834x-redboot.dts b/arch/powerpc/boot/dts/asp834x-redboot.dts
index 8b1bb0e41905..6235fca445de 100644
--- a/arch/powerpc/boot/dts/asp834x-redboot.dts
+++ b/arch/powerpc/boot/dts/asp834x-redboot.dts
@@ -130,24 +130,28 @@
130 dma-channel@0 { 130 dma-channel@0 {
131 compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel"; 131 compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel";
132 reg = <0 0x80>; 132 reg = <0 0x80>;
133 cell-index = <0>;
133 interrupt-parent = <&ipic>; 134 interrupt-parent = <&ipic>;
134 interrupts = <71 8>; 135 interrupts = <71 8>;
135 }; 136 };
136 dma-channel@80 { 137 dma-channel@80 {
137 compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel"; 138 compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel";
138 reg = <0x80 0x80>; 139 reg = <0x80 0x80>;
140 cell-index = <1>;
139 interrupt-parent = <&ipic>; 141 interrupt-parent = <&ipic>;
140 interrupts = <71 8>; 142 interrupts = <71 8>;
141 }; 143 };
142 dma-channel@100 { 144 dma-channel@100 {
143 compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel"; 145 compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel";
144 reg = <0x100 0x80>; 146 reg = <0x100 0x80>;
147 cell-index = <2>;
145 interrupt-parent = <&ipic>; 148 interrupt-parent = <&ipic>;
146 interrupts = <71 8>; 149 interrupts = <71 8>;
147 }; 150 };
148 dma-channel@180 { 151 dma-channel@180 {
149 compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel"; 152 compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel";
150 reg = <0x180 0x28>; 153 reg = <0x180 0x28>;
154 cell-index = <3>;
151 interrupt-parent = <&ipic>; 155 interrupt-parent = <&ipic>;
152 interrupts = <71 8>; 156 interrupts = <71 8>;
153 }; 157 };
diff --git a/arch/powerpc/boot/dts/gef_sbc610.dts b/arch/powerpc/boot/dts/gef_sbc610.dts
new file mode 100644
index 000000000000..6ed608322ddc
--- /dev/null
+++ b/arch/powerpc/boot/dts/gef_sbc610.dts
@@ -0,0 +1,293 @@
1/*
2 * GE Fanuc SBC610 Device Tree Source
3 *
4 * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * Based on: SBS CM6 Device Tree Source
12 * Copyright 2007 SBS Technologies GmbH & Co. KG
13 * And: mpc8641_hpcn.dts (MPC8641 HPCN Device Tree Source)
14 * Copyright 2006 Freescale Semiconductor Inc.
15 */
16
17/*
18 * Compiled with dtc -I dts -O dtb -o gef_sbc610.dtb gef_sbc610.dts
19 */
20
21/dts-v1/;
22
23/ {
24 model = "GEF_SBC610";
25 compatible = "gef,sbc610";
26 #address-cells = <1>;
27 #size-cells = <1>;
28
29 aliases {
30 ethernet0 = &enet0;
31 ethernet1 = &enet1;
32 serial0 = &serial0;
33 serial1 = &serial1;
34 pci0 = &pci0;
35 };
36
37 cpus {
38 #address-cells = <1>;
39 #size-cells = <0>;
40
41 PowerPC,8641@0 {
42 device_type = "cpu";
43 reg = <0>;
44 d-cache-line-size = <32>; // 32 bytes
45 i-cache-line-size = <32>; // 32 bytes
46 d-cache-size = <32768>; // L1, 32K
47 i-cache-size = <32768>; // L1, 32K
48 timebase-frequency = <0>; // From uboot
49 bus-frequency = <0>; // From uboot
50 clock-frequency = <0>; // From uboot
51 };
52 PowerPC,8641@1 {
53 device_type = "cpu";
54 reg = <1>;
55 d-cache-line-size = <32>; // 32 bytes
56 i-cache-line-size = <32>; // 32 bytes
57 d-cache-size = <32768>; // L1, 32K
58 i-cache-size = <32768>; // L1, 32K
59 timebase-frequency = <0>; // From uboot
60 bus-frequency = <0>; // From uboot
61 clock-frequency = <0>; // From uboot
62 };
63 };
64
65 memory {
66 device_type = "memory";
67 reg = <0x0 0x40000000>; // set by uboot
68 };
69
70 localbus@fef05000 {
71 #address-cells = <2>;
72 #size-cells = <1>;
73 compatible = "fsl,mpc8641-localbus", "simple-bus";
74 reg = <0xf8005000 0x1000>;
75 interrupts = <19 2>;
76 interrupt-parent = <&mpic>;
77
78 ranges = <0 0 0xff000000 0x01000000 // 16MB Boot flash
79 1 0 0xe8000000 0x08000000 // Paged Flash 0
80 2 0 0xe0000000 0x08000000 // Paged Flash 1
81 3 0 0xfc100000 0x00020000 // NVRAM
82 4 0 0xfc000000 0x00008000 // FPGA
83 5 0 0xfc008000 0x00008000 // AFIX FPGA
84 6 0 0xfd000000 0x00800000 // IO FPGA (8-bit)
85 7 0 0xfd800000 0x00800000>; // IO FPGA (32-bit)
86
87 fpga@4,0 {
88 compatible = "gef,fpga-regs";
89 reg = <0x4 0x0 0x40>;
90 };
91 gef_pic: pic@4,4000 {
92 #interrupt-cells = <1>;
93 interrupt-controller;
94 compatible = "gef,fpga-pic";
95 reg = <0x4 0x4000 0x20>;
96 interrupts = <0x8
97 0x9>;
98 interrupt-parent = <&mpic>;
99
100 };
101 };
102
103 soc@fef00000 {
104 #address-cells = <1>;
105 #size-cells = <1>;
106 #interrupt-cells = <2>;
107 device_type = "soc";
108 compatible = "simple-bus";
109 ranges = <0x0 0xfef00000 0x00100000>;
110 reg = <0xfef00000 0x100000>; // CCSRBAR 1M
111 bus-frequency = <0>;
112
113 i2c1: i2c@3000 {
114 #address-cells = <1>;
115 #size-cells = <0>;
116 compatible = "fsl-i2c";
117 reg = <0x3000 0x100>;
118 interrupts = <0x2b 0x2>;
119 interrupt-parent = <&mpic>;
120 dfsrr;
121
122 eti@6b {
123 compatible = "dallas,ds1682";
124 reg = <0x6b>;
125 };
126 };
127
128 i2c2: i2c@3100 {
129 #address-cells = <1>;
130 #size-cells = <0>;
131 compatible = "fsl-i2c";
132 reg = <0x3100 0x100>;
133 interrupts = <0x2b 0x2>;
134 interrupt-parent = <&mpic>;
135 dfsrr;
136 };
137
138 dma@21300 {
139 #address-cells = <1>;
140 #size-cells = <1>;
141 compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma";
142 reg = <0x21300 0x4>;
143 ranges = <0x0 0x21100 0x200>;
144 cell-index = <0>;
145 dma-channel@0 {
146 compatible = "fsl,mpc8641-dma-channel",
147 "fsl,eloplus-dma-channel";
148 reg = <0x0 0x80>;
149 cell-index = <0>;
150 interrupt-parent = <&mpic>;
151 interrupts = <20 2>;
152 };
153 dma-channel@80 {
154 compatible = "fsl,mpc8641-dma-channel",
155 "fsl,eloplus-dma-channel";
156 reg = <0x80 0x80>;
157 cell-index = <1>;
158 interrupt-parent = <&mpic>;
159 interrupts = <21 2>;
160 };
161 dma-channel@100 {
162 compatible = "fsl,mpc8641-dma-channel",
163 "fsl,eloplus-dma-channel";
164 reg = <0x100 0x80>;
165 cell-index = <2>;
166 interrupt-parent = <&mpic>;
167 interrupts = <22 2>;
168 };
169 dma-channel@180 {
170 compatible = "fsl,mpc8641-dma-channel",
171 "fsl,eloplus-dma-channel";
172 reg = <0x180 0x80>;
173 cell-index = <3>;
174 interrupt-parent = <&mpic>;
175 interrupts = <23 2>;
176 };
177 };
178
179 mdio@24520 {
180 #address-cells = <1>;
181 #size-cells = <0>;
182 compatible = "fsl,gianfar-mdio";
183 reg = <0x24520 0x20>;
184
185 phy0: ethernet-phy@0 {
186 interrupt-parent = <&gef_pic>;
187 interrupts = <0x9 0x4>;
188 reg = <1>;
189 };
190 phy2: ethernet-phy@2 {
191 interrupt-parent = <&gef_pic>;
192 interrupts = <0x8 0x4>;
193 reg = <3>;
194 };
195 };
196
197 enet0: ethernet@24000 {
198 device_type = "network";
199 model = "eTSEC";
200 compatible = "gianfar";
201 reg = <0x24000 0x1000>;
202 local-mac-address = [ 00 00 00 00 00 00 ];
203 interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
204 interrupt-parent = <&mpic>;
205 phy-handle = <&phy0>;
206 phy-connection-type = "gmii";
207 };
208
209 enet1: ethernet@26000 {
210 device_type = "network";
211 model = "eTSEC";
212 compatible = "gianfar";
213 reg = <0x26000 0x1000>;
214 local-mac-address = [ 00 00 00 00 00 00 ];
215 interrupts = <0x1f 0x2 0x20 0x2 0x21 0x2>;
216 interrupt-parent = <&mpic>;
217 phy-handle = <&phy2>;
218 phy-connection-type = "gmii";
219 };
220
221 serial0: serial@4500 {
222 cell-index = <0>;
223 device_type = "serial";
224 compatible = "ns16550";
225 reg = <0x4500 0x100>;
226 clock-frequency = <0>;
227 interrupts = <0x2a 0x2>;
228 interrupt-parent = <&mpic>;
229 };
230
231 serial1: serial@4600 {
232 cell-index = <1>;
233 device_type = "serial";
234 compatible = "ns16550";
235 reg = <0x4600 0x100>;
236 clock-frequency = <0>;
237 interrupts = <0x1c 0x2>;
238 interrupt-parent = <&mpic>;
239 };
240
241 mpic: pic@40000 {
242 clock-frequency = <0>;
243 interrupt-controller;
244 #address-cells = <0>;
245 #interrupt-cells = <2>;
246 reg = <0x40000 0x40000>;
247 compatible = "chrp,open-pic";
248 device_type = "open-pic";
249 };
250
251 global-utilities@e0000 {
252 compatible = "fsl,mpc8641-guts";
253 reg = <0xe0000 0x1000>;
254 fsl,has-rstcr;
255 };
256 };
257
258 pci0: pcie@fef08000 {
259 compatible = "fsl,mpc8641-pcie";
260 device_type = "pci";
261 #interrupt-cells = <1>;
262 #size-cells = <2>;
263 #address-cells = <3>;
264 reg = <0xfef08000 0x1000>;
265 bus-range = <0x0 0xff>;
266 ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x40000000
267 0x01000000 0x0 0x00000000 0xfe000000 0x0 0x00400000>;
268 clock-frequency = <33333333>;
269 interrupt-parent = <&mpic>;
270 interrupts = <0x18 0x2>;
271 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
272 interrupt-map = <
273 0x0000 0x0 0x0 0x1 &mpic 0x0 0x1
274 0x0000 0x0 0x0 0x2 &mpic 0x1 0x1
275 0x0000 0x0 0x0 0x3 &mpic 0x2 0x1
276 0x0000 0x0 0x0 0x4 &mpic 0x3 0x1
277 >;
278
279 pcie@0 {
280 reg = <0 0 0 0 0>;
281 #size-cells = <2>;
282 #address-cells = <3>;
283 device_type = "pci";
284 ranges = <0x02000000 0x0 0x80000000
285 0x02000000 0x0 0x80000000
286 0x0 0x40000000
287
288 0x01000000 0x0 0x00000000
289 0x01000000 0x0 0x00000000
290 0x0 0x00400000>;
291 };
292 };
293};
diff --git a/arch/powerpc/boot/dts/glacier.dts b/arch/powerpc/boot/dts/glacier.dts
index 24cf0dba120c..f3787a27f634 100644
--- a/arch/powerpc/boot/dts/glacier.dts
+++ b/arch/powerpc/boot/dts/glacier.dts
@@ -14,7 +14,7 @@
14 #address-cells = <2>; 14 #address-cells = <2>;
15 #size-cells = <1>; 15 #size-cells = <1>;
16 model = "amcc,glacier"; 16 model = "amcc,glacier";
17 compatible = "amcc,glacier", "amcc,canyonlands"; 17 compatible = "amcc,glacier";
18 dcr-parent = <&{/cpus/cpu@0}>; 18 dcr-parent = <&{/cpus/cpu@0}>;
19 19
20 aliases { 20 aliases {
diff --git a/arch/powerpc/boot/dts/holly.dts b/arch/powerpc/boot/dts/holly.dts
index f87fe7b9ced9..c6e11ebecebb 100644
--- a/arch/powerpc/boot/dts/holly.dts
+++ b/arch/powerpc/boot/dts/holly.dts
@@ -133,61 +133,61 @@
133 reg = <0x00007400 0x00000400>; 133 reg = <0x00007400 0x00000400>;
134 big-endian; 134 big-endian;
135 }; 135 };
136 };
136 137
137 pci@1000 { 138 pci@c0001000 {
138 device_type = "pci"; 139 device_type = "pci";
139 compatible = "tsi109-pci", "tsi108-pci"; 140 compatible = "tsi109-pci", "tsi108-pci";
140 #interrupt-cells = <1>; 141 #interrupt-cells = <1>;
141 #size-cells = <2>; 142 #size-cells = <2>;
142 #address-cells = <3>; 143 #address-cells = <3>;
143 reg = <0x00001000 0x00001000>; 144 reg = <0xc0001000 0x00001000>;
144 bus-range = <0x0 0x0>; 145 bus-range = <0x0 0x0>;
145 /*----------------------------------------------------+ 146 /*----------------------------------------------------+
146 | PCI memory range. 147 | PCI memory range.
147 | 01 denotes I/O space 148 | 01 denotes I/O space
148 | 02 denotes 32-bit memory space 149 | 02 denotes 32-bit memory space
149 +----------------------------------------------------*/ 150 +----------------------------------------------------*/
150 ranges = <0x02000000 0x00000000 0x40000000 0x40000000 0x00000000 0x10000000 151 ranges = <0x02000000 0x00000000 0x40000000 0x40000000 0x00000000 0x10000000
151 0x01000000 0x00000000 0x00000000 0x7e000000 0x00000000 0x00010000>; 152 0x01000000 0x00000000 0x00000000 0x7e000000 0x00000000 0x00010000>;
152 clock-frequency = <133333332>; 153 clock-frequency = <133333332>;
153 interrupt-parent = <&MPIC>; 154 interrupt-parent = <&MPIC>;
155 interrupts = <0x17 0x2>;
156 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
157 /*----------------------------------------------------+
158 | The INTA, INTB, INTC, INTD are shared.
159 +----------------------------------------------------*/
160 interrupt-map = <
161 0x800 0x0 0x0 0x1 &RT0 0x24 0x0
162 0x800 0x0 0x0 0x2 &RT0 0x25 0x0
163 0x800 0x0 0x0 0x3 &RT0 0x26 0x0
164 0x800 0x0 0x0 0x4 &RT0 0x27 0x0
165
166 0x1000 0x0 0x0 0x1 &RT0 0x25 0x0
167 0x1000 0x0 0x0 0x2 &RT0 0x26 0x0
168 0x1000 0x0 0x0 0x3 &RT0 0x27 0x0
169 0x1000 0x0 0x0 0x4 &RT0 0x24 0x0
170
171 0x1800 0x0 0x0 0x1 &RT0 0x26 0x0
172 0x1800 0x0 0x0 0x2 &RT0 0x27 0x0
173 0x1800 0x0 0x0 0x3 &RT0 0x24 0x0
174 0x1800 0x0 0x0 0x4 &RT0 0x25 0x0
175
176 0x2000 0x0 0x0 0x1 &RT0 0x27 0x0
177 0x2000 0x0 0x0 0x2 &RT0 0x24 0x0
178 0x2000 0x0 0x0 0x3 &RT0 0x25 0x0
179 0x2000 0x0 0x0 0x4 &RT0 0x26 0x0
180 >;
181
182 RT0: router@1180 {
183 device_type = "pic-router";
184 interrupt-controller;
185 big-endian;
186 clock-frequency = <0>;
187 #address-cells = <0>;
188 #interrupt-cells = <2>;
154 interrupts = <0x17 0x2>; 189 interrupts = <0x17 0x2>;
155 interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 190 interrupt-parent = <&MPIC>;
156 /*----------------------------------------------------+
157 | The INTA, INTB, INTC, INTD are shared.
158 +----------------------------------------------------*/
159 interrupt-map = <
160 0x800 0x0 0x0 0x1 &RT0 0x24 0x0
161 0x800 0x0 0x0 0x2 &RT0 0x25 0x0
162 0x800 0x0 0x0 0x3 &RT0 0x26 0x0
163 0x800 0x0 0x0 0x4 &RT0 0x27 0x0
164
165 0x1000 0x0 0x0 0x1 &RT0 0x25 0x0
166 0x1000 0x0 0x0 0x2 &RT0 0x26 0x0
167 0x1000 0x0 0x0 0x3 &RT0 0x27 0x0
168 0x1000 0x0 0x0 0x4 &RT0 0x24 0x0
169
170 0x1800 0x0 0x0 0x1 &RT0 0x26 0x0
171 0x1800 0x0 0x0 0x2 &RT0 0x27 0x0
172 0x1800 0x0 0x0 0x3 &RT0 0x24 0x0
173 0x1800 0x0 0x0 0x4 &RT0 0x25 0x0
174
175 0x2000 0x0 0x0 0x1 &RT0 0x27 0x0
176 0x2000 0x0 0x0 0x2 &RT0 0x24 0x0
177 0x2000 0x0 0x0 0x3 &RT0 0x25 0x0
178 0x2000 0x0 0x0 0x4 &RT0 0x26 0x0
179 >;
180
181 RT0: router@1180 {
182 device_type = "pic-router";
183 interrupt-controller;
184 big-endian;
185 clock-frequency = <0>;
186 #address-cells = <0>;
187 #interrupt-cells = <2>;
188 interrupts = <0x17 0x2>;
189 interrupt-parent = <&MPIC>;
190 };
191 }; 191 };
192 }; 192 };
193 193
diff --git a/arch/powerpc/boot/dts/mgcoge.dts b/arch/powerpc/boot/dts/mgcoge.dts
new file mode 100644
index 000000000000..633255a97557
--- /dev/null
+++ b/arch/powerpc/boot/dts/mgcoge.dts
@@ -0,0 +1,174 @@
1/*
2 * Device Tree for the MGCOGE plattform from keymile
3 *
4 * Copyright 2008 DENX Software Engineering GmbH
5 * Heiko Schocher <hs@denx.de>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13/dts-v1/;
14/ {
15 model = "MGCOGE";
16 compatible = "keymile,mgcoge";
17 #address-cells = <1>;
18 #size-cells = <1>;
19
20 aliases {
21 ethernet0 = &eth0;
22 serial0 = &smc2;
23 };
24
25 cpus {
26 #address-cells = <1>;
27 #size-cells = <0>;
28
29 PowerPC,8247@0 {
30 device_type = "cpu";
31 reg = <0>;
32 d-cache-line-size = <32>;
33 i-cache-line-size = <32>;
34 d-cache-size = <16384>;
35 i-cache-size = <16384>;
36 timebase-frequency = <0>; /* Filled in by U-Boot */
37 clock-frequency = <0>; /* Filled in by U-Boot */
38 bus-frequency = <0>; /* Filled in by U-Boot */
39 };
40 };
41
42 localbus@f0010100 {
43 compatible = "fsl,mpc8247-localbus",
44 "fsl,pq2-localbus",
45 "simple-bus";
46 #address-cells = <2>;
47 #size-cells = <1>;
48 reg = <0xf0010100 0x40>;
49
50 ranges = <0 0 0xfe000000 0x00400000
51 5 0 0x50000000 0x20000000
52 >; /* Filled in by U-Boot */
53
54 flash@0,0 {
55 compatible = "cfi-flash";
56 reg = <0 0x0 0x400000>;
57 #address-cells = <1>;
58 #size-cells = <1>;
59 bank-width = <1>;
60 device-width = <1>;
61 partition@0 {
62 label = "u-boot";
63 reg = <0 0x40000>;
64 };
65 partition@40000 {
66 label = "env";
67 reg = <0x40000 0x20000>;
68 };
69 partition@60000 {
70 label = "kernel";
71 reg = <0x60000 0x220000>;
72 };
73 partition@280000 {
74 label = "dtb";
75 reg = <0x280000 0x20000>;
76 };
77 };
78
79 flash@5,0 {
80 compatible = "cfi-flash";
81 reg = <5 0x0 0x2000000>;
82 #address-cells = <1>;
83 #size-cells = <1>;
84 bank-width = <2>;
85 device-width = <2>;
86 partition@0 {
87 label = "ramdisk";
88 reg = <0 0x7a0000>;
89 };
90 partition@7a0000 {
91 label = "user";
92 reg = <0x7a0000 0x1860000>;
93 };
94 };
95 };
96
97 memory {
98 device_type = "memory";
99 reg = <0 0>; /* Filled in by U-Boot */
100 };
101
102 soc@f0000000 {
103 #address-cells = <1>;
104 #size-cells = <1>;
105 compatible = "fsl,mpc8247-immr", "fsl,pq2-soc", "simple-bus";
106 ranges = <0x00000000 0xf0000000 0x00053000>;
107
108 // Temporary until code stops depending on it.
109 device_type = "soc";
110
111 cpm@119c0 {
112 #address-cells = <1>;
113 #size-cells = <1>;
114 #interrupt-cells = <2>;
115 compatible = "fsl,mpc8247-cpm", "fsl,cpm2",
116 "simple-bus";
117 reg = <0x119c0 0x30>;
118 ranges;
119
120 muram {
121 compatible = "fsl,cpm-muram";
122 #address-cells = <1>;
123 #size-cells = <1>;
124 ranges = <0 0 0x10000>;
125
126 data@0 {
127 compatible = "fsl,cpm-muram-data";
128 reg = <0x80 0x1f80 0x9800 0x800>;
129 };
130 };
131
132 brg@119f0 {
133 compatible = "fsl,mpc8247-brg",
134 "fsl,cpm2-brg",
135 "fsl,cpm-brg";
136 reg = <0x119f0 0x10 0x115f0 0x10>;
137 };
138
139 /* Monitor port/SMC2 */
140 smc2: serial@11a90 {
141 device_type = "serial";
142 compatible = "fsl,mpc8247-smc-uart",
143 "fsl,cpm2-smc-uart";
144 reg = <0x11a90 0x20 0x88fc 0x02>;
145 interrupts = <5 8>;
146 interrupt-parent = <&PIC>;
147 fsl,cpm-brg = <2>;
148 fsl,cpm-command = <0x21200000>;
149 current-speed = <0>; /* Filled in by U-Boot */
150 };
151
152 eth0: ethernet@11a60 {
153 device_type = "network";
154 compatible = "fsl,mpc8247-scc-enet",
155 "fsl,cpm2-scc-enet";
156 reg = <0x11a60 0x20 0x8300 0x100 0x11390 1>;
157 local-mac-address = [ 00 00 00 00 00 00 ]; /* Filled in by U-Boot */
158 interrupts = <43 8>;
159 interrupt-parent = <&PIC>;
160 linux,network-index = <0>;
161 fsl,cpm-command = <0xce00000>;
162 fixed-link = <0 0 10 0 0>;
163 };
164
165 };
166
167 PIC: interrupt-controller@10c00 {
168 #interrupt-cells = <2>;
169 interrupt-controller;
170 reg = <0x10c00 0x80>;
171 compatible = "fsl,mpc8247-pic", "fsl,pq2-pic";
172 };
173 };
174};
diff --git a/arch/powerpc/boot/dts/mgsuvd.dts b/arch/powerpc/boot/dts/mgsuvd.dts
new file mode 100644
index 000000000000..e4fc53ab42bd
--- /dev/null
+++ b/arch/powerpc/boot/dts/mgsuvd.dts
@@ -0,0 +1,163 @@
1/*
2 * MGSUVD Device Tree Source
3 *
4 * Copyright 2008 DENX Software Engineering GmbH
5 * Heiko Schocher <hs@denx.de>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13/dts-v1/;
14/ {
15 model = "MGSUVD";
16 compatible = "keymile,mgsuvd";
17 #address-cells = <1>;
18 #size-cells = <1>;
19
20 cpus {
21 #address-cells = <1>;
22 #size-cells = <0>;
23
24 PowerPC,852@0 {
25 device_type = "cpu";
26 reg = <0>;
27 d-cache-line-size = <16>;
28 i-cache-line-size = <16>;
29 d-cache-size = <8192>;
30 i-cache-size = <8192>;
31 timebase-frequency = <0>; /* Filled in by u-boot */
32 bus-frequency = <0>; /* Filled in by u-boot */
33 clock-frequency = <0>; /* Filled in by u-boot */
34 interrupts = <15 2>; /* decrementer interrupt */
35 interrupt-parent = <&PIC>;
36 };
37 };
38
39 memory {
40 device_type = "memory";
41 reg = <00000000 0x4000000>; /* Filled in by u-boot */
42 };
43
44 localbus@fff00100 {
45 compatible = "fsl,mpc852-localbus", "fsl,pq1-localbus", "simple-bus";
46 #address-cells = <2>;
47 #size-cells = <1>;
48 reg = <0xfff00100 0x40>;
49
50 ranges = <0 0 0xf0000000 0x01000000>; /* Filled in by u-boot */
51
52 flash@0,0 {
53 compatible = "cfi-flash";
54 reg = <0 0 0x1000000>;
55 #address-cells = <1>;
56 #size-cells = <1>;
57 bank-width = <1>;
58 device-width = <1>;
59 partition@0 {
60 label = "u-boot";
61 reg = <0 0x80000>;
62 };
63 partition@80000 {
64 label = "env";
65 reg = <0x80000 0x20000>;
66 };
67 partition@a0000 {
68 label = "kernel";
69 reg = <0xa0000 0x1e0000>;
70 };
71 partition@280000 {
72 label = "dtb";
73 reg = <0x280000 0x20000>;
74 };
75 partition@2a0000 {
76 label = "root";
77 reg = <0x2a0000 0x500000>;
78 };
79 partition@7a0000 {
80 label = "user";
81 reg = <0x7a0000 0x860000>;
82 };
83 };
84 };
85
86 soc@fff00000 {
87 compatible = "fsl,mpc852", "fsl,pq1-soc", "simple-bus";
88 #address-cells = <1>;
89 #size-cells = <1>;
90 device_type = "soc";
91 ranges = <0 0xfff00000 0x00004000>;
92
93 PIC: interrupt-controller@0 {
94 interrupt-controller;
95 #interrupt-cells = <2>;
96 reg = <0 24>;
97 compatible = "fsl,mpc852-pic", "fsl,pq1-pic";
98 };
99
100 cpm@9c0 {
101 #address-cells = <1>;
102 #size-cells = <1>;
103 compatible = "fsl,mpc852-cpm", "fsl,cpm1", "simple-bus";
104 interrupts = <0>; /* cpm error interrupt */
105 interrupt-parent = <&CPM_PIC>;
106 reg = <0x9c0 10>;
107 ranges;
108
109 muram@2000 {
110 compatible = "fsl,cpm-muram";
111 #address-cells = <1>;
112 #size-cells = <1>;
113 ranges = <0 0x2000 0x2000>;
114
115 data@0 {
116 compatible = "fsl,cpm-muram-data";
117 reg = <0x800 0x1800>;
118 };
119 };
120
121 brg@9f0 {
122 compatible = "fsl,mpc852-brg",
123 "fsl,cpm1-brg",
124 "fsl,cpm-brg";
125 reg = <0x9f0 0x10>;
126 clock-frequency = <0>; /* Filled in by u-boot */
127 };
128
129 CPM_PIC: interrupt-controller@930 {
130 interrupt-controller;
131 #interrupt-cells = <1>;
132 interrupts = <5 2 0 2>;
133 interrupt-parent = <&PIC>;
134 reg = <0x930 0x20>;
135 compatible = "fsl,cpm1-pic";
136 };
137
138 /* MON-1 */
139 serial@a80 {
140 device_type = "serial";
141 compatible = "fsl,cpm1-smc-uart";
142 reg = <0xa80 0x10 0x3fc0 0x40>;
143 interrupts = <4>;
144 interrupt-parent = <&CPM_PIC>;
145 fsl,cpm-brg = <1>;
146 fsl,cpm-command = <0x0090>;
147 current-speed = <0>; /* Filled in by u-boot */
148 };
149
150 ethernet@a40 {
151 device_type = "network";
152 compatible = "fsl,mpc866-scc-enet",
153 "fsl,cpm1-scc-enet";
154 reg = <0xa40 0x18 0x3e00 0x100>;
155 local-mac-address = [ 00 00 00 00 00 00 ]; /* Filled in by u-boot */
156 interrupts = <28>;
157 interrupt-parent = <&CPM_PIC>;
158 fsl,cpm-command = <0x80>;
159 fixed-link = <0 0 10 0 0>;
160 };
161 };
162 };
163};
diff --git a/arch/powerpc/boot/dts/mpc5121ads.dts b/arch/powerpc/boot/dts/mpc5121ads.dts
index 1f9036c317b4..c2b8dbfab79e 100644
--- a/arch/powerpc/boot/dts/mpc5121ads.dts
+++ b/arch/powerpc/boot/dts/mpc5121ads.dts
@@ -403,7 +403,8 @@
403 #interrupt-cells = <1>; 403 #interrupt-cells = <1>;
404 #size-cells = <2>; 404 #size-cells = <2>;
405 #address-cells = <3>; 405 #address-cells = <3>;
406 reg = <0x80008500 0x100>; 406 reg = <0x80008500 0x100 /* internal registers */
407 0x80008300 0x8>; /* config space access registers */
407 compatible = "fsl,mpc5121-pci"; 408 compatible = "fsl,mpc5121-pci";
408 device_type = "pci"; 409 device_type = "pci";
409 }; 410 };
diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts b/arch/powerpc/boot/dts/mpc8313erdb.dts
index 2a94ae0dc8b8..747f27676332 100644
--- a/arch/powerpc/boot/dts/mpc8313erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8313erdb.dts
@@ -176,24 +176,28 @@
176 dma-channel@0 { 176 dma-channel@0 {
177 compatible = "fsl,mpc8313-dma-channel", "fsl,elo-dma-channel"; 177 compatible = "fsl,mpc8313-dma-channel", "fsl,elo-dma-channel";
178 reg = <0 0x80>; 178 reg = <0 0x80>;
179 cell-index = <0>;
179 interrupt-parent = <&ipic>; 180 interrupt-parent = <&ipic>;
180 interrupts = <71 8>; 181 interrupts = <71 8>;
181 }; 182 };
182 dma-channel@80 { 183 dma-channel@80 {
183 compatible = "fsl,mpc8313-dma-channel", "fsl,elo-dma-channel"; 184 compatible = "fsl,mpc8313-dma-channel", "fsl,elo-dma-channel";
184 reg = <0x80 0x80>; 185 reg = <0x80 0x80>;
186 cell-index = <1>;
185 interrupt-parent = <&ipic>; 187 interrupt-parent = <&ipic>;
186 interrupts = <71 8>; 188 interrupts = <71 8>;
187 }; 189 };
188 dma-channel@100 { 190 dma-channel@100 {
189 compatible = "fsl,mpc8313-dma-channel", "fsl,elo-dma-channel"; 191 compatible = "fsl,mpc8313-dma-channel", "fsl,elo-dma-channel";
190 reg = <0x100 0x80>; 192 reg = <0x100 0x80>;
193 cell-index = <2>;
191 interrupt-parent = <&ipic>; 194 interrupt-parent = <&ipic>;
192 interrupts = <71 8>; 195 interrupts = <71 8>;
193 }; 196 };
194 dma-channel@180 { 197 dma-channel@180 {
195 compatible = "fsl,mpc8313-dma-channel", "fsl,elo-dma-channel"; 198 compatible = "fsl,mpc8313-dma-channel", "fsl,elo-dma-channel";
196 reg = <0x180 0x28>; 199 reg = <0x180 0x28>;
200 cell-index = <3>;
197 interrupt-parent = <&ipic>; 201 interrupt-parent = <&ipic>;
198 interrupts = <71 8>; 202 interrupts = <71 8>;
199 }; 203 };
@@ -359,7 +363,8 @@
359 #interrupt-cells = <1>; 363 #interrupt-cells = <1>;
360 #size-cells = <2>; 364 #size-cells = <2>;
361 #address-cells = <3>; 365 #address-cells = <3>;
362 reg = <0xe0008500 0x100>; 366 reg = <0xe0008500 0x100 /* internal registers */
367 0xe0008300 0x8>; /* config space access registers */
363 compatible = "fsl,mpc8349-pci"; 368 compatible = "fsl,mpc8349-pci";
364 device_type = "pci"; 369 device_type = "pci";
365 }; 370 };
diff --git a/arch/powerpc/boot/dts/mpc8315erdb.dts b/arch/powerpc/boot/dts/mpc8315erdb.dts
index f704513fb930..7449e54c1a90 100644
--- a/arch/powerpc/boot/dts/mpc8315erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8315erdb.dts
@@ -144,24 +144,28 @@
144 dma-channel@0 { 144 dma-channel@0 {
145 compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel"; 145 compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
146 reg = <0 0x80>; 146 reg = <0 0x80>;
147 cell-index = <0>;
147 interrupt-parent = <&ipic>; 148 interrupt-parent = <&ipic>;
148 interrupts = <71 8>; 149 interrupts = <71 8>;
149 }; 150 };
150 dma-channel@80 { 151 dma-channel@80 {
151 compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel"; 152 compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
152 reg = <0x80 0x80>; 153 reg = <0x80 0x80>;
154 cell-index = <1>;
153 interrupt-parent = <&ipic>; 155 interrupt-parent = <&ipic>;
154 interrupts = <71 8>; 156 interrupts = <71 8>;
155 }; 157 };
156 dma-channel@100 { 158 dma-channel@100 {
157 compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel"; 159 compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
158 reg = <0x100 0x80>; 160 reg = <0x100 0x80>;
161 cell-index = <2>;
159 interrupt-parent = <&ipic>; 162 interrupt-parent = <&ipic>;
160 interrupts = <71 8>; 163 interrupts = <71 8>;
161 }; 164 };
162 dma-channel@180 { 165 dma-channel@180 {
163 compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel"; 166 compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
164 reg = <0x180 0x28>; 167 reg = <0x180 0x28>;
168 cell-index = <3>;
165 interrupt-parent = <&ipic>; 169 interrupt-parent = <&ipic>;
166 interrupts = <71 8>; 170 interrupts = <71 8>;
167 }; 171 };
@@ -314,7 +318,8 @@
314 #interrupt-cells = <1>; 318 #interrupt-cells = <1>;
315 #size-cells = <2>; 319 #size-cells = <2>;
316 #address-cells = <3>; 320 #address-cells = <3>;
317 reg = <0xe0008500 0x100>; 321 reg = <0xe0008500 0x100 /* internal registers */
322 0xe0008300 0x8>; /* config space access registers */
318 compatible = "fsl,mpc8349-pci"; 323 compatible = "fsl,mpc8349-pci";
319 device_type = "pci"; 324 device_type = "pci";
320 }; 325 };
diff --git a/arch/powerpc/boot/dts/mpc832x_mds.dts b/arch/powerpc/boot/dts/mpc832x_mds.dts
index fbc930410ff6..e4cc1768f241 100644
--- a/arch/powerpc/boot/dts/mpc832x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc832x_mds.dts
@@ -127,24 +127,28 @@
127 dma-channel@0 { 127 dma-channel@0 {
128 compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; 128 compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel";
129 reg = <0 0x80>; 129 reg = <0 0x80>;
130 cell-index = <0>;
130 interrupt-parent = <&ipic>; 131 interrupt-parent = <&ipic>;
131 interrupts = <71 8>; 132 interrupts = <71 8>;
132 }; 133 };
133 dma-channel@80 { 134 dma-channel@80 {
134 compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; 135 compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel";
135 reg = <0x80 0x80>; 136 reg = <0x80 0x80>;
137 cell-index = <1>;
136 interrupt-parent = <&ipic>; 138 interrupt-parent = <&ipic>;
137 interrupts = <71 8>; 139 interrupts = <71 8>;
138 }; 140 };
139 dma-channel@100 { 141 dma-channel@100 {
140 compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; 142 compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel";
141 reg = <0x100 0x80>; 143 reg = <0x100 0x80>;
144 cell-index = <2>;
142 interrupt-parent = <&ipic>; 145 interrupt-parent = <&ipic>;
143 interrupts = <71 8>; 146 interrupts = <71 8>;
144 }; 147 };
145 dma-channel@180 { 148 dma-channel@180 {
146 compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; 149 compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel";
147 reg = <0x180 0x28>; 150 reg = <0x180 0x28>;
151 cell-index = <3>;
148 interrupt-parent = <&ipic>; 152 interrupt-parent = <&ipic>;
149 interrupts = <71 8>; 153 interrupts = <71 8>;
150 }; 154 };
@@ -419,7 +423,8 @@
419 #interrupt-cells = <1>; 423 #interrupt-cells = <1>;
420 #size-cells = <2>; 424 #size-cells = <2>;
421 #address-cells = <3>; 425 #address-cells = <3>;
422 reg = <0xe0008500 0x100>; 426 reg = <0xe0008500 0x100 /* internal registers */
427 0xe0008300 0x8>; /* config space access registers */
423 compatible = "fsl,mpc8349-pci"; 428 compatible = "fsl,mpc8349-pci";
424 device_type = "pci"; 429 device_type = "pci";
425 }; 430 };
diff --git a/arch/powerpc/boot/dts/mpc832x_rdb.dts b/arch/powerpc/boot/dts/mpc832x_rdb.dts
index b157d1885a28..226ff066652b 100644
--- a/arch/powerpc/boot/dts/mpc832x_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc832x_rdb.dts
@@ -105,24 +105,28 @@
105 dma-channel@0 { 105 dma-channel@0 {
106 compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; 106 compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel";
107 reg = <0 0x80>; 107 reg = <0 0x80>;
108 cell-index = <0>;
108 interrupt-parent = <&ipic>; 109 interrupt-parent = <&ipic>;
109 interrupts = <71 8>; 110 interrupts = <71 8>;
110 }; 111 };
111 dma-channel@80 { 112 dma-channel@80 {
112 compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; 113 compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel";
113 reg = <0x80 0x80>; 114 reg = <0x80 0x80>;
115 cell-index = <1>;
114 interrupt-parent = <&ipic>; 116 interrupt-parent = <&ipic>;
115 interrupts = <71 8>; 117 interrupts = <71 8>;
116 }; 118 };
117 dma-channel@100 { 119 dma-channel@100 {
118 compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; 120 compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel";
119 reg = <0x100 0x80>; 121 reg = <0x100 0x80>;
122 cell-index = <2>;
120 interrupt-parent = <&ipic>; 123 interrupt-parent = <&ipic>;
121 interrupts = <71 8>; 124 interrupts = <71 8>;
122 }; 125 };
123 dma-channel@180 { 126 dma-channel@180 {
124 compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; 127 compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel";
125 reg = <0x180 0x28>; 128 reg = <0x180 0x28>;
129 cell-index = <3>;
126 interrupt-parent = <&ipic>; 130 interrupt-parent = <&ipic>;
127 interrupts = <71 8>; 131 interrupts = <71 8>;
128 }; 132 };
@@ -327,7 +331,8 @@
327 #interrupt-cells = <1>; 331 #interrupt-cells = <1>;
328 #size-cells = <2>; 332 #size-cells = <2>;
329 #address-cells = <3>; 333 #address-cells = <3>;
330 reg = <0xe0008500 0x100>; 334 reg = <0xe0008500 0x100 /* internal registers */
335 0xe0008300 0x8>; /* config space access registers */
331 compatible = "fsl,mpc8349-pci"; 336 compatible = "fsl,mpc8349-pci";
332 device_type = "pci"; 337 device_type = "pci";
333 }; 338 };
diff --git a/arch/powerpc/boot/dts/mpc8349emitx.dts b/arch/powerpc/boot/dts/mpc8349emitx.dts
index 700e076ef3f5..5cedf373a1d8 100644
--- a/arch/powerpc/boot/dts/mpc8349emitx.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitx.dts
@@ -106,24 +106,28 @@
106 dma-channel@0 { 106 dma-channel@0 {
107 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 107 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
108 reg = <0 0x80>; 108 reg = <0 0x80>;
109 cell-index = <0>;
109 interrupt-parent = <&ipic>; 110 interrupt-parent = <&ipic>;
110 interrupts = <71 8>; 111 interrupts = <71 8>;
111 }; 112 };
112 dma-channel@80 { 113 dma-channel@80 {
113 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 114 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
114 reg = <0x80 0x80>; 115 reg = <0x80 0x80>;
116 cell-index = <1>;
115 interrupt-parent = <&ipic>; 117 interrupt-parent = <&ipic>;
116 interrupts = <71 8>; 118 interrupts = <71 8>;
117 }; 119 };
118 dma-channel@100 { 120 dma-channel@100 {
119 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 121 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
120 reg = <0x100 0x80>; 122 reg = <0x100 0x80>;
123 cell-index = <2>;
121 interrupt-parent = <&ipic>; 124 interrupt-parent = <&ipic>;
122 interrupts = <71 8>; 125 interrupts = <71 8>;
123 }; 126 };
124 dma-channel@180 { 127 dma-channel@180 {
125 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 128 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
126 reg = <0x180 0x28>; 129 reg = <0x180 0x28>;
130 cell-index = <3>;
127 interrupt-parent = <&ipic>; 131 interrupt-parent = <&ipic>;
128 interrupts = <71 8>; 132 interrupts = <71 8>;
129 }; 133 };
@@ -250,7 +254,8 @@
250 #interrupt-cells = <1>; 254 #interrupt-cells = <1>;
251 #size-cells = <2>; 255 #size-cells = <2>;
252 #address-cells = <3>; 256 #address-cells = <3>;
253 reg = <0xe0008500 0x100>; 257 reg = <0xe0008500 0x100 /* internal registers */
258 0xe0008300 0x8>; /* config space access registers */
254 compatible = "fsl,mpc8349-pci"; 259 compatible = "fsl,mpc8349-pci";
255 device_type = "pci"; 260 device_type = "pci";
256 }; 261 };
@@ -276,7 +281,8 @@
276 #interrupt-cells = <1>; 281 #interrupt-cells = <1>;
277 #size-cells = <2>; 282 #size-cells = <2>;
278 #address-cells = <3>; 283 #address-cells = <3>;
279 reg = <0xe0008600 0x100>; 284 reg = <0xe0008600 0x100 /* internal registers */
285 0xe0008380 0x8>; /* config space access registers */
280 compatible = "fsl,mpc8349-pci"; 286 compatible = "fsl,mpc8349-pci";
281 device_type = "pci"; 287 device_type = "pci";
282 }; 288 };
diff --git a/arch/powerpc/boot/dts/mpc8349emitxgp.dts b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
index cdd3063258ea..81ae1d3e9440 100644
--- a/arch/powerpc/boot/dts/mpc8349emitxgp.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
@@ -104,24 +104,28 @@
104 dma-channel@0 { 104 dma-channel@0 {
105 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 105 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
106 reg = <0 0x80>; 106 reg = <0 0x80>;
107 cell-index = <0>;
107 interrupt-parent = <&ipic>; 108 interrupt-parent = <&ipic>;
108 interrupts = <71 8>; 109 interrupts = <71 8>;
109 }; 110 };
110 dma-channel@80 { 111 dma-channel@80 {
111 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 112 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
112 reg = <0x80 0x80>; 113 reg = <0x80 0x80>;
114 cell-index = <1>;
113 interrupt-parent = <&ipic>; 115 interrupt-parent = <&ipic>;
114 interrupts = <71 8>; 116 interrupts = <71 8>;
115 }; 117 };
116 dma-channel@100 { 118 dma-channel@100 {
117 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 119 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
118 reg = <0x100 0x80>; 120 reg = <0x100 0x80>;
121 cell-index = <2>;
119 interrupt-parent = <&ipic>; 122 interrupt-parent = <&ipic>;
120 interrupts = <71 8>; 123 interrupts = <71 8>;
121 }; 124 };
122 dma-channel@180 { 125 dma-channel@180 {
123 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 126 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
124 reg = <0x180 0x28>; 127 reg = <0x180 0x28>;
128 cell-index = <3>;
125 interrupt-parent = <&ipic>; 129 interrupt-parent = <&ipic>;
126 interrupts = <71 8>; 130 interrupts = <71 8>;
127 }; 131 };
@@ -224,7 +228,8 @@
224 #interrupt-cells = <1>; 228 #interrupt-cells = <1>;
225 #size-cells = <2>; 229 #size-cells = <2>;
226 #address-cells = <3>; 230 #address-cells = <3>;
227 reg = <0xe0008600 0x100>; 231 reg = <0xe0008600 0x100 /* internal registers */
232 0xe0008380 0x8>; /* config space access registers */
228 compatible = "fsl,mpc8349-pci"; 233 compatible = "fsl,mpc8349-pci";
229 device_type = "pci"; 234 device_type = "pci";
230 }; 235 };
diff --git a/arch/powerpc/boot/dts/mpc834x_mds.dts b/arch/powerpc/boot/dts/mpc834x_mds.dts
index 783241c00240..04bfde3ea605 100644
--- a/arch/powerpc/boot/dts/mpc834x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc834x_mds.dts
@@ -116,24 +116,28 @@
116 dma-channel@0 { 116 dma-channel@0 {
117 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 117 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
118 reg = <0 0x80>; 118 reg = <0 0x80>;
119 cell-index = <0>;
119 interrupt-parent = <&ipic>; 120 interrupt-parent = <&ipic>;
120 interrupts = <71 8>; 121 interrupts = <71 8>;
121 }; 122 };
122 dma-channel@80 { 123 dma-channel@80 {
123 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 124 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
124 reg = <0x80 0x80>; 125 reg = <0x80 0x80>;
126 cell-index = <1>;
125 interrupt-parent = <&ipic>; 127 interrupt-parent = <&ipic>;
126 interrupts = <71 8>; 128 interrupts = <71 8>;
127 }; 129 };
128 dma-channel@100 { 130 dma-channel@100 {
129 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 131 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
130 reg = <0x100 0x80>; 132 reg = <0x100 0x80>;
133 cell-index = <2>;
131 interrupt-parent = <&ipic>; 134 interrupt-parent = <&ipic>;
132 interrupts = <71 8>; 135 interrupts = <71 8>;
133 }; 136 };
134 dma-channel@180 { 137 dma-channel@180 {
135 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 138 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
136 reg = <0x180 0x28>; 139 reg = <0x180 0x28>;
140 cell-index = <3>;
137 interrupt-parent = <&ipic>; 141 interrupt-parent = <&ipic>;
138 interrupts = <71 8>; 142 interrupts = <71 8>;
139 }; 143 };
@@ -311,7 +315,8 @@
311 #interrupt-cells = <1>; 315 #interrupt-cells = <1>;
312 #size-cells = <2>; 316 #size-cells = <2>;
313 #address-cells = <3>; 317 #address-cells = <3>;
314 reg = <0xe0008500 0x100>; 318 reg = <0xe0008500 0x100 /* internal registers */
319 0xe0008300 0x8>; /* config space access registers */
315 compatible = "fsl,mpc8349-pci"; 320 compatible = "fsl,mpc8349-pci";
316 device_type = "pci"; 321 device_type = "pci";
317 }; 322 };
@@ -372,7 +377,8 @@
372 #interrupt-cells = <1>; 377 #interrupt-cells = <1>;
373 #size-cells = <2>; 378 #size-cells = <2>;
374 #address-cells = <3>; 379 #address-cells = <3>;
375 reg = <0xe0008600 0x100>; 380 reg = <0xe0008600 0x100 /* internal registers */
381 0xe0008380 0x8>; /* config space access registers */
376 compatible = "fsl,mpc8349-pci"; 382 compatible = "fsl,mpc8349-pci";
377 device_type = "pci"; 383 device_type = "pci";
378 }; 384 };
diff --git a/arch/powerpc/boot/dts/mpc836x_mds.dts b/arch/powerpc/boot/dts/mpc836x_mds.dts
index a3b76a709951..66a12d2631fb 100644
--- a/arch/powerpc/boot/dts/mpc836x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc836x_mds.dts
@@ -52,9 +52,26 @@
52 reg = <0x00000000 0x10000000>; 52 reg = <0x00000000 0x10000000>;
53 }; 53 };
54 54
55 bcsr@f8000000 { 55 localbus@e0005000 {
56 device_type = "board-control"; 56 #address-cells = <2>;
57 reg = <0xf8000000 0x8000>; 57 #size-cells = <1>;
58 compatible = "fsl,mpc8360-localbus", "fsl,pq2pro-localbus",
59 "simple-bus";
60 reg = <0xe0005000 0xd8>;
61 ranges = <0 0 0xfe000000 0x02000000
62 1 0 0xf8000000 0x00008000>;
63
64 flash@0,0 {
65 compatible = "cfi-flash";
66 reg = <0 0 0x2000000>;
67 bank-width = <2>;
68 device-width = <1>;
69 };
70
71 bcsr@1,0 {
72 device_type = "board-control";
73 reg = <1 0 0x8000>;
74 };
58 }; 75 };
59 76
60 soc8360@e0000000 { 77 soc8360@e0000000 {
@@ -131,24 +148,28 @@
131 dma-channel@0 { 148 dma-channel@0 {
132 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; 149 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
133 reg = <0 0x80>; 150 reg = <0 0x80>;
151 cell-index = <0>;
134 interrupt-parent = <&ipic>; 152 interrupt-parent = <&ipic>;
135 interrupts = <71 8>; 153 interrupts = <71 8>;
136 }; 154 };
137 dma-channel@80 { 155 dma-channel@80 {
138 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; 156 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
139 reg = <0x80 0x80>; 157 reg = <0x80 0x80>;
158 cell-index = <1>;
140 interrupt-parent = <&ipic>; 159 interrupt-parent = <&ipic>;
141 interrupts = <71 8>; 160 interrupts = <71 8>;
142 }; 161 };
143 dma-channel@100 { 162 dma-channel@100 {
144 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; 163 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
145 reg = <0x100 0x80>; 164 reg = <0x100 0x80>;
165 cell-index = <2>;
146 interrupt-parent = <&ipic>; 166 interrupt-parent = <&ipic>;
147 interrupts = <71 8>; 167 interrupts = <71 8>;
148 }; 168 };
149 dma-channel@180 { 169 dma-channel@180 {
150 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; 170 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
151 reg = <0x180 0x28>; 171 reg = <0x180 0x28>;
172 cell-index = <3>;
152 interrupt-parent = <&ipic>; 173 interrupt-parent = <&ipic>;
153 interrupts = <71 8>; 174 interrupts = <71 8>;
154 }; 175 };
@@ -405,7 +426,8 @@
405 #interrupt-cells = <1>; 426 #interrupt-cells = <1>;
406 #size-cells = <2>; 427 #size-cells = <2>;
407 #address-cells = <3>; 428 #address-cells = <3>;
408 reg = <0xe0008500 0x100>; 429 reg = <0xe0008500 0x100 /* internal registers */
430 0xe0008300 0x8>; /* config space access registers */
409 compatible = "fsl,mpc8349-pci"; 431 compatible = "fsl,mpc8349-pci";
410 device_type = "pci"; 432 device_type = "pci";
411 }; 433 };
diff --git a/arch/powerpc/boot/dts/mpc836x_rdk.dts b/arch/powerpc/boot/dts/mpc836x_rdk.dts
index 89c9202f8bd7..decadf3d9e98 100644
--- a/arch/powerpc/boot/dts/mpc836x_rdk.dts
+++ b/arch/powerpc/boot/dts/mpc836x_rdk.dts
@@ -125,24 +125,28 @@
125 dma-channel@0 { 125 dma-channel@0 {
126 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; 126 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
127 reg = <0 0x80>; 127 reg = <0 0x80>;
128 cell-index = <0>;
128 interrupt-parent = <&ipic>; 129 interrupt-parent = <&ipic>;
129 interrupts = <71 8>; 130 interrupts = <71 8>;
130 }; 131 };
131 dma-channel@80 { 132 dma-channel@80 {
132 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; 133 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
133 reg = <0x80 0x80>; 134 reg = <0x80 0x80>;
135 cell-index = <1>;
134 interrupt-parent = <&ipic>; 136 interrupt-parent = <&ipic>;
135 interrupts = <71 8>; 137 interrupts = <71 8>;
136 }; 138 };
137 dma-channel@100 { 139 dma-channel@100 {
138 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; 140 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
139 reg = <0x100 0x80>; 141 reg = <0x100 0x80>;
142 cell-index = <2>;
140 interrupt-parent = <&ipic>; 143 interrupt-parent = <&ipic>;
141 interrupts = <71 8>; 144 interrupts = <71 8>;
142 }; 145 };
143 dma-channel@180 { 146 dma-channel@180 {
144 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; 147 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
145 reg = <0x180 0x28>; 148 reg = <0x180 0x28>;
149 cell-index = <3>;
146 interrupt-parent = <&ipic>; 150 interrupt-parent = <&ipic>;
147 interrupts = <71 8>; 151 interrupts = <71 8>;
148 }; 152 };
@@ -383,6 +387,18 @@
383 device-width = <1>; 387 device-width = <1>;
384 }; 388 };
385 389
390 upm@1,0 {
391 compatible = "fsl,upm-nand";
392 reg = <1 0 1>;
393 fsl,upm-addr-offset = <16>;
394 fsl,upm-cmd-offset = <8>;
395 gpios = <&qe_pio_e 18 0>;
396
397 flash {
398 compatible = "stm,nand512-a";
399 };
400 };
401
386 display@2,0 { 402 display@2,0 {
387 device_type = "display"; 403 device_type = "display";
388 compatible = "fujitsu,MB86277", "fujitsu,mint"; 404 compatible = "fujitsu,MB86277", "fujitsu,mint";
@@ -405,7 +421,8 @@
405 #interrupt-cells = <1>; 421 #interrupt-cells = <1>;
406 device_type = "pci"; 422 device_type = "pci";
407 compatible = "fsl,mpc8360-pci", "fsl,mpc8349-pci"; 423 compatible = "fsl,mpc8360-pci", "fsl,mpc8349-pci";
408 reg = <0xe0008500 0x100>; 424 reg = <0xe0008500 0x100 /* internal registers */
425 0xe0008300 0x8>; /* config space access registers */
409 ranges = <0x02000000 0 0x90000000 0x90000000 0 0x10000000 426 ranges = <0x02000000 0 0x90000000 0x90000000 0 0x10000000
410 0x42000000 0 0x80000000 0x80000000 0 0x10000000 427 0x42000000 0 0x80000000 0x80000000 0 0x10000000
411 0x01000000 0 0xe0300000 0xe0300000 0 0x00100000>; 428 0x01000000 0 0xe0300000 0xe0300000 0 0x00100000>;
diff --git a/arch/powerpc/boot/dts/mpc8377_mds.dts b/arch/powerpc/boot/dts/mpc8377_mds.dts
index 432782b6d20a..0484561bd2c0 100644
--- a/arch/powerpc/boot/dts/mpc8377_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8377_mds.dts
@@ -136,6 +136,13 @@
136 interrupts = <14 0x8>; 136 interrupts = <14 0x8>;
137 interrupt-parent = <&ipic>; 137 interrupt-parent = <&ipic>;
138 dfsrr; 138 dfsrr;
139
140 rtc@68 {
141 compatible = "dallas,ds1374";
142 reg = <0x68>;
143 interrupts = <19 0x8>;
144 interrupt-parent = <&ipic>;
145 };
139 }; 146 };
140 147
141 i2c@3100 { 148 i2c@3100 {
@@ -246,24 +253,28 @@
246 dma-channel@0 { 253 dma-channel@0 {
247 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; 254 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
248 reg = <0 0x80>; 255 reg = <0 0x80>;
256 cell-index = <0>;
249 interrupt-parent = <&ipic>; 257 interrupt-parent = <&ipic>;
250 interrupts = <0x47 8>; 258 interrupts = <0x47 8>;
251 }; 259 };
252 dma-channel@80 { 260 dma-channel@80 {
253 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; 261 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
254 reg = <0x80 0x80>; 262 reg = <0x80 0x80>;
263 cell-index = <1>;
255 interrupt-parent = <&ipic>; 264 interrupt-parent = <&ipic>;
256 interrupts = <0x47 8>; 265 interrupts = <0x47 8>;
257 }; 266 };
258 dma-channel@100 { 267 dma-channel@100 {
259 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; 268 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
260 reg = <0x100 0x80>; 269 reg = <0x100 0x80>;
270 cell-index = <2>;
261 interrupt-parent = <&ipic>; 271 interrupt-parent = <&ipic>;
262 interrupts = <0x47 8>; 272 interrupts = <0x47 8>;
263 }; 273 };
264 dma-channel@180 { 274 dma-channel@180 {
265 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; 275 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
266 reg = <0x180 0x28>; 276 reg = <0x180 0x28>;
277 cell-index = <3>;
267 interrupt-parent = <&ipic>; 278 interrupt-parent = <&ipic>;
268 interrupts = <0x47 8>; 279 interrupts = <0x47 8>;
269 }; 280 };
@@ -374,7 +385,8 @@
374 #interrupt-cells = <1>; 385 #interrupt-cells = <1>;
375 #size-cells = <2>; 386 #size-cells = <2>;
376 #address-cells = <3>; 387 #address-cells = <3>;
377 reg = <0xe0008500 0x100>; 388 reg = <0xe0008500 0x100 /* internal registers */
389 0xe0008300 0x8>; /* config space access registers */
378 compatible = "fsl,mpc8349-pci"; 390 compatible = "fsl,mpc8349-pci";
379 device_type = "pci"; 391 device_type = "pci";
380 }; 392 };
diff --git a/arch/powerpc/boot/dts/mpc8377_rdb.dts b/arch/powerpc/boot/dts/mpc8377_rdb.dts
index ed137aa83d5f..53191ba67aaa 100644
--- a/arch/powerpc/boot/dts/mpc8377_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts
@@ -155,24 +155,28 @@
155 dma-channel@0 { 155 dma-channel@0 {
156 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; 156 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
157 reg = <0 0x80>; 157 reg = <0 0x80>;
158 cell-index = <0>;
158 interrupt-parent = <&ipic>; 159 interrupt-parent = <&ipic>;
159 interrupts = <71 8>; 160 interrupts = <71 8>;
160 }; 161 };
161 dma-channel@80 { 162 dma-channel@80 {
162 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; 163 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
163 reg = <0x80 0x80>; 164 reg = <0x80 0x80>;
165 cell-index = <1>;
164 interrupt-parent = <&ipic>; 166 interrupt-parent = <&ipic>;
165 interrupts = <71 8>; 167 interrupts = <71 8>;
166 }; 168 };
167 dma-channel@100 { 169 dma-channel@100 {
168 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; 170 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
169 reg = <0x100 0x80>; 171 reg = <0x100 0x80>;
172 cell-index = <2>;
170 interrupt-parent = <&ipic>; 173 interrupt-parent = <&ipic>;
171 interrupts = <71 8>; 174 interrupts = <71 8>;
172 }; 175 };
173 dma-channel@180 { 176 dma-channel@180 {
174 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; 177 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
175 reg = <0x180 0x28>; 178 reg = <0x180 0x28>;
179 cell-index = <3>;
176 interrupt-parent = <&ipic>; 180 interrupt-parent = <&ipic>;
177 interrupts = <71 8>; 181 interrupts = <71 8>;
178 }; 182 };
@@ -315,7 +319,8 @@
315 #interrupt-cells = <1>; 319 #interrupt-cells = <1>;
316 #size-cells = <2>; 320 #size-cells = <2>;
317 #address-cells = <3>; 321 #address-cells = <3>;
318 reg = <0xe0008500 0x100>; 322 reg = <0xe0008500 0x100 /* internal registers */
323 0xe0008300 0x8>; /* config space access registers */
319 compatible = "fsl,mpc8349-pci"; 324 compatible = "fsl,mpc8349-pci";
320 device_type = "pci"; 325 device_type = "pci";
321 }; 326 };
diff --git a/arch/powerpc/boot/dts/mpc8378_mds.dts b/arch/powerpc/boot/dts/mpc8378_mds.dts
index ed32c8ddafe3..67a08d2e2ff2 100644
--- a/arch/powerpc/boot/dts/mpc8378_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8378_mds.dts
@@ -136,6 +136,13 @@
136 interrupts = <14 0x8>; 136 interrupts = <14 0x8>;
137 interrupt-parent = <&ipic>; 137 interrupt-parent = <&ipic>;
138 dfsrr; 138 dfsrr;
139
140 rtc@68 {
141 compatible = "dallas,ds1374";
142 reg = <0x68>;
143 interrupts = <19 0x8>;
144 interrupt-parent = <&ipic>;
145 };
139 }; 146 };
140 147
141 i2c@3100 { 148 i2c@3100 {
@@ -170,24 +177,28 @@
170 dma-channel@0 { 177 dma-channel@0 {
171 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; 178 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
172 reg = <0 0x80>; 179 reg = <0 0x80>;
180 cell-index = <0>;
173 interrupt-parent = <&ipic>; 181 interrupt-parent = <&ipic>;
174 interrupts = <71 8>; 182 interrupts = <71 8>;
175 }; 183 };
176 dma-channel@80 { 184 dma-channel@80 {
177 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; 185 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
178 reg = <0x80 0x80>; 186 reg = <0x80 0x80>;
187 cell-index = <1>;
179 interrupt-parent = <&ipic>; 188 interrupt-parent = <&ipic>;
180 interrupts = <71 8>; 189 interrupts = <71 8>;
181 }; 190 };
182 dma-channel@100 { 191 dma-channel@100 {
183 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; 192 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
184 reg = <0x100 0x80>; 193 reg = <0x100 0x80>;
194 cell-index = <2>;
185 interrupt-parent = <&ipic>; 195 interrupt-parent = <&ipic>;
186 interrupts = <71 8>; 196 interrupts = <71 8>;
187 }; 197 };
188 dma-channel@180 { 198 dma-channel@180 {
189 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; 199 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
190 reg = <0x180 0x28>; 200 reg = <0x180 0x28>;
201 cell-index = <3>;
191 interrupt-parent = <&ipic>; 202 interrupt-parent = <&ipic>;
192 interrupts = <71 8>; 203 interrupts = <71 8>;
193 }; 204 };
@@ -360,7 +371,8 @@
360 #interrupt-cells = <1>; 371 #interrupt-cells = <1>;
361 #size-cells = <2>; 372 #size-cells = <2>;
362 #address-cells = <3>; 373 #address-cells = <3>;
363 reg = <0xe0008500 0x100>; 374 reg = <0xe0008500 0x100 /* internal registers */
375 0xe0008300 0x8>; /* config space access registers */
364 compatible = "fsl,mpc8349-pci"; 376 compatible = "fsl,mpc8349-pci";
365 device_type = "pci"; 377 device_type = "pci";
366 }; 378 };
diff --git a/arch/powerpc/boot/dts/mpc8378_rdb.dts b/arch/powerpc/boot/dts/mpc8378_rdb.dts
index 34a7f2f935e1..4a09153d160c 100644
--- a/arch/powerpc/boot/dts/mpc8378_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8378_rdb.dts
@@ -155,24 +155,28 @@
155 dma-channel@0 { 155 dma-channel@0 {
156 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; 156 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
157 reg = <0 0x80>; 157 reg = <0 0x80>;
158 cell-index = <0>;
158 interrupt-parent = <&ipic>; 159 interrupt-parent = <&ipic>;
159 interrupts = <71 8>; 160 interrupts = <71 8>;
160 }; 161 };
161 dma-channel@80 { 162 dma-channel@80 {
162 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; 163 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
163 reg = <0x80 0x80>; 164 reg = <0x80 0x80>;
165 cell-index = <1>;
164 interrupt-parent = <&ipic>; 166 interrupt-parent = <&ipic>;
165 interrupts = <71 8>; 167 interrupts = <71 8>;
166 }; 168 };
167 dma-channel@100 { 169 dma-channel@100 {
168 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; 170 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
169 reg = <0x100 0x80>; 171 reg = <0x100 0x80>;
172 cell-index = <2>;
170 interrupt-parent = <&ipic>; 173 interrupt-parent = <&ipic>;
171 interrupts = <71 8>; 174 interrupts = <71 8>;
172 }; 175 };
173 dma-channel@180 { 176 dma-channel@180 {
174 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; 177 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
175 reg = <0x180 0x28>; 178 reg = <0x180 0x28>;
179 cell-index = <3>;
176 interrupt-parent = <&ipic>; 180 interrupt-parent = <&ipic>;
177 interrupts = <71 8>; 181 interrupts = <71 8>;
178 }; 182 };
@@ -301,7 +305,8 @@
301 #interrupt-cells = <1>; 305 #interrupt-cells = <1>;
302 #size-cells = <2>; 306 #size-cells = <2>;
303 #address-cells = <3>; 307 #address-cells = <3>;
304 reg = <0xe0008500 0x100>; 308 reg = <0xe0008500 0x100 /* internal registers */
309 0xe0008300 0x8>; /* config space access registers */
305 compatible = "fsl,mpc8349-pci"; 310 compatible = "fsl,mpc8349-pci";
306 device_type = "pci"; 311 device_type = "pci";
307 }; 312 };
diff --git a/arch/powerpc/boot/dts/mpc8379_mds.dts b/arch/powerpc/boot/dts/mpc8379_mds.dts
index f4db9ed4a301..323370a2b5ff 100644
--- a/arch/powerpc/boot/dts/mpc8379_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8379_mds.dts
@@ -136,6 +136,13 @@
136 interrupts = <14 0x8>; 136 interrupts = <14 0x8>;
137 interrupt-parent = <&ipic>; 137 interrupt-parent = <&ipic>;
138 dfsrr; 138 dfsrr;
139
140 rtc@68 {
141 compatible = "dallas,ds1374";
142 reg = <0x68>;
143 interrupts = <19 0x8>;
144 interrupt-parent = <&ipic>;
145 };
139 }; 146 };
140 147
141 i2c@3100 { 148 i2c@3100 {
@@ -170,24 +177,28 @@
170 dma-channel@0 { 177 dma-channel@0 {
171 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; 178 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
172 reg = <0 0x80>; 179 reg = <0 0x80>;
180 cell-index = <0>;
173 interrupt-parent = <&ipic>; 181 interrupt-parent = <&ipic>;
174 interrupts = <71 8>; 182 interrupts = <71 8>;
175 }; 183 };
176 dma-channel@80 { 184 dma-channel@80 {
177 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; 185 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
178 reg = <0x80 0x80>; 186 reg = <0x80 0x80>;
187 cell-index = <1>;
179 interrupt-parent = <&ipic>; 188 interrupt-parent = <&ipic>;
180 interrupts = <71 8>; 189 interrupts = <71 8>;
181 }; 190 };
182 dma-channel@100 { 191 dma-channel@100 {
183 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; 192 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
184 reg = <0x100 0x80>; 193 reg = <0x100 0x80>;
194 cell-index = <2>;
185 interrupt-parent = <&ipic>; 195 interrupt-parent = <&ipic>;
186 interrupts = <71 8>; 196 interrupts = <71 8>;
187 }; 197 };
188 dma-channel@180 { 198 dma-channel@180 {
189 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; 199 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
190 reg = <0x180 0x28>; 200 reg = <0x180 0x28>;
201 cell-index = <3>;
191 interrupt-parent = <&ipic>; 202 interrupt-parent = <&ipic>;
192 interrupts = <71 8>; 203 interrupts = <71 8>;
193 }; 204 };
@@ -388,7 +399,8 @@
388 #interrupt-cells = <1>; 399 #interrupt-cells = <1>;
389 #size-cells = <2>; 400 #size-cells = <2>;
390 #address-cells = <3>; 401 #address-cells = <3>;
391 reg = <0xe0008500 0x100>; 402 reg = <0xe0008500 0x100 /* internal registers */
403 0xe0008300 0x8>; /* config space access registers */
392 compatible = "fsl,mpc8349-pci"; 404 compatible = "fsl,mpc8349-pci";
393 device_type = "pci"; 405 device_type = "pci";
394 }; 406 };
diff --git a/arch/powerpc/boot/dts/mpc8379_rdb.dts b/arch/powerpc/boot/dts/mpc8379_rdb.dts
index e4d7030d50e5..bbd884ac9dc0 100644
--- a/arch/powerpc/boot/dts/mpc8379_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8379_rdb.dts
@@ -155,24 +155,28 @@
155 dma-channel@0 { 155 dma-channel@0 {
156 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; 156 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
157 reg = <0 0x80>; 157 reg = <0 0x80>;
158 cell-index = <0>;
158 interrupt-parent = <&ipic>; 159 interrupt-parent = <&ipic>;
159 interrupts = <71 8>; 160 interrupts = <71 8>;
160 }; 161 };
161 dma-channel@80 { 162 dma-channel@80 {
162 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; 163 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
163 reg = <0x80 0x80>; 164 reg = <0x80 0x80>;
165 cell-index = <1>;
164 interrupt-parent = <&ipic>; 166 interrupt-parent = <&ipic>;
165 interrupts = <71 8>; 167 interrupts = <71 8>;
166 }; 168 };
167 dma-channel@100 { 169 dma-channel@100 {
168 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; 170 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
169 reg = <0x100 0x80>; 171 reg = <0x100 0x80>;
172 cell-index = <2>;
170 interrupt-parent = <&ipic>; 173 interrupt-parent = <&ipic>;
171 interrupts = <71 8>; 174 interrupts = <71 8>;
172 }; 175 };
173 dma-channel@180 { 176 dma-channel@180 {
174 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; 177 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
175 reg = <0x180 0x28>; 178 reg = <0x180 0x28>;
179 cell-index = <3>;
176 interrupt-parent = <&ipic>; 180 interrupt-parent = <&ipic>;
177 interrupts = <71 8>; 181 interrupts = <71 8>;
178 }; 182 };
@@ -329,7 +333,8 @@
329 #interrupt-cells = <1>; 333 #interrupt-cells = <1>;
330 #size-cells = <2>; 334 #size-cells = <2>;
331 #address-cells = <3>; 335 #address-cells = <3>;
332 reg = <0xe0008500 0x100>; 336 reg = <0xe0008500 0x100 /* internal registers */
337 0xe0008300 0x8>; /* config space access registers */
333 compatible = "fsl,mpc8349-pci"; 338 compatible = "fsl,mpc8349-pci";
334 device_type = "pci"; 339 device_type = "pci";
335 }; 340 };
diff --git a/arch/powerpc/boot/dts/mpc8536ds.dts b/arch/powerpc/boot/dts/mpc8536ds.dts
index 1505d6855eff..93fdd99901b6 100644
--- a/arch/powerpc/boot/dts/mpc8536ds.dts
+++ b/arch/powerpc/boot/dts/mpc8536ds.dts
@@ -91,6 +91,8 @@
91 rtc@68 { 91 rtc@68 {
92 compatible = "dallas,ds3232"; 92 compatible = "dallas,ds3232";
93 reg = <0x68>; 93 reg = <0x68>;
94 interrupts = <0 0x1>;
95 interrupt-parent = <&mpic>;
94 }; 96 };
95 }; 97 };
96 98
diff --git a/arch/powerpc/boot/dts/mpc8610_hpcd.dts b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
index 3b3a1062cb25..f724d72c7b92 100644
--- a/arch/powerpc/boot/dts/mpc8610_hpcd.dts
+++ b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
@@ -207,7 +207,7 @@
207 reg = <0xe4000 0x100>; 207 reg = <0xe4000 0x100>;
208 }; 208 };
209 209
210 i2s@16000 { 210 ssi@16000 {
211 compatible = "fsl,mpc8610-ssi"; 211 compatible = "fsl,mpc8610-ssi";
212 cell-index = <0>; 212 cell-index = <0>;
213 reg = <0x16000 0x100>; 213 reg = <0x16000 0x100>;
@@ -215,6 +215,8 @@
215 interrupts = <62 2>; 215 interrupts = <62 2>;
216 fsl,mode = "i2s-slave"; 216 fsl,mode = "i2s-slave";
217 codec-handle = <&cs4270>; 217 codec-handle = <&cs4270>;
218 fsl,playback-dma = <&dma00>;
219 fsl,capture-dma = <&dma01>;
218 }; 220 };
219 221
220 ssi@16100 { 222 ssi@16100 {
@@ -233,17 +235,17 @@
233 reg = <0x21300 0x4>; /* DMA general status register */ 235 reg = <0x21300 0x4>; /* DMA general status register */
234 ranges = <0x0 0x21100 0x200>; 236 ranges = <0x0 0x21100 0x200>;
235 237
236 dma-channel@0 { 238 dma00: dma-channel@0 {
237 compatible = "fsl,mpc8610-dma-channel", 239 compatible = "fsl,mpc8610-dma-channel",
238 "fsl,eloplus-dma-channel"; 240 "fsl,ssi-dma-channel";
239 cell-index = <0>; 241 cell-index = <0>;
240 reg = <0x0 0x80>; 242 reg = <0x0 0x80>;
241 interrupt-parent = <&mpic>; 243 interrupt-parent = <&mpic>;
242 interrupts = <20 2>; 244 interrupts = <20 2>;
243 }; 245 };
244 dma-channel@1 { 246 dma01: dma-channel@1 {
245 compatible = "fsl,mpc8610-dma-channel", 247 compatible = "fsl,mpc8610-dma-channel",
246 "fsl,eloplus-dma-channel"; 248 "fsl,ssi-dma-channel";
247 cell-index = <1>; 249 cell-index = <1>;
248 reg = <0x80 0x80>; 250 reg = <0x80 0x80>;
249 interrupt-parent = <&mpic>; 251 interrupt-parent = <&mpic>;
@@ -281,7 +283,7 @@
281 cell-index = <0>; 283 cell-index = <0>;
282 reg = <0x0 0x80>; 284 reg = <0x0 0x80>;
283 interrupt-parent = <&mpic>; 285 interrupt-parent = <&mpic>;
284 interrupts = <60 2>; 286 interrupts = <76 2>;
285 }; 287 };
286 dma-channel@1 { 288 dma-channel@1 {
287 compatible = "fsl,mpc8610-dma-channel", 289 compatible = "fsl,mpc8610-dma-channel",
@@ -289,7 +291,7 @@
289 cell-index = <1>; 291 cell-index = <1>;
290 reg = <0x80 0x80>; 292 reg = <0x80 0x80>;
291 interrupt-parent = <&mpic>; 293 interrupt-parent = <&mpic>;
292 interrupts = <61 2>; 294 interrupts = <77 2>;
293 }; 295 };
294 dma-channel@2 { 296 dma-channel@2 {
295 compatible = "fsl,mpc8610-dma-channel", 297 compatible = "fsl,mpc8610-dma-channel",
@@ -297,7 +299,7 @@
297 cell-index = <2>; 299 cell-index = <2>;
298 reg = <0x100 0x80>; 300 reg = <0x100 0x80>;
299 interrupt-parent = <&mpic>; 301 interrupt-parent = <&mpic>;
300 interrupts = <62 2>; 302 interrupts = <78 2>;
301 }; 303 };
302 dma-channel@3 { 304 dma-channel@3 {
303 compatible = "fsl,mpc8610-dma-channel", 305 compatible = "fsl,mpc8610-dma-channel",
@@ -305,7 +307,7 @@
305 cell-index = <3>; 307 cell-index = <3>;
306 reg = <0x180 0x80>; 308 reg = <0x180 0x80>;
307 interrupt-parent = <&mpic>; 309 interrupt-parent = <&mpic>;
308 interrupts = <63 2>; 310 interrupts = <79 2>;
309 }; 311 };
310 }; 312 };
311 313
diff --git a/arch/powerpc/boot/dts/sbc8349.dts b/arch/powerpc/boot/dts/sbc8349.dts
index 45f789b56709..0f941f310e44 100644
--- a/arch/powerpc/boot/dts/sbc8349.dts
+++ b/arch/powerpc/boot/dts/sbc8349.dts
@@ -107,24 +107,28 @@
107 dma-channel@0 { 107 dma-channel@0 {
108 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 108 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
109 reg = <0 0x80>; 109 reg = <0 0x80>;
110 cell-index = <0>;
110 interrupt-parent = <&ipic>; 111 interrupt-parent = <&ipic>;
111 interrupts = <71 8>; 112 interrupts = <71 8>;
112 }; 113 };
113 dma-channel@80 { 114 dma-channel@80 {
114 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 115 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
115 reg = <0x80 0x80>; 116 reg = <0x80 0x80>;
117 cell-index = <1>;
116 interrupt-parent = <&ipic>; 118 interrupt-parent = <&ipic>;
117 interrupts = <71 8>; 119 interrupts = <71 8>;
118 }; 120 };
119 dma-channel@100 { 121 dma-channel@100 {
120 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 122 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
121 reg = <0x100 0x80>; 123 reg = <0x100 0x80>;
124 cell-index = <2>;
122 interrupt-parent = <&ipic>; 125 interrupt-parent = <&ipic>;
123 interrupts = <71 8>; 126 interrupts = <71 8>;
124 }; 127 };
125 dma-channel@180 { 128 dma-channel@180 {
126 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 129 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
127 reg = <0x180 0x28>; 130 reg = <0x180 0x28>;
131 cell-index = <3>;
128 interrupt-parent = <&ipic>; 132 interrupt-parent = <&ipic>;
129 interrupts = <71 8>; 133 interrupts = <71 8>;
130 }; 134 };
@@ -268,7 +272,8 @@
268 #interrupt-cells = <1>; 272 #interrupt-cells = <1>;
269 #size-cells = <2>; 273 #size-cells = <2>;
270 #address-cells = <3>; 274 #address-cells = <3>;
271 reg = <0xe0008500 0x100>; 275 reg = <0xe0008500 0x100 /* internal registers */
276 0xe0008300 0x8>; /* config space access registers */
272 compatible = "fsl,mpc8349-pci"; 277 compatible = "fsl,mpc8349-pci";
273 device_type = "pci"; 278 device_type = "pci";
274 }; 279 };
diff --git a/arch/powerpc/boot/dts/sequoia.dts b/arch/powerpc/boot/dts/sequoia.dts
index 72d15f075d34..3b295e8df53f 100644
--- a/arch/powerpc/boot/dts/sequoia.dts
+++ b/arch/powerpc/boot/dts/sequoia.dts
@@ -246,13 +246,22 @@
246 }; 246 };
247 247
248 IIC0: i2c@ef600700 { 248 IIC0: i2c@ef600700 {
249 #address-cells = <1>;
250 #size-cells = <0>;
249 compatible = "ibm,iic-440epx", "ibm,iic"; 251 compatible = "ibm,iic-440epx", "ibm,iic";
250 reg = <0xef600700 0x00000014>; 252 reg = <0xef600700 0x00000014>;
251 interrupt-parent = <&UIC0>; 253 interrupt-parent = <&UIC0>;
252 interrupts = <0x2 0x4>; 254 interrupts = <0x2 0x4>;
255
256 hwmon@48 {
257 compatible = "adi,ad7414";
258 reg = <0x48>;
259 };
253 }; 260 };
254 261
255 IIC1: i2c@ef600800 { 262 IIC1: i2c@ef600800 {
263 #address-cells = <1>;
264 #size-cells = <0>;
256 compatible = "ibm,iic-440epx", "ibm,iic"; 265 compatible = "ibm,iic-440epx", "ibm,iic";
257 reg = <0xef600800 0x00000014>; 266 reg = <0xef600800 0x00000014>;
258 interrupt-parent = <&UIC0>; 267 interrupt-parent = <&UIC0>;
diff --git a/arch/powerpc/boot/dts/yosemite.dts b/arch/powerpc/boot/dts/yosemite.dts
index e39422aa0d85..1fa3cb4c4ebb 100644
--- a/arch/powerpc/boot/dts/yosemite.dts
+++ b/arch/powerpc/boot/dts/yosemite.dts
@@ -15,7 +15,7 @@
15 #address-cells = <2>; 15 #address-cells = <2>;
16 #size-cells = <1>; 16 #size-cells = <1>;
17 model = "amcc,yosemite"; 17 model = "amcc,yosemite";
18 compatible = "amcc,yosemite","amcc,bamboo"; 18 compatible = "amcc,yosemite";
19 dcr-parent = <&{/cpus/cpu@0}>; 19 dcr-parent = <&{/cpus/cpu@0}>;
20 20
21 aliases { 21 aliases {
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-23 03:14:28 -0500