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-rw-r--r--arch/powerpc/boot/dts/acadia.dts224
-rw-r--r--arch/powerpc/boot/dts/hcu4.dts168
-rw-r--r--arch/powerpc/boot/dts/mpc8315erdb.dts8
-rw-r--r--arch/powerpc/boot/dts/mpc832x_mds.dts2
-rw-r--r--arch/powerpc/boot/dts/mpc8349emitx.dts16
-rw-r--r--arch/powerpc/boot/dts/mpc8349emitxgp.dts8
-rw-r--r--arch/powerpc/boot/dts/mpc834x_mds.dts2
-rw-r--r--arch/powerpc/boot/dts/mpc836x_mds.dts2
-rw-r--r--arch/powerpc/boot/dts/mpc8377_rdb.dts8
-rw-r--r--arch/powerpc/boot/dts/mpc8378_rdb.dts8
-rw-r--r--arch/powerpc/boot/dts/mpc8379_rdb.dts8
-rw-r--r--arch/powerpc/boot/dts/mpc8536ds.dts12
-rw-r--r--arch/powerpc/boot/dts/mpc8568mds.dts2
-rw-r--r--arch/powerpc/boot/dts/mpc8572ds.dts27
14 files changed, 471 insertions, 24 deletions
diff --git a/arch/powerpc/boot/dts/acadia.dts b/arch/powerpc/boot/dts/acadia.dts
new file mode 100644
index 000000000000..57291f61ffe7
--- /dev/null
+++ b/arch/powerpc/boot/dts/acadia.dts
@@ -0,0 +1,224 @@
1/*
2 * Device Tree Source for AMCC Acadia (405EZ)
3 *
4 * Copyright IBM Corp. 2008
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11/dts-v1/;
12
13/ {
14 #address-cells = <1>;
15 #size-cells = <1>;
16 model = "amcc,acadia";
17 compatible = "amcc,acadia";
18 dcr-parent = <&{/cpus/cpu@0}>;
19
20 aliases {
21 ethernet0 = &EMAC0;
22 serial0 = &UART0;
23 serial1 = &UART1;
24 };
25
26 cpus {
27 #address-cells = <1>;
28 #size-cells = <0>;
29
30 cpu@0 {
31 device_type = "cpu";
32 model = "PowerPC,405EZ";
33 reg = <0x0>;
34 clock-frequency = <0>; /* Filled in by wrapper */
35 timebase-frequency = <0>; /* Filled in by wrapper */
36 i-cache-line-size = <32>;
37 d-cache-line-size = <32>;
38 i-cache-size = <16384>;
39 d-cache-size = <16384>;
40 dcr-controller;
41 dcr-access-method = "native";
42 };
43 };
44
45 memory {
46 device_type = "memory";
47 reg = <0x0 0x0>; /* Filled in by wrapper */
48 };
49
50 UIC0: interrupt-controller {
51 compatible = "ibm,uic-405ez", "ibm,uic";
52 interrupt-controller;
53 dcr-reg = <0x0c0 0x009>;
54 cell-index = <0>;
55 #address-cells = <0>;
56 #size-cells = <0>;
57 #interrupt-cells = <2>;
58 };
59
60 plb {
61 compatible = "ibm,plb-405ez", "ibm,plb3";
62 #address-cells = <1>;
63 #size-cells = <1>;
64 ranges;
65 clock-frequency = <0>; /* Filled in by wrapper */
66
67 MAL0: mcmal {
68 compatible = "ibm,mcmal-405ez", "ibm,mcmal";
69 dcr-reg = <0x380 0x62>;
70 num-tx-chans = <1>;
71 num-rx-chans = <1>;
72 interrupt-parent = <&UIC0>;
73 /* 405EZ has only 3 interrupts to the UIC, as
74 * SERR, TXDE, and RXDE are or'd together into
75 * one UIC bit
76 */
77 interrupts = <
78 0x13 0x4 /* TXEOB */
79 0x15 0x4 /* RXEOB */
80 0x12 0x4 /* SERR, TXDE, RXDE */>;
81 };
82
83 POB0: opb {
84 compatible = "ibm,opb-405ez", "ibm,opb";
85 #address-cells = <1>;
86 #size-cells = <1>;
87 ranges;
88 dcr-reg = <0x0a 0x05>;
89 clock-frequency = <0>; /* Filled in by wrapper */
90
91 UART0: serial@ef600300 {
92 device_type = "serial";
93 compatible = "ns16550";
94 reg = <0xef600300 0x8>;
95 virtual-reg = <0xef600300>;
96 clock-frequency = <0>; /* Filled in by wrapper */
97 current-speed = <115200>;
98 interrupt-parent = <&UIC0>;
99 interrupts = <0x5 0x4>;
100 };
101
102 UART1: serial@ef600400 {
103 device_type = "serial";
104 compatible = "ns16550";
105 reg = <0xef600400 0x8>;
106 clock-frequency = <0>; /* Filled in by wrapper */
107 current-speed = <115200>;
108 interrupt-parent = <&UIC0>;
109 interrupts = <0x6 0x4>;
110 };
111
112 IIC: i2c@ef600500 {
113 compatible = "ibm,iic-405ez", "ibm,iic";
114 reg = <0xef600500 0x11>;
115 interrupt-parent = <&UIC0>;
116 interrupts = <0xa 0x4>;
117 };
118
119 GPIO0: gpio@ef600700 {
120 compatible = "ibm,gpio-405ez";
121 reg = <0xef600700 0x20>;
122 };
123
124 GPIO1: gpio@ef600800 {
125 compatible = "ibm,gpio-405ez";
126 reg = <0xef600800 0x20>;
127 };
128
129 EMAC0: ethernet@ef600900 {
130 device_type = "network";
131 compatible = "ibm,emac-405ez", "ibm,emac";
132 interrupt-parent = <&UIC0>;
133 interrupts = <
134 0x10 0x4 /* Ethernet */
135 0x11 0x4 /* Ethernet Wake up */>;
136 local-mac-address = [000000000000]; /* Filled in by wrapper */
137 reg = <0xef600900 0x70>;
138 mal-device = <&MAL0>;
139 mal-tx-channel = <0>;
140 mal-rx-channel = <0>;
141 cell-index = <0>;
142 max-frame-size = <1500>;
143 rx-fifo-size = <4096>;
144 tx-fifo-size = <2048>;
145 phy-mode = "mii";
146 phy-map = <0x0>;
147 };
148
149 CAN0: can@ef601000 {
150 compatible = "amcc,can-405ez";
151 reg = <0xef601000 0x620>;
152 interrupt-parent = <&UIC0>;
153 interrupts = <0x7 0x4>;
154 };
155
156 CAN1: can@ef601800 {
157 compatible = "amcc,can-405ez";
158 reg = <0xef601800 0x620>;
159 interrupt-parent = <&UIC0>;
160 interrupts = <0x8 0x4>;
161 };
162
163 cameleon@ef602000 {
164 compatible = "amcc,cameleon-405ez";
165 reg = <0xef602000 0x800>;
166 interrupt-parent = <&UIC0>;
167 interrupts = <0xb 0x4 0xc 0x4>;
168 };
169
170 ieee1588@ef602800 {
171 compatible = "amcc,ieee1588-405ez";
172 reg = <0xef602800 0x60>;
173 interrupt-parent = <&UIC0>;
174 interrupts = <0x4 0x4>;
175 /* This thing is a bit weird. It has it's own UIC
176 * that it uses to generate snapshot triggers. We
177 * don't really support this device yet, and it needs
178 * work to figure this out.
179 */
180 dcr-reg = <0xe0 0x9>;
181 };
182
183 usb@ef603000 {
184 compatible = "ohci-be";
185 reg = <0xef603000 0x80>;
186 interrupts-parent = <&UIC0>;
187 interrupts = <0xd 0x4 0xe 0x4>;
188 };
189
190 dac@ef603300 {
191 compatible = "amcc,dac-405ez";
192 reg = <0xef603300 0x40>;
193 interrupt-parent = <&UIC0>;
194 interrupts = <0x18 0x4>;
195 };
196
197 adc@ef603400 {
198 compatible = "amcc,adc-405ez";
199 reg = <0xef603400 0x40>;
200 interrupt-parent = <&UIC0>;
201 interrupts = <0x17 0x4>;
202 };
203
204 spi@ef603500 {
205 compatible = "amcc,spi-405ez";
206 reg = <0xef603500 0x100>;
207 interrupt-parent = <&UIC0>;
208 interrupts = <0x9 0x4>;
209 };
210 };
211
212 EBC0: ebc {
213 compatible = "ibm,ebc-405ez", "ibm,ebc";
214 dcr-reg = <0x12 0x2>;
215 #address-cells = <2>;
216 #size-cells = <1>;
217 clock-frequency = <0>; /* Filled in by wrapper */
218 };
219 };
220
221 chosen {
222 linux,stdout-path = "/plb/opb/serial@ef600300";
223 };
224};
diff --git a/arch/powerpc/boot/dts/hcu4.dts b/arch/powerpc/boot/dts/hcu4.dts
new file mode 100644
index 000000000000..7988598da4c9
--- /dev/null
+++ b/arch/powerpc/boot/dts/hcu4.dts
@@ -0,0 +1,168 @@
1/*
2* Device Tree Source for Netstal Maschinen HCU4
3* based on the IBM Walnut
4*
5* Copyright 2008
6* Niklaus Giger <niklaus.giger@member.fsf.org>
7*
8* Copyright 2007 IBM Corp.
9* Josh Boyer <jwboyer@linux.vnet.ibm.com>
10*
11* This file is licensed under the terms of the GNU General Public
12* License version 2. This program is licensed "as is" without
13* any warranty of any kind, whether express or implied.
14*/
15
16/dts-v1/;
17
18/ {
19 #address-cells = <0x1>;
20 #size-cells = <0x1>;
21 model = "netstal,hcu4";
22 compatible = "netstal,hcu4";
23 dcr-parent = <0x1>;
24
25 aliases {
26 ethernet0 = "/plb/opb/ethernet@ef600800";
27 serial0 = "/plb/opb/serial@ef600300";
28 };
29
30 cpus {
31 #address-cells = <0x1>;
32 #size-cells = <0x0>;
33
34 cpu@0 {
35 device_type = "cpu";
36 model = "PowerPC,405GPr";
37 reg = <0x0>;
38 clock-frequency = <0>; /* Filled in by U-Boot */
39 timebase-frequency = <0x0>; /* Filled in by U-Boot */
40 i-cache-line-size = <0x20>;
41 d-cache-line-size = <0x20>;
42 i-cache-size = <0x4000>;
43 d-cache-size = <0x4000>;
44 dcr-controller;
45 dcr-access-method = "native";
46 linux,phandle = <0x1>;
47 };
48 };
49
50 memory {
51 device_type = "memory";
52 reg = <0x0 0x0>; /* Filled in by U-Boot */
53 };
54
55 UIC0: interrupt-controller {
56 compatible = "ibm,uic";
57 interrupt-controller;
58 cell-index = <0x0>;
59 dcr-reg = <0xc0 0x9>;
60 #address-cells = <0x0>;
61 #size-cells = <0x0>;
62 #interrupt-cells = <0x2>;
63 linux,phandle = <0x2>;
64 };
65
66 plb {
67 compatible = "ibm,plb3";
68 #address-cells = <0x1>;
69 #size-cells = <0x1>;
70 ranges;
71 clock-frequency = <0x0>; /* Filled in by U-Boot */
72
73 SDRAM0: memory-controller {
74 compatible = "ibm,sdram-405gp";
75 dcr-reg = <0x10 0x2>;
76 };
77
78 MAL: mcmal {
79 compatible = "ibm,mcmal-405gp", "ibm,mcmal";
80 dcr-reg = <0x180 0x62>;
81 num-tx-chans = <0x1>;
82 num-rx-chans = <0x1>;
83 interrupt-parent = <0x2>;
84 interrupts = <0xb 0x4 0xc 0x4 0xa 0x4 0xd 0x4 0xe 0x4>;
85 linux,phandle = <0x3>;
86 };
87
88 POB0: opb {
89 compatible = "ibm,opb-405gp", "ibm,opb";
90 #address-cells = <0x1>;
91 #size-cells = <0x1>;
92 ranges = <0xef600000 0xef600000 0xa00000>;
93 dcr-reg = <0xa0 0x5>;
94 clock-frequency = <0x0>; /* Filled in by U-Boot */
95
96 UART0: serial@ef600300 {
97 device_type = "serial";
98 compatible = "ns16550";
99 reg = <0xef600300 0x8>;
100 virtual-reg = <0xef600300>;
101 clock-frequency = <0x0>;/* Filled in by U-Boot */
102 current-speed = <0>; /* Filled in by U-Boot */
103 interrupt-parent = <0x2>;
104 interrupts = <0x0 0x4>;
105 };
106
107 IIC: i2c@ef600500 {
108 compatible = "ibm,iic-405gp", "ibm,iic";
109 reg = <0xef600500 0x11>;
110 interrupt-parent = <0x2>;
111 interrupts = <0x2 0x4>;
112 };
113
114 GPIO: gpio@ef600700 {
115 compatible = "ibm,gpio-405gp";
116 reg = <0xef600700 0x20>;
117 };
118
119 EMAC: ethernet@ef600800 {
120 device_type = "network";
121 compatible = "ibm,emac-405gp", "ibm,emac";
122 interrupt-parent = <0x2>;
123 interrupts = <0xf 0x4 0x9 0x4>;
124 local-mac-address = [00 00 00 00 00 00];
125 reg = <0xef600800 0x70>;
126 mal-device = <0x3>;
127 mal-tx-channel = <0x0>;
128 mal-rx-channel = <0x0>;
129 cell-index = <0x0>;
130 max-frame-size = <0x5dc>;
131 rx-fifo-size = <0x1000>;
132 tx-fifo-size = <0x800>;
133 phy-mode = "rmii";
134 phy-map = <0x1>;
135 };
136 };
137
138 EBC0: ebc {
139 compatible = "ibm,ebc-405gp", "ibm,ebc";
140 dcr-reg = <0x12 0x2>;
141 #address-cells = <0x2>;
142 #size-cells = <0x1>;
143 clock-frequency = <0x0>; /* Filled in by U-Boot */
144
145 sram@0,0 {
146 reg = <0x0 0x0 0x80000>;
147 };
148
149 flash@0,80000 {
150 compatible = "jedec-flash";
151 bank-width = <0x1>;
152 reg = <0x0 0x80000 0x80000>;
153 #address-cells = <0x1>;
154 #size-cells = <0x1>;
155
156 partition@0 {
157 label = "OpenBIOS";
158 reg = <0x0 0x80000>;
159 read-only;
160 };
161 };
162 };
163 };
164
165 chosen {
166 linux,stdout-path = "/plb/opb/serial@ef600300";
167 };
168};
diff --git a/arch/powerpc/boot/dts/mpc8315erdb.dts b/arch/powerpc/boot/dts/mpc8315erdb.dts
index 7449e54c1a90..6b850670de1d 100644
--- a/arch/powerpc/boot/dts/mpc8315erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8315erdb.dts
@@ -121,6 +121,14 @@
121 compatible = "dallas,ds1339"; 121 compatible = "dallas,ds1339";
122 reg = <0x68>; 122 reg = <0x68>;
123 }; 123 };
124
125 mcu_pio: mcu@a {
126 #gpio-cells = <2>;
127 compatible = "fsl,mc9s08qg8-mpc8315erdb",
128 "fsl,mcu-mpc8349emitx";
129 reg = <0x0a>;
130 gpio-controller;
131 };
124 }; 132 };
125 133
126 spi@7000 { 134 spi@7000 {
diff --git a/arch/powerpc/boot/dts/mpc832x_mds.dts b/arch/powerpc/boot/dts/mpc832x_mds.dts
index e4cc1768f241..57c595bf1071 100644
--- a/arch/powerpc/boot/dts/mpc832x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc832x_mds.dts
@@ -60,7 +60,7 @@
60 }; 60 };
61 61
62 bcsr@f8000000 { 62 bcsr@f8000000 {
63 device_type = "board-control"; 63 compatible = "fsl,mpc8323mds-bcsr";
64 reg = <0xf8000000 0x8000>; 64 reg = <0xf8000000 0x8000>;
65 }; 65 };
66 66
diff --git a/arch/powerpc/boot/dts/mpc8349emitx.dts b/arch/powerpc/boot/dts/mpc8349emitx.dts
index 5cedf373a1d8..2c9d54a35bc3 100644
--- a/arch/powerpc/boot/dts/mpc8349emitx.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitx.dts
@@ -83,6 +83,14 @@
83 interrupts = <15 0x8>; 83 interrupts = <15 0x8>;
84 interrupt-parent = <&ipic>; 84 interrupt-parent = <&ipic>;
85 dfsrr; 85 dfsrr;
86
87 rtc@68 {
88 device_type = "rtc";
89 compatible = "dallas,ds1339";
90 reg = <0x68>;
91 interrupts = <18 0x8>;
92 interrupt-parent = <&ipic>;
93 };
86 }; 94 };
87 95
88 spi@7000 { 96 spi@7000 {
@@ -131,6 +139,14 @@
131 interrupt-parent = <&ipic>; 139 interrupt-parent = <&ipic>;
132 interrupts = <71 8>; 140 interrupts = <71 8>;
133 }; 141 };
142
143 mcu_pio: mcu@a {
144 #gpio-cells = <2>;
145 compatible = "fsl,mc9s08qg8-mpc8349emitx",
146 "fsl,mcu-mpc8349emitx";
147 reg = <0x0a>;
148 gpio-controller;
149 };
134 }; 150 };
135 151
136 usb@22000 { 152 usb@22000 {
diff --git a/arch/powerpc/boot/dts/mpc8349emitxgp.dts b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
index 81ae1d3e9440..fa40647ee62e 100644
--- a/arch/powerpc/boot/dts/mpc8349emitxgp.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
@@ -81,6 +81,14 @@
81 interrupts = <15 0x8>; 81 interrupts = <15 0x8>;
82 interrupt-parent = <&ipic>; 82 interrupt-parent = <&ipic>;
83 dfsrr; 83 dfsrr;
84
85 rtc@68 {
86 device_type = "rtc";
87 compatible = "dallas,ds1339";
88 reg = <0x68>;
89 interrupts = <18 0x8>;
90 interrupt-parent = <&ipic>;
91 };
84 }; 92 };
85 93
86 spi@7000 { 94 spi@7000 {
diff --git a/arch/powerpc/boot/dts/mpc834x_mds.dts b/arch/powerpc/boot/dts/mpc834x_mds.dts
index 04bfde3ea605..c986c541e9bb 100644
--- a/arch/powerpc/boot/dts/mpc834x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc834x_mds.dts
@@ -49,7 +49,7 @@
49 }; 49 };
50 50
51 bcsr@e2400000 { 51 bcsr@e2400000 {
52 device_type = "board-control"; 52 compatible = "fsl,mpc8349mds-bcsr";
53 reg = <0xe2400000 0x8000>; 53 reg = <0xe2400000 0x8000>;
54 }; 54 };
55 55
diff --git a/arch/powerpc/boot/dts/mpc836x_mds.dts b/arch/powerpc/boot/dts/mpc836x_mds.dts
index 66a12d2631fb..14534d04e4db 100644
--- a/arch/powerpc/boot/dts/mpc836x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc836x_mds.dts
@@ -69,7 +69,7 @@
69 }; 69 };
70 70
71 bcsr@1,0 { 71 bcsr@1,0 {
72 device_type = "board-control"; 72 compatible = "fsl,mpc8360mds-bcsr";
73 reg = <1 0 0x8000>; 73 reg = <1 0 0x8000>;
74 }; 74 };
75 }; 75 };
diff --git a/arch/powerpc/boot/dts/mpc8377_rdb.dts b/arch/powerpc/boot/dts/mpc8377_rdb.dts
index 53191ba67aaa..435ef3dd022d 100644
--- a/arch/powerpc/boot/dts/mpc8377_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts
@@ -121,6 +121,14 @@
121 compatible = "dallas,ds1339"; 121 compatible = "dallas,ds1339";
122 reg = <0x68>; 122 reg = <0x68>;
123 }; 123 };
124
125 mcu_pio: mcu@a {
126 #gpio-cells = <2>;
127 compatible = "fsl,mc9s08qg8-mpc8377erdb",
128 "fsl,mcu-mpc8349emitx";
129 reg = <0x0a>;
130 gpio-controller;
131 };
124 }; 132 };
125 133
126 i2c@3100 { 134 i2c@3100 {
diff --git a/arch/powerpc/boot/dts/mpc8378_rdb.dts b/arch/powerpc/boot/dts/mpc8378_rdb.dts
index 4a09153d160c..b11e68f56a06 100644
--- a/arch/powerpc/boot/dts/mpc8378_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8378_rdb.dts
@@ -121,6 +121,14 @@
121 compatible = "dallas,ds1339"; 121 compatible = "dallas,ds1339";
122 reg = <0x68>; 122 reg = <0x68>;
123 }; 123 };
124
125 mcu_pio: mcu@a {
126 #gpio-cells = <2>;
127 compatible = "fsl,mc9s08qg8-mpc8378erdb",
128 "fsl,mcu-mpc8349emitx";
129 reg = <0x0a>;
130 gpio-controller;
131 };
124 }; 132 };
125 133
126 i2c@3100 { 134 i2c@3100 {
diff --git a/arch/powerpc/boot/dts/mpc8379_rdb.dts b/arch/powerpc/boot/dts/mpc8379_rdb.dts
index bbd884ac9dc0..337af6ea26d3 100644
--- a/arch/powerpc/boot/dts/mpc8379_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8379_rdb.dts
@@ -121,6 +121,14 @@
121 compatible = "dallas,ds1339"; 121 compatible = "dallas,ds1339";
122 reg = <0x68>; 122 reg = <0x68>;
123 }; 123 };
124
125 mcu_pio: mcu@a {
126 #gpio-cells = <2>;
127 compatible = "fsl,mc9s08qg8-mpc8379erdb",
128 "fsl,mcu-mpc8349emitx";
129 reg = <0x0a>;
130 gpio-controller;
131 };
124 }; 132 };
125 133
126 i2c@3100 { 134 i2c@3100 {
diff --git a/arch/powerpc/boot/dts/mpc8536ds.dts b/arch/powerpc/boot/dts/mpc8536ds.dts
index 93fdd99901b6..35db1e5440c7 100644
--- a/arch/powerpc/boot/dts/mpc8536ds.dts
+++ b/arch/powerpc/boot/dts/mpc8536ds.dts
@@ -109,7 +109,7 @@
109 reg = <0x0 0x80>; 109 reg = <0x0 0x80>;
110 cell-index = <0>; 110 cell-index = <0>;
111 interrupt-parent = <&mpic>; 111 interrupt-parent = <&mpic>;
112 interrupts = <14 0x2>; 112 interrupts = <20 2>;
113 }; 113 };
114 dma-channel@80 { 114 dma-channel@80 {
115 compatible = "fsl,mpc8536-dma-channel", 115 compatible = "fsl,mpc8536-dma-channel",
@@ -117,7 +117,7 @@
117 reg = <0x80 0x80>; 117 reg = <0x80 0x80>;
118 cell-index = <1>; 118 cell-index = <1>;
119 interrupt-parent = <&mpic>; 119 interrupt-parent = <&mpic>;
120 interrupts = <15 0x2>; 120 interrupts = <21 2>;
121 }; 121 };
122 dma-channel@100 { 122 dma-channel@100 {
123 compatible = "fsl,mpc8536-dma-channel", 123 compatible = "fsl,mpc8536-dma-channel",
@@ -125,7 +125,7 @@
125 reg = <0x100 0x80>; 125 reg = <0x100 0x80>;
126 cell-index = <2>; 126 cell-index = <2>;
127 interrupt-parent = <&mpic>; 127 interrupt-parent = <&mpic>;
128 interrupts = <16 0x2>; 128 interrupts = <22 2>;
129 }; 129 };
130 dma-channel@180 { 130 dma-channel@180 {
131 compatible = "fsl,mpc8536-dma-channel", 131 compatible = "fsl,mpc8536-dma-channel",
@@ -133,7 +133,7 @@
133 reg = <0x180 0x80>; 133 reg = <0x180 0x80>;
134 cell-index = <3>; 134 cell-index = <3>;
135 interrupt-parent = <&mpic>; 135 interrupt-parent = <&mpic>;
136 interrupts = <17 0x2>; 136 interrupts = <23 2>;
137 }; 137 };
138 }; 138 };
139 139
@@ -180,7 +180,7 @@
180 enet0: ethernet@24000 { 180 enet0: ethernet@24000 {
181 cell-index = <0>; 181 cell-index = <0>;
182 device_type = "network"; 182 device_type = "network";
183 model = "TSEC"; 183 model = "eTSEC";
184 compatible = "gianfar"; 184 compatible = "gianfar";
185 reg = <0x24000 0x1000>; 185 reg = <0x24000 0x1000>;
186 local-mac-address = [ 00 00 00 00 00 00 ]; 186 local-mac-address = [ 00 00 00 00 00 00 ];
@@ -193,7 +193,7 @@
193 enet1: ethernet@26000 { 193 enet1: ethernet@26000 {
194 cell-index = <1>; 194 cell-index = <1>;
195 device_type = "network"; 195 device_type = "network";
196 model = "TSEC"; 196 model = "eTSEC";
197 compatible = "gianfar"; 197 compatible = "gianfar";
198 reg = <0x26000 0x1000>; 198 reg = <0x26000 0x1000>;
199 local-mac-address = [ 00 00 00 00 00 00 ]; 199 local-mac-address = [ 00 00 00 00 00 00 ];
diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts/mpc8568mds.dts
index a15f10343f53..c80158f7741d 100644
--- a/arch/powerpc/boot/dts/mpc8568mds.dts
+++ b/arch/powerpc/boot/dts/mpc8568mds.dts
@@ -52,7 +52,7 @@
52 }; 52 };
53 53
54 bcsr@f8000000 { 54 bcsr@f8000000 {
55 device_type = "board-control"; 55 compatible = "fsl,mpc8568mds-bcsr";
56 reg = <0xf8000000 0x8000>; 56 reg = <0xf8000000 0x8000>;
57 }; 57 };
58 58
diff --git a/arch/powerpc/boot/dts/mpc8572ds.dts b/arch/powerpc/boot/dts/mpc8572ds.dts
index e124dd18fb5a..cadd4652a695 100644
--- a/arch/powerpc/boot/dts/mpc8572ds.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds.dts
@@ -13,8 +13,8 @@
13/ { 13/ {
14 model = "fsl,MPC8572DS"; 14 model = "fsl,MPC8572DS";
15 compatible = "fsl,MPC8572DS"; 15 compatible = "fsl,MPC8572DS";
16 #address-cells = <1>; 16 #address-cells = <2>;
17 #size-cells = <1>; 17 #size-cells = <2>;
18 18
19 aliases { 19 aliases {
20 ethernet0 = &enet0; 20 ethernet0 = &enet0;
@@ -61,7 +61,6 @@
61 61
62 memory { 62 memory {
63 device_type = "memory"; 63 device_type = "memory";
64 reg = <0x0 0x0>; // Filled by U-Boot
65 }; 64 };
66 65
67 soc8572@ffe00000 { 66 soc8572@ffe00000 {
@@ -69,8 +68,8 @@
69 #size-cells = <1>; 68 #size-cells = <1>;
70 device_type = "soc"; 69 device_type = "soc";
71 compatible = "simple-bus"; 70 compatible = "simple-bus";
72 ranges = <0x0 0xffe00000 0x100000>; 71 ranges = <0x0 0 0xffe00000 0x100000>;
73 reg = <0xffe00000 0x1000>; // CCSRBAR & soc regs, remove once parse code for immrbase fixed 72 reg = <0 0xffe00000 0 0x1000>; // CCSRBAR & soc regs, remove once parse code for immrbase fixed
74 bus-frequency = <0>; // Filled out by uboot. 73 bus-frequency = <0>; // Filled out by uboot.
75 74
76 memory-controller@2000 { 75 memory-controller@2000 {
@@ -351,10 +350,10 @@
351 #interrupt-cells = <1>; 350 #interrupt-cells = <1>;
352 #size-cells = <2>; 351 #size-cells = <2>;
353 #address-cells = <3>; 352 #address-cells = <3>;
354 reg = <0xffe08000 0x1000>; 353 reg = <0 0xffe08000 0 0x1000>;
355 bus-range = <0 255>; 354 bus-range = <0 255>;
356 ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000 355 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
357 0x1000000 0x0 0x0 0xffc00000 0x0 0x10000>; 356 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x00010000>;
358 clock-frequency = <33333333>; 357 clock-frequency = <33333333>;
359 interrupt-parent = <&mpic>; 358 interrupt-parent = <&mpic>;
360 interrupts = <24 2>; 359 interrupts = <24 2>;
@@ -561,10 +560,10 @@
561 #interrupt-cells = <1>; 560 #interrupt-cells = <1>;
562 #size-cells = <2>; 561 #size-cells = <2>;
563 #address-cells = <3>; 562 #address-cells = <3>;
564 reg = <0xffe09000 0x1000>; 563 reg = <0 0xffe09000 0 0x1000>;
565 bus-range = <0 255>; 564 bus-range = <0 255>;
566 ranges = <0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000 565 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
567 0x1000000 0x0 0x0 0xffc10000 0x0 0x10000>; 566 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x00010000>;
568 clock-frequency = <33333333>; 567 clock-frequency = <33333333>;
569 interrupt-parent = <&mpic>; 568 interrupt-parent = <&mpic>;
570 interrupts = <26 2>; 569 interrupts = <26 2>;
@@ -598,10 +597,10 @@
598 #interrupt-cells = <1>; 597 #interrupt-cells = <1>;
599 #size-cells = <2>; 598 #size-cells = <2>;
600 #address-cells = <3>; 599 #address-cells = <3>;
601 reg = <0xffe0a000 0x1000>; 600 reg = <0 0xffe0a000 0 0x1000>;
602 bus-range = <0 255>; 601 bus-range = <0 255>;
603 ranges = <0x2000000 0x0 0xc0000000 0xc0000000 0x0 0x20000000 602 ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
604 0x1000000 0x0 0x0 0xffc20000 0x0 0x10000>; 603 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x00010000>;
605 clock-frequency = <33333333>; 604 clock-frequency = <33333333>;
606 interrupt-parent = <&mpic>; 605 interrupt-parent = <&mpic>;
607 interrupts = <27 2>; 606 interrupts = <27 2>;
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-29 04:18:43 -0500