diff options
Diffstat (limited to 'arch/powerpc/boot/dts/walnut.dts')
-rw-r--r-- | arch/powerpc/boot/dts/walnut.dts | 55 |
1 files changed, 51 insertions, 4 deletions
diff --git a/arch/powerpc/boot/dts/walnut.dts b/arch/powerpc/boot/dts/walnut.dts index 754fa3960f83..dcc21b0438e5 100644 --- a/arch/powerpc/boot/dts/walnut.dts +++ b/arch/powerpc/boot/dts/walnut.dts | |||
@@ -14,14 +14,21 @@ | |||
14 | #size-cells = <1>; | 14 | #size-cells = <1>; |
15 | model = "ibm,walnut"; | 15 | model = "ibm,walnut"; |
16 | compatible = "ibm,walnut"; | 16 | compatible = "ibm,walnut"; |
17 | dcr-parent = <&/cpus/PowerPC,405GP@0>; | 17 | dcr-parent = <&/cpus/cpu@0>; |
18 | |||
19 | aliases { | ||
20 | ethernet0 = &EMAC; | ||
21 | serial0 = &UART0; | ||
22 | serial1 = &UART1; | ||
23 | }; | ||
18 | 24 | ||
19 | cpus { | 25 | cpus { |
20 | #address-cells = <1>; | 26 | #address-cells = <1>; |
21 | #size-cells = <0>; | 27 | #size-cells = <0>; |
22 | 28 | ||
23 | PowerPC,405GP@0 { | 29 | cpu@0 { |
24 | device_type = "cpu"; | 30 | device_type = "cpu"; |
31 | model = "PowerPC,405GP"; | ||
25 | reg = <0>; | 32 | reg = <0>; |
26 | clock-frequency = <bebc200>; /* Filled in by zImage */ | 33 | clock-frequency = <bebc200>; /* Filled in by zImage */ |
27 | timebase-frequency = <0>; /* Filled in by zImage */ | 34 | timebase-frequency = <0>; /* Filled in by zImage */ |
@@ -168,9 +175,10 @@ | |||
168 | }; | 175 | }; |
169 | }; | 176 | }; |
170 | 177 | ||
171 | ds1743@1,0 { | 178 | nvram@1,0 { |
172 | /* NVRAM and RTC */ | 179 | /* NVRAM and RTC */ |
173 | compatible = "ds1743"; | 180 | compatible = "ds1743-nvram"; |
181 | #bytes = <2000>; | ||
174 | reg = <1 0 2000>; | 182 | reg = <1 0 2000>; |
175 | }; | 183 | }; |
176 | 184 | ||
@@ -190,6 +198,45 @@ | |||
190 | virtual-reg = <f0300005>; | 198 | virtual-reg = <f0300005>; |
191 | }; | 199 | }; |
192 | }; | 200 | }; |
201 | |||
202 | PCI0: pci@ec000000 { | ||
203 | device_type = "pci"; | ||
204 | #interrupt-cells = <1>; | ||
205 | #size-cells = <2>; | ||
206 | #address-cells = <3>; | ||
207 | compatible = "ibm,plb405gp-pci", "ibm,plb-pci"; | ||
208 | primary; | ||
209 | reg = <eec00000 8 /* Config space access */ | ||
210 | eed80000 4 /* IACK */ | ||
211 | eed80000 4 /* Special cycle */ | ||
212 | ef480000 40>; /* Internal registers */ | ||
213 | |||
214 | /* Outbound ranges, one memory and one IO, | ||
215 | * later cannot be changed. Chip supports a second | ||
216 | * IO range but we don't use it for now | ||
217 | */ | ||
218 | ranges = <02000000 0 80000000 80000000 0 20000000 | ||
219 | 01000000 0 00000000 e8000000 0 00010000>; | ||
220 | |||
221 | /* Inbound 2GB range starting at 0 */ | ||
222 | dma-ranges = <42000000 0 0 0 0 80000000>; | ||
223 | |||
224 | /* Walnut has all 4 IRQ pins tied together per slot */ | ||
225 | interrupt-map-mask = <f800 0 0 0>; | ||
226 | interrupt-map = < | ||
227 | /* IDSEL 1 */ | ||
228 | 0800 0 0 0 &UIC0 1c 8 | ||
229 | |||
230 | /* IDSEL 2 */ | ||
231 | 1000 0 0 0 &UIC0 1d 8 | ||
232 | |||
233 | /* IDSEL 3 */ | ||
234 | 1800 0 0 0 &UIC0 1e 8 | ||
235 | |||
236 | /* IDSEL 4 */ | ||
237 | 2000 0 0 0 &UIC0 1f 8 | ||
238 | >; | ||
239 | }; | ||
193 | }; | 240 | }; |
194 | 241 | ||
195 | chosen { | 242 | chosen { |