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Diffstat (limited to 'arch/powerpc/boot/dts/tqm5200.dts')
-rw-r--r--arch/powerpc/boot/dts/tqm5200.dts80
1 files changed, 41 insertions, 39 deletions
diff --git a/arch/powerpc/boot/dts/tqm5200.dts b/arch/powerpc/boot/dts/tqm5200.dts
index 65bcea6a0173..773a68e00058 100644
--- a/arch/powerpc/boot/dts/tqm5200.dts
+++ b/arch/powerpc/boot/dts/tqm5200.dts
@@ -10,6 +10,8 @@
10 * option) any later version. 10 * option) any later version.
11 */ 11 */
12 12
13/dts-v1/;
14
13/ { 15/ {
14 model = "tqc,tqm5200"; 16 model = "tqc,tqm5200";
15 compatible = "tqc,tqm5200"; 17 compatible = "tqc,tqm5200";
@@ -23,10 +25,10 @@
23 PowerPC,5200@0 { 25 PowerPC,5200@0 {
24 device_type = "cpu"; 26 device_type = "cpu";
25 reg = <0>; 27 reg = <0>;
26 d-cache-line-size = <20>; 28 d-cache-line-size = <32>;
27 i-cache-line-size = <20>; 29 i-cache-line-size = <32>;
28 d-cache-size = <4000>; // L1, 16K 30 d-cache-size = <0x4000>; // L1, 16K
29 i-cache-size = <4000>; // L1, 16K 31 i-cache-size = <0x4000>; // L1, 16K
30 timebase-frequency = <0>; // from bootloader 32 timebase-frequency = <0>; // from bootloader
31 bus-frequency = <0>; // from bootloader 33 bus-frequency = <0>; // from bootloader
32 clock-frequency = <0>; // from bootloader 34 clock-frequency = <0>; // from bootloader
@@ -35,21 +37,21 @@
35 37
36 memory { 38 memory {
37 device_type = "memory"; 39 device_type = "memory";
38 reg = <00000000 04000000>; // 64MB 40 reg = <0x00000000 0x04000000>; // 64MB
39 }; 41 };
40 42
41 soc5200@f0000000 { 43 soc5200@f0000000 {
42 #address-cells = <1>; 44 #address-cells = <1>;
43 #size-cells = <1>; 45 #size-cells = <1>;
44 compatible = "fsl,mpc5200-immr"; 46 compatible = "fsl,mpc5200-immr";
45 ranges = <0 f0000000 0000c000>; 47 ranges = <0 0xf0000000 0x0000c000>;
46 reg = <f0000000 00000100>; 48 reg = <0xf0000000 0x00000100>;
47 bus-frequency = <0>; // from bootloader 49 bus-frequency = <0>; // from bootloader
48 system-frequency = <0>; // from bootloader 50 system-frequency = <0>; // from bootloader
49 51
50 cdm@200 { 52 cdm@200 {
51 compatible = "fsl,mpc5200-cdm"; 53 compatible = "fsl,mpc5200-cdm";
52 reg = <200 38>; 54 reg = <0x200 0x38>;
53 }; 55 };
54 56
55 mpc5200_pic: interrupt-controller@500 { 57 mpc5200_pic: interrupt-controller@500 {
@@ -57,12 +59,12 @@
57 interrupt-controller; 59 interrupt-controller;
58 #interrupt-cells = <3>; 60 #interrupt-cells = <3>;
59 compatible = "fsl,mpc5200-pic"; 61 compatible = "fsl,mpc5200-pic";
60 reg = <500 80>; 62 reg = <0x500 0x80>;
61 }; 63 };
62 64
63 timer@600 { // General Purpose Timer 65 timer@600 { // General Purpose Timer
64 compatible = "fsl,mpc5200-gpt"; 66 compatible = "fsl,mpc5200-gpt";
65 reg = <600 10>; 67 reg = <0x600 0x10>;
66 interrupts = <1 9 0>; 68 interrupts = <1 9 0>;
67 interrupt-parent = <&mpc5200_pic>; 69 interrupt-parent = <&mpc5200_pic>;
68 fsl,has-wdt; 70 fsl,has-wdt;
@@ -70,38 +72,38 @@
70 72
71 gpio@b00 { 73 gpio@b00 {
72 compatible = "fsl,mpc5200-gpio"; 74 compatible = "fsl,mpc5200-gpio";
73 reg = <b00 40>; 75 reg = <0xb00 0x40>;
74 interrupts = <1 7 0>; 76 interrupts = <1 7 0>;
75 interrupt-parent = <&mpc5200_pic>; 77 interrupt-parent = <&mpc5200_pic>;
76 }; 78 };
77 79
78 usb@1000 { 80 usb@1000 {
79 compatible = "fsl,mpc5200-ohci","ohci-be"; 81 compatible = "fsl,mpc5200-ohci","ohci-be";
80 reg = <1000 ff>; 82 reg = <0x1000 0xff>;
81 interrupts = <2 6 0>; 83 interrupts = <2 6 0>;
82 interrupt-parent = <&mpc5200_pic>; 84 interrupt-parent = <&mpc5200_pic>;
83 }; 85 };
84 86
85 dma-controller@1200 { 87 dma-controller@1200 {
86 compatible = "fsl,mpc5200-bestcomm"; 88 compatible = "fsl,mpc5200-bestcomm";
87 reg = <1200 80>; 89 reg = <0x1200 0x80>;
88 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 90 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
89 3 4 0 3 5 0 3 6 0 3 7 0 91 3 4 0 3 5 0 3 6 0 3 7 0
90 3 8 0 3 9 0 3 a 0 3 b 0 92 3 8 0 3 9 0 3 10 0 3 11 0
91 3 c 0 3 d 0 3 e 0 3 f 0>; 93 3 12 0 3 13 0 3 14 0 3 15 0>;
92 interrupt-parent = <&mpc5200_pic>; 94 interrupt-parent = <&mpc5200_pic>;
93 }; 95 };
94 96
95 xlb@1f00 { 97 xlb@1f00 {
96 compatible = "fsl,mpc5200-xlb"; 98 compatible = "fsl,mpc5200-xlb";
97 reg = <1f00 100>; 99 reg = <0x1f00 0x100>;
98 }; 100 };
99 101
100 serial@2000 { // PSC1 102 serial@2000 { // PSC1
101 device_type = "serial"; 103 device_type = "serial";
102 compatible = "fsl,mpc5200-psc-uart"; 104 compatible = "fsl,mpc5200-psc-uart";
103 port-number = <0>; // Logical port assignment 105 port-number = <0>; // Logical port assignment
104 reg = <2000 100>; 106 reg = <0x2000 0x100>;
105 interrupts = <2 1 0>; 107 interrupts = <2 1 0>;
106 interrupt-parent = <&mpc5200_pic>; 108 interrupt-parent = <&mpc5200_pic>;
107 }; 109 };
@@ -110,7 +112,7 @@
110 device_type = "serial"; 112 device_type = "serial";
111 compatible = "fsl,mpc5200-psc-uart"; 113 compatible = "fsl,mpc5200-psc-uart";
112 port-number = <1>; // Logical port assignment 114 port-number = <1>; // Logical port assignment
113 reg = <2200 100>; 115 reg = <0x2200 0x100>;
114 interrupts = <2 2 0>; 116 interrupts = <2 2 0>;
115 interrupt-parent = <&mpc5200_pic>; 117 interrupt-parent = <&mpc5200_pic>;
116 }; 118 };
@@ -119,7 +121,7 @@
119 device_type = "serial"; 121 device_type = "serial";
120 compatible = "fsl,mpc5200-psc-uart"; 122 compatible = "fsl,mpc5200-psc-uart";
121 port-number = <2>; // Logical port assignment 123 port-number = <2>; // Logical port assignment
122 reg = <2400 100>; 124 reg = <0x2400 0x100>;
123 interrupts = <2 3 0>; 125 interrupts = <2 3 0>;
124 interrupt-parent = <&mpc5200_pic>; 126 interrupt-parent = <&mpc5200_pic>;
125 }; 127 };
@@ -127,7 +129,7 @@
127 ethernet@3000 { 129 ethernet@3000 {
128 device_type = "network"; 130 device_type = "network";
129 compatible = "fsl,mpc5200-fec"; 131 compatible = "fsl,mpc5200-fec";
130 reg = <3000 400>; 132 reg = <0x3000 0x400>;
131 local-mac-address = [ 00 00 00 00 00 00 ]; 133 local-mac-address = [ 00 00 00 00 00 00 ];
132 interrupts = <2 5 0>; 134 interrupts = <2 5 0>;
133 interrupt-parent = <&mpc5200_pic>; 135 interrupt-parent = <&mpc5200_pic>;
@@ -137,8 +139,8 @@
137 mdio@3000 { 139 mdio@3000 {
138 #address-cells = <1>; 140 #address-cells = <1>;
139 #size-cells = <0>; 141 #size-cells = <0>;
140 compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio"; 142 compatible = "fsl,mpc5200-mdio";
141 reg = <3000 400>; // fec range, since we need to setup fec interrupts 143 reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
142 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. 144 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
143 interrupt-parent = <&mpc5200_pic>; 145 interrupt-parent = <&mpc5200_pic>;
144 146
@@ -150,7 +152,7 @@
150 152
151 ata@3a00 { 153 ata@3a00 {
152 compatible = "fsl,mpc5200-ata"; 154 compatible = "fsl,mpc5200-ata";
153 reg = <3a00 100>; 155 reg = <0x3a00 0x100>;
154 interrupts = <2 7 0>; 156 interrupts = <2 7 0>;
155 interrupt-parent = <&mpc5200_pic>; 157 interrupt-parent = <&mpc5200_pic>;
156 }; 158 };
@@ -159,21 +161,21 @@
159 #address-cells = <1>; 161 #address-cells = <1>;
160 #size-cells = <0>; 162 #size-cells = <0>;
161 compatible = "fsl,mpc5200-i2c","fsl-i2c"; 163 compatible = "fsl,mpc5200-i2c","fsl-i2c";
162 reg = <3d40 40>; 164 reg = <0x3d40 0x40>;
163 interrupts = <2 10 0>; 165 interrupts = <2 16 0>;
164 interrupt-parent = <&mpc5200_pic>; 166 interrupt-parent = <&mpc5200_pic>;
165 fsl5200-clocking; 167 fsl5200-clocking;
166 168
167 rtc@68 { 169 rtc@68 {
168 device_type = "rtc"; 170 device_type = "rtc";
169 compatible = "dallas,ds1307"; 171 compatible = "dallas,ds1307";
170 reg = <68>; 172 reg = <0x68>;
171 }; 173 };
172 }; 174 };
173 175
174 sram@8000 { 176 sram@8000 {
175 compatible = "fsl,mpc5200-sram"; 177 compatible = "fsl,mpc5200-sram";
176 reg = <8000 4000>; 178 reg = <0x8000 0x4000>;
177 }; 179 };
178 }; 180 };
179 181
@@ -182,11 +184,11 @@
182 compatible = "fsl,lpb"; 184 compatible = "fsl,lpb";
183 #address-cells = <2>; 185 #address-cells = <2>;
184 #size-cells = <1>; 186 #size-cells = <1>;
185 ranges = <0 0 fc000000 02000000>; 187 ranges = <0 0 0xfc000000 0x02000000>;
186 188
187 flash@0,0 { 189 flash@0,0 {
188 compatible = "cfi-flash"; 190 compatible = "cfi-flash";
189 reg = <0 0 02000000>; 191 reg = <0 0 0x02000000>;
190 bank-width = <4>; 192 bank-width = <4>;
191 device-width = <2>; 193 device-width = <2>;
192 #size-cells = <1>; 194 #size-cells = <1>;
@@ -200,18 +202,18 @@
200 #address-cells = <3>; 202 #address-cells = <3>;
201 device_type = "pci"; 203 device_type = "pci";
202 compatible = "fsl,mpc5200-pci"; 204 compatible = "fsl,mpc5200-pci";
203 reg = <f0000d00 100>; 205 reg = <0xf0000d00 0x100>;
204 interrupt-map-mask = <f800 0 0 7>; 206 interrupt-map-mask = <0xf800 0 0 7>;
205 interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3 207 interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3
206 c000 0 0 2 &mpc5200_pic 0 0 3 208 0xc000 0 0 2 &mpc5200_pic 0 0 3
207 c000 0 0 3 &mpc5200_pic 0 0 3 209 0xc000 0 0 3 &mpc5200_pic 0 0 3
208 c000 0 0 4 &mpc5200_pic 0 0 3>; 210 0xc000 0 0 4 &mpc5200_pic 0 0 3>;
209 clock-frequency = <0>; // From boot loader 211 clock-frequency = <0>; // From boot loader
210 interrupts = <2 8 0 2 9 0 2 a 0>; 212 interrupts = <2 8 0 2 9 0 2 10 0>;
211 interrupt-parent = <&mpc5200_pic>; 213 interrupt-parent = <&mpc5200_pic>;
212 bus-range = <0 0>; 214 bus-range = <0 0>;
213 ranges = <42000000 0 80000000 80000000 0 10000000 215 ranges = <0x42000000 0 0x80000000 0x80000000 0 0x10000000
214 02000000 0 90000000 90000000 0 10000000 216 0x02000000 0 0x90000000 0x90000000 0 0x10000000
215 01000000 0 00000000 a0000000 0 01000000>; 217 0x01000000 0 0x00000000 0xa0000000 0 0x01000000>;
216 }; 218 };
217}; 219};
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-04 19:08:42 -0500