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-rw-r--r--arch/powerpc/boot/dts/taishan.dts241
1 files changed, 135 insertions, 106 deletions
diff --git a/arch/powerpc/boot/dts/taishan.dts b/arch/powerpc/boot/dts/taishan.dts
index e808e1c5593a..058438f9629b 100644
--- a/arch/powerpc/boot/dts/taishan.dts
+++ b/arch/powerpc/boot/dts/taishan.dts
@@ -10,12 +10,14 @@
10 * any warranty of any kind, whether express or implied. 10 * any warranty of any kind, whether express or implied.
11 */ 11 */
12 12
13/dts-v1/;
14
13/ { 15/ {
14 #address-cells = <2>; 16 #address-cells = <2>;
15 #size-cells = <1>; 17 #size-cells = <1>;
16 model = "amcc,taishan"; 18 model = "amcc,taishan";
17 compatible = "amcc,taishan"; 19 compatible = "amcc,taishan";
18 dcr-parent = <&/cpus/cpu@0>; 20 dcr-parent = <&{/cpus/cpu@0}>;
19 21
20 aliases { 22 aliases {
21 ethernet0 = &EMAC2; 23 ethernet0 = &EMAC2;
@@ -31,13 +33,13 @@
31 cpu@0 { 33 cpu@0 {
32 device_type = "cpu"; 34 device_type = "cpu";
33 model = "PowerPC,440GX"; 35 model = "PowerPC,440GX";
34 reg = <0>; 36 reg = <0x00000000>;
35 clock-frequency = <2FAF0800>; // 800MHz 37 clock-frequency = <800000000>; // 800MHz
36 timebase-frequency = <0>; // Filled in by zImage 38 timebase-frequency = <0>; // Filled in by zImage
37 i-cache-line-size = <32>; 39 i-cache-line-size = <50>;
38 d-cache-line-size = <32>; 40 d-cache-line-size = <50>;
39 i-cache-size = <8000>; /* 32 kB */ 41 i-cache-size = <32768>; /* 32 kB */
40 d-cache-size = <8000>; /* 32 kB */ 42 d-cache-size = <32768>; /* 32 kB */
41 dcr-controller; 43 dcr-controller;
42 dcr-access-method = "native"; 44 dcr-access-method = "native";
43 }; 45 };
@@ -45,7 +47,7 @@
45 47
46 memory { 48 memory {
47 device_type = "memory"; 49 device_type = "memory";
48 reg = <0 0 0>; // Filled in by zImage 50 reg = <0x00000000 0x00000000 0x00000000>; // Filled in by zImage
49 }; 51 };
50 52
51 53
@@ -53,7 +55,7 @@
53 compatible = "ibm,uic-440gx", "ibm,uic"; 55 compatible = "ibm,uic-440gx", "ibm,uic";
54 interrupt-controller; 56 interrupt-controller;
55 cell-index = <3>; 57 cell-index = <3>;
56 dcr-reg = <200 009>; 58 dcr-reg = <0x200 0x009>;
57 #address-cells = <0>; 59 #address-cells = <0>;
58 #size-cells = <0>; 60 #size-cells = <0>;
59 #interrupt-cells = <2>; 61 #interrupt-cells = <2>;
@@ -64,11 +66,11 @@
64 compatible = "ibm,uic-440gx", "ibm,uic"; 66 compatible = "ibm,uic-440gx", "ibm,uic";
65 interrupt-controller; 67 interrupt-controller;
66 cell-index = <0>; 68 cell-index = <0>;
67 dcr-reg = <0c0 009>; 69 dcr-reg = <0x0c0 0x009>;
68 #address-cells = <0>; 70 #address-cells = <0>;
69 #size-cells = <0>; 71 #size-cells = <0>;
70 #interrupt-cells = <2>; 72 #interrupt-cells = <2>;
71 interrupts = <01 4 00 4>; /* cascade - first non-critical */ 73 interrupts = <0x1 0x4 0x0 0x4>; /* cascade - first non-critical */
72 interrupt-parent = <&UICB0>; 74 interrupt-parent = <&UICB0>;
73 75
74 }; 76 };
@@ -77,11 +79,11 @@
77 compatible = "ibm,uic-440gx", "ibm,uic"; 79 compatible = "ibm,uic-440gx", "ibm,uic";
78 interrupt-controller; 80 interrupt-controller;
79 cell-index = <1>; 81 cell-index = <1>;
80 dcr-reg = <0d0 009>; 82 dcr-reg = <0x0d0 0x009>;
81 #address-cells = <0>; 83 #address-cells = <0>;
82 #size-cells = <0>; 84 #size-cells = <0>;
83 #interrupt-cells = <2>; 85 #interrupt-cells = <2>;
84 interrupts = <03 4 02 4>; /* cascade */ 86 interrupts = <0x3 0x4 0x2 0x4>; /* cascade */
85 interrupt-parent = <&UICB0>; 87 interrupt-parent = <&UICB0>;
86 }; 88 };
87 89
@@ -89,29 +91,29 @@
89 compatible = "ibm,uic-440gx", "ibm,uic"; 91 compatible = "ibm,uic-440gx", "ibm,uic";
90 interrupt-controller; 92 interrupt-controller;
91 cell-index = <2>; /* was 1 */ 93 cell-index = <2>; /* was 1 */
92 dcr-reg = <210 009>; 94 dcr-reg = <0x210 0x009>;
93 #address-cells = <0>; 95 #address-cells = <0>;
94 #size-cells = <0>; 96 #size-cells = <0>;
95 #interrupt-cells = <2>; 97 #interrupt-cells = <2>;
96 interrupts = <05 4 04 4>; /* cascade */ 98 interrupts = <0x5 0x4 0x4 0x4>; /* cascade */
97 interrupt-parent = <&UICB0>; 99 interrupt-parent = <&UICB0>;
98 }; 100 };
99 101
100 102
101 CPC0: cpc { 103 CPC0: cpc {
102 compatible = "ibm,cpc-440gp"; 104 compatible = "ibm,cpc-440gp";
103 dcr-reg = <0b0 003 0e0 010>; 105 dcr-reg = <0x0b0 0x003 0x0e0 0x010>;
104 // FIXME: anything else? 106 // FIXME: anything else?
105 }; 107 };
106 108
107 L2C0: l2c { 109 L2C0: l2c {
108 compatible = "ibm,l2-cache-440gx", "ibm,l2-cache"; 110 compatible = "ibm,l2-cache-440gx", "ibm,l2-cache";
109 dcr-reg = <20 8 /* Internal SRAM DCR's */ 111 dcr-reg = <0x020 0x008 /* Internal SRAM DCR's */
110 30 8>; /* L2 cache DCR's */ 112 0x030 0x008>; /* L2 cache DCR's */
111 cache-line-size = <20>; /* 32 bytes */ 113 cache-line-size = <32>; /* 32 bytes */
112 cache-size = <40000>; /* L2, 256K */ 114 cache-size = <262144>; /* L2, 256K */
113 interrupt-parent = <&UIC2>; 115 interrupt-parent = <&UIC2>;
114 interrupts = <17 1>; 116 interrupts = <0x17 0x1>;
115 }; 117 };
116 118
117 plb { 119 plb {
@@ -119,41 +121,41 @@
119 #address-cells = <2>; 121 #address-cells = <2>;
120 #size-cells = <1>; 122 #size-cells = <1>;
121 ranges; 123 ranges;
122 clock-frequency = <9896800>; // 160MHz 124 clock-frequency = <160000000>; // 160MHz
123 125
124 SDRAM0: memory-controller { 126 SDRAM0: memory-controller {
125 compatible = "ibm,sdram-440gp"; 127 compatible = "ibm,sdram-440gp";
126 dcr-reg = <010 2>; 128 dcr-reg = <0x010 0x002>;
127 // FIXME: anything else? 129 // FIXME: anything else?
128 }; 130 };
129 131
130 SRAM0: sram { 132 SRAM0: sram {
131 compatible = "ibm,sram-440gp"; 133 compatible = "ibm,sram-440gp";
132 dcr-reg = <020 8 00a 1>; 134 dcr-reg = <0x020 0x008 0x00a 0x001>;
133 }; 135 };
134 136
135 DMA0: dma { 137 DMA0: dma {
136 // FIXME: ??? 138 // FIXME: ???
137 compatible = "ibm,dma-440gp"; 139 compatible = "ibm,dma-440gp";
138 dcr-reg = <100 027>; 140 dcr-reg = <0x100 0x027>;
139 }; 141 };
140 142
141 MAL0: mcmal { 143 MAL0: mcmal {
142 compatible = "ibm,mcmal-440gx", "ibm,mcmal2"; 144 compatible = "ibm,mcmal-440gx", "ibm,mcmal2";
143 dcr-reg = <180 62>; 145 dcr-reg = <0x180 0x062>;
144 num-tx-chans = <4>; 146 num-tx-chans = <4>;
145 num-rx-chans = <4>; 147 num-rx-chans = <4>;
146 interrupt-parent = <&MAL0>; 148 interrupt-parent = <&MAL0>;
147 interrupts = <0 1 2 3 4>; 149 interrupts = <0x0 0x1 0x2 0x3 0x4>;
148 #interrupt-cells = <1>; 150 #interrupt-cells = <1>;
149 #address-cells = <0>; 151 #address-cells = <0>;
150 #size-cells = <0>; 152 #size-cells = <0>;
151 interrupt-map = </*TXEOB*/ 0 &UIC0 a 4 153 interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
152 /*RXEOB*/ 1 &UIC0 b 4 154 /*RXEOB*/ 0x1 &UIC0 0xb 0x4
153 /*SERR*/ 2 &UIC1 0 4 155 /*SERR*/ 0x2 &UIC1 0x0 0x4
154 /*TXDE*/ 3 &UIC1 1 4 156 /*TXDE*/ 0x3 &UIC1 0x1 0x4
155 /*RXDE*/ 4 &UIC1 2 4>; 157 /*RXDE*/ 0x4 &UIC1 0x2 0x4>;
156 interrupt-map-mask = <ffffffff>; 158 interrupt-map-mask = <0xffffffff>;
157 }; 159 };
158 160
159 POB0: opb { 161 POB0: opb {
@@ -162,29 +164,56 @@
162 #size-cells = <1>; 164 #size-cells = <1>;
163 /* Wish there was a nicer way of specifying a full 32-bit 165 /* Wish there was a nicer way of specifying a full 32-bit
164 range */ 166 range */
165 ranges = <00000000 1 00000000 80000000 167 ranges = <0x00000000 0x00000001 0x00000000 0x80000000
166 80000000 1 80000000 80000000>; 168 0x80000000 0x00000001 0x80000000 0x80000000>;
167 dcr-reg = <090 00b>; 169 dcr-reg = <0x090 0x00b>;
168 interrupt-parent = <&UIC1>; 170 interrupt-parent = <&UIC1>;
169 interrupts = <7 4>; 171 interrupts = <0x7 0x4>;
170 clock-frequency = <4C4B400>; // 80MHz 172 clock-frequency = <80000000>; // 80MHz
171 173
172 174
173 EBC0: ebc { 175 EBC0: ebc {
174 compatible = "ibm,ebc-440gx", "ibm,ebc"; 176 compatible = "ibm,ebc-440gx", "ibm,ebc";
175 dcr-reg = <012 2>; 177 dcr-reg = <0x012 0x002>;
176 #address-cells = <2>; 178 #address-cells = <2>;
177 #size-cells = <1>; 179 #size-cells = <1>;
178 clock-frequency = <4C4B400>; // 80MHz 180 clock-frequency = <80000000>; // 80MHz
179 181
180 /* ranges property is supplied by zImage 182 /* ranges property is supplied by zImage
181 * based on firmware's configuration of the 183 * based on firmware's configuration of the
182 * EBC bridge */ 184 * EBC bridge */
183 185
184 interrupts = <5 4>; 186 interrupts = <0x5 0x4>;
185 interrupt-parent = <&UIC1>; 187 interrupt-parent = <&UIC1>;
186 188
187 /* TODO: Add other EBC devices */ 189 nor_flash@0,0 {
190 compatible = "cfi-flash";
191 bank-width = <4>;
192 device-width = <2>;
193 reg = <0x0 0x0 0x4000000>;
194 #address-cells = <1>;
195 #size-cells = <1>;
196 partition@0 {
197 label = "kernel";
198 reg = <0x0 0x180000>;
199 };
200 partition@180000 {
201 label = "root";
202 reg = <0x180000 0x200000>;
203 };
204 partition@380000 {
205 label = "user";
206 reg = <0x380000 0x3bc0000>;
207 };
208 partition@3f40000 {
209 label = "env";
210 reg = <0x3f40000 0x80000>;
211 };
212 partition@3fc0000 {
213 label = "u-boot";
214 reg = <0x3fc0000 0x40000>;
215 };
216 };
188 }; 217 };
189 218
190 219
@@ -192,103 +221,103 @@
192 UART0: serial@40000200 { 221 UART0: serial@40000200 {
193 device_type = "serial"; 222 device_type = "serial";
194 compatible = "ns16550"; 223 compatible = "ns16550";
195 reg = <40000200 8>; 224 reg = <0x40000200 0x00000008>;
196 virtual-reg = <e0000200>; 225 virtual-reg = <0xe0000200>;
197 clock-frequency = <A8C000>; 226 clock-frequency = <11059200>;
198 current-speed = <1C200>; /* 115200 */ 227 current-speed = <115200>; /* 115200 */
199 interrupt-parent = <&UIC0>; 228 interrupt-parent = <&UIC0>;
200 interrupts = <0 4>; 229 interrupts = <0x0 0x4>;
201 }; 230 };
202 231
203 UART1: serial@40000300 { 232 UART1: serial@40000300 {
204 device_type = "serial"; 233 device_type = "serial";
205 compatible = "ns16550"; 234 compatible = "ns16550";
206 reg = <40000300 8>; 235 reg = <0x40000300 0x00000008>;
207 virtual-reg = <e0000300>; 236 virtual-reg = <0xe0000300>;
208 clock-frequency = <A8C000>; 237 clock-frequency = <11059200>;
209 current-speed = <1C200>; /* 115200 */ 238 current-speed = <115200>; /* 115200 */
210 interrupt-parent = <&UIC0>; 239 interrupt-parent = <&UIC0>;
211 interrupts = <1 4>; 240 interrupts = <0x1 0x4>;
212 }; 241 };
213 242
214 IIC0: i2c@40000400 { 243 IIC0: i2c@40000400 {
215 /* FIXME */ 244 /* FIXME */
216 compatible = "ibm,iic-440gp", "ibm,iic"; 245 compatible = "ibm,iic-440gp", "ibm,iic";
217 reg = <40000400 14>; 246 reg = <0x40000400 0x00000014>;
218 interrupt-parent = <&UIC0>; 247 interrupt-parent = <&UIC0>;
219 interrupts = <2 4>; 248 interrupts = <0x2 0x4>;
220 }; 249 };
221 IIC1: i2c@40000500 { 250 IIC1: i2c@40000500 {
222 /* FIXME */ 251 /* FIXME */
223 compatible = "ibm,iic-440gp", "ibm,iic"; 252 compatible = "ibm,iic-440gp", "ibm,iic";
224 reg = <40000500 14>; 253 reg = <0x40000500 0x00000014>;
225 interrupt-parent = <&UIC0>; 254 interrupt-parent = <&UIC0>;
226 interrupts = <3 4>; 255 interrupts = <0x3 0x4>;
227 }; 256 };
228 257
229 GPIO0: gpio@40000700 { 258 GPIO0: gpio@40000700 {
230 /* FIXME */ 259 /* FIXME */
231 compatible = "ibm,gpio-440gp"; 260 compatible = "ibm,gpio-440gp";
232 reg = <40000700 20>; 261 reg = <0x40000700 0x00000020>;
233 }; 262 };
234 263
235 ZMII0: emac-zmii@40000780 { 264 ZMII0: emac-zmii@40000780 {
236 compatible = "ibm,zmii-440gx", "ibm,zmii"; 265 compatible = "ibm,zmii-440gx", "ibm,zmii";
237 reg = <40000780 c>; 266 reg = <0x40000780 0x0000000c>;
238 }; 267 };
239 268
240 RGMII0: emac-rgmii@40000790 { 269 RGMII0: emac-rgmii@40000790 {
241 compatible = "ibm,rgmii"; 270 compatible = "ibm,rgmii";
242 reg = <40000790 8>; 271 reg = <0x40000790 0x00000008>;
243 }; 272 };
244 273
245 TAH0: emac-tah@40000b50 { 274 TAH0: emac-tah@40000b50 {
246 compatible = "ibm,tah-440gx", "ibm,tah"; 275 compatible = "ibm,tah-440gx", "ibm,tah";
247 reg = <40000b50 30>; 276 reg = <0x40000b50 0x00000030>;
248 }; 277 };
249 278
250 TAH1: emac-tah@40000d50 { 279 TAH1: emac-tah@40000d50 {
251 compatible = "ibm,tah-440gx", "ibm,tah"; 280 compatible = "ibm,tah-440gx", "ibm,tah";
252 reg = <40000d50 30>; 281 reg = <0x40000d50 0x00000030>;
253 }; 282 };
254 283
255 EMAC0: ethernet@40000800 { 284 EMAC0: ethernet@40000800 {
256 unused = <1>; 285 unused = <0x1>;
257 device_type = "network"; 286 device_type = "network";
258 compatible = "ibm,emac-440gx", "ibm,emac4"; 287 compatible = "ibm,emac-440gx", "ibm,emac4";
259 interrupt-parent = <&UIC1>; 288 interrupt-parent = <&UIC1>;
260 interrupts = <1c 4 1d 4>; 289 interrupts = <0x1c 0x4 0x1d 0x4>;
261 reg = <40000800 70>; 290 reg = <0x40000800 0x00000074>;
262 local-mac-address = [000000000000]; // Filled in by zImage 291 local-mac-address = [000000000000]; // Filled in by zImage
263 mal-device = <&MAL0>; 292 mal-device = <&MAL0>;
264 mal-tx-channel = <0>; 293 mal-tx-channel = <0>;
265 mal-rx-channel = <0>; 294 mal-rx-channel = <0>;
266 cell-index = <0>; 295 cell-index = <0>;
267 max-frame-size = <5dc>; 296 max-frame-size = <1500>;
268 rx-fifo-size = <1000>; 297 rx-fifo-size = <4096>;
269 tx-fifo-size = <800>; 298 tx-fifo-size = <2048>;
270 phy-mode = "rmii"; 299 phy-mode = "rmii";
271 phy-map = <00000001>; 300 phy-map = <0x00000001>;
272 zmii-device = <&ZMII0>; 301 zmii-device = <&ZMII0>;
273 zmii-channel = <0>; 302 zmii-channel = <0>;
274 }; 303 };
275 EMAC1: ethernet@40000900 { 304 EMAC1: ethernet@40000900 {
276 unused = <1>; 305 unused = <0x1>;
277 device_type = "network"; 306 device_type = "network";
278 compatible = "ibm,emac-440gx", "ibm,emac4"; 307 compatible = "ibm,emac-440gx", "ibm,emac4";
279 interrupt-parent = <&UIC1>; 308 interrupt-parent = <&UIC1>;
280 interrupts = <1e 4 1f 4>; 309 interrupts = <0x1e 0x4 0x1f 0x4>;
281 reg = <40000900 70>; 310 reg = <0x40000900 0x00000074>;
282 local-mac-address = [000000000000]; // Filled in by zImage 311 local-mac-address = [000000000000]; // Filled in by zImage
283 mal-device = <&MAL0>; 312 mal-device = <&MAL0>;
284 mal-tx-channel = <1>; 313 mal-tx-channel = <1>;
285 mal-rx-channel = <1>; 314 mal-rx-channel = <1>;
286 cell-index = <1>; 315 cell-index = <1>;
287 max-frame-size = <5dc>; 316 max-frame-size = <1500>;
288 rx-fifo-size = <1000>; 317 rx-fifo-size = <4096>;
289 tx-fifo-size = <800>; 318 tx-fifo-size = <2048>;
290 phy-mode = "rmii"; 319 phy-mode = "rmii";
291 phy-map = <00000001>; 320 phy-map = <0x00000001>;
292 zmii-device = <&ZMII0>; 321 zmii-device = <&ZMII0>;
293 zmii-channel = <1>; 322 zmii-channel = <1>;
294 }; 323 };
@@ -297,18 +326,18 @@
297 device_type = "network"; 326 device_type = "network";
298 compatible = "ibm,emac-440gx", "ibm,emac4"; 327 compatible = "ibm,emac-440gx", "ibm,emac4";
299 interrupt-parent = <&UIC2>; 328 interrupt-parent = <&UIC2>;
300 interrupts = <0 4 1 4>; 329 interrupts = <0x0 0x4 0x1 0x4>;
301 reg = <40000c00 70>; 330 reg = <0x40000c00 0x00000074>;
302 local-mac-address = [000000000000]; // Filled in by zImage 331 local-mac-address = [000000000000]; // Filled in by zImage
303 mal-device = <&MAL0>; 332 mal-device = <&MAL0>;
304 mal-tx-channel = <2>; 333 mal-tx-channel = <2>;
305 mal-rx-channel = <2>; 334 mal-rx-channel = <2>;
306 cell-index = <2>; 335 cell-index = <2>;
307 max-frame-size = <2328>; 336 max-frame-size = <9000>;
308 rx-fifo-size = <1000>; 337 rx-fifo-size = <4096>;
309 tx-fifo-size = <800>; 338 tx-fifo-size = <2048>;
310 phy-mode = "rgmii"; 339 phy-mode = "rgmii";
311 phy-map = <00000001>; 340 phy-map = <0x00000001>;
312 rgmii-device = <&RGMII0>; 341 rgmii-device = <&RGMII0>;
313 rgmii-channel = <0>; 342 rgmii-channel = <0>;
314 zmii-device = <&ZMII0>; 343 zmii-device = <&ZMII0>;
@@ -321,18 +350,18 @@
321 device_type = "network"; 350 device_type = "network";
322 compatible = "ibm,emac-440gx", "ibm,emac4"; 351 compatible = "ibm,emac-440gx", "ibm,emac4";
323 interrupt-parent = <&UIC2>; 352 interrupt-parent = <&UIC2>;
324 interrupts = <2 4 3 4>; 353 interrupts = <0x2 0x4 0x3 0x4>;
325 reg = <40000e00 70>; 354 reg = <0x40000e00 0x00000074>;
326 local-mac-address = [000000000000]; // Filled in by zImage 355 local-mac-address = [000000000000]; // Filled in by zImage
327 mal-device = <&MAL0>; 356 mal-device = <&MAL0>;
328 mal-tx-channel = <3>; 357 mal-tx-channel = <3>;
329 mal-rx-channel = <3>; 358 mal-rx-channel = <3>;
330 cell-index = <3>; 359 cell-index = <3>;
331 max-frame-size = <2328>; 360 max-frame-size = <9000>;
332 rx-fifo-size = <1000>; 361 rx-fifo-size = <4096>;
333 tx-fifo-size = <800>; 362 tx-fifo-size = <2048>;
334 phy-mode = "rgmii"; 363 phy-mode = "rgmii";
335 phy-map = <00000003>; 364 phy-map = <0x00000003>;
336 rgmii-device = <&RGMII0>; 365 rgmii-device = <&RGMII0>;
337 rgmii-channel = <1>; 366 rgmii-channel = <1>;
338 zmii-device = <&ZMII0>; 367 zmii-device = <&ZMII0>;
@@ -344,9 +373,9 @@
344 373
345 GPT0: gpt@40000a00 { 374 GPT0: gpt@40000a00 {
346 /* FIXME */ 375 /* FIXME */
347 reg = <40000a00 d4>; 376 reg = <0x40000a00 0x000000d4>;
348 interrupt-parent = <&UIC0>; 377 interrupt-parent = <&UIC0>;
349 interrupts = <12 4 13 4 14 4 15 4 16 4>; 378 interrupts = <0x12 0x4 0x13 0x4 0x14 0x4 0x15 0x4 0x16 0x4>;
350 }; 379 };
351 380
352 }; 381 };
@@ -360,34 +389,34 @@
360 primary; 389 primary;
361 large-inbound-windows; 390 large-inbound-windows;
362 enable-msi-hole; 391 enable-msi-hole;
363 reg = <2 0ec00000 8 /* Config space access */ 392 reg = <0x00000002 0x0ec00000 0x00000008 /* Config space access */
364 0 0 0 /* no IACK cycles */ 393 0x00000000 0x00000000 0x00000000 /* no IACK cycles */
365 2 0ed00000 4 /* Special cycles */ 394 0x00000002 0x0ed00000 0x00000004 /* Special cycles */
366 2 0ec80000 100 /* Internal registers */ 395 0x00000002 0x0ec80000 0x00000100 /* Internal registers */
367 2 0ec80100 fc>; /* Internal messaging registers */ 396 0x00000002 0x0ec80100 0x000000fc>; /* Internal messaging registers */
368 397
369 /* Outbound ranges, one memory and one IO, 398 /* Outbound ranges, one memory and one IO,
370 * later cannot be changed 399 * later cannot be changed
371 */ 400 */
372 ranges = <02000000 0 80000000 00000003 80000000 0 80000000 401 ranges = <0x02000000 0x00000000 0x80000000 0x00000003 0x80000000 0x00000000 0x80000000
373 01000000 0 00000000 00000002 08000000 0 00010000>; 402 0x01000000 0x00000000 0x00000000 0x00000002 0x08000000 0x00000000 0x00010000>;
374 403
375 /* Inbound 2GB range starting at 0 */ 404 /* Inbound 2GB range starting at 0 */
376 dma-ranges = <42000000 0 0 0 0 0 80000000>; 405 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
377 406
378 interrupt-map-mask = <f800 0 0 7>; 407 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
379 interrupt-map = < 408 interrupt-map = <
380 /* IDSEL 1 */ 409 /* IDSEL 1 */
381 0800 0 0 1 &UIC0 17 8 410 0x800 0x0 0x0 0x1 &UIC0 0x17 0x8
382 0800 0 0 2 &UIC0 18 8 411 0x800 0x0 0x0 0x2 &UIC0 0x18 0x8
383 0800 0 0 3 &UIC0 19 8 412 0x800 0x0 0x0 0x3 &UIC0 0x19 0x8
384 0800 0 0 4 &UIC0 1a 8 413 0x800 0x0 0x0 0x4 &UIC0 0x1a 0x8
385 414
386 /* IDSEL 2 */ 415 /* IDSEL 2 */
387 1000 0 0 1 &UIC0 18 8 416 0x1000 0x0 0x0 0x1 &UIC0 0x18 0x8
388 1000 0 0 2 &UIC0 19 8 417 0x1000 0x0 0x0 0x2 &UIC0 0x19 0x8
389 1000 0 0 3 &UIC0 1a 8 418 0x1000 0x0 0x0 0x3 &UIC0 0x1a 0x8
390 1000 0 0 4 &UIC0 17 8 419 0x1000 0x0 0x0 0x4 &UIC0 0x17 0x8
391 >; 420 >;
392 }; 421 };
393 }; 422 };
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-24 15:06:47 -0500