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-rw-r--r--arch/powerpc/boot/dts/sbc8560.dts5
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/powerpc/boot/dts/sbc8560.dts b/arch/powerpc/boot/dts/sbc8560.dts
index 0476802fba60..e556c5a4cf95 100644
--- a/arch/powerpc/boot/dts/sbc8560.dts
+++ b/arch/powerpc/boot/dts/sbc8560.dts
@@ -43,6 +43,7 @@
43 timebase-frequency = <0>; // From uboot 43 timebase-frequency = <0>; // From uboot
44 bus-frequency = <0>; 44 bus-frequency = <0>;
45 clock-frequency = <0>; 45 clock-frequency = <0>;
46 next-level-cache = <&L2>;
46 }; 47 };
47 }; 48 };
48 49
@@ -66,7 +67,7 @@
66 interrupts = <0x12 0x2>; 67 interrupts = <0x12 0x2>;
67 }; 68 };
68 69
69 l2-cache-controller@20000 { 70 L2: l2-cache-controller@20000 {
70 compatible = "fsl,8560-l2-cache-controller"; 71 compatible = "fsl,8560-l2-cache-controller";
71 reg = <0x20000 0x1000>; 72 reg = <0x20000 0x1000>;
72 cache-line-size = <0x20>; // 32 bytes 73 cache-line-size = <0x20>; // 32 bytes
@@ -155,8 +156,8 @@
155 mpic: pic@40000 { 156 mpic: pic@40000 {
156 interrupt-controller; 157 interrupt-controller;
157 #address-cells = <0>; 158 #address-cells = <0>;
158 #size-cells = <0>;
159 #interrupt-cells = <2>; 159 #interrupt-cells = <2>;
160 compatible = "chrp,open-pic";
160 reg = <0x40000 0x40000>; 161 reg = <0x40000 0x40000>;
161 device_type = "open-pic"; 162 device_type = "open-pic";
162 }; 163 };