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1/*
2 * SBC8349E Device Tree Source
3 *
4 * Copyright 2007 Wind River Inc.
5 *
6 * Paul Gortmaker (see MAINTAINERS for contact information)
7 *
8 * -based largely on the Freescale MPC834x_MDS dts.
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 */
15
16/dts-v1/;
17
18/ {
19 model = "SBC8349E";
20 compatible = "SBC834xE";
21 #address-cells = <1>;
22 #size-cells = <1>;
23
24 aliases {
25 ethernet0 = &enet0;
26 ethernet1 = &enet1;
27 serial0 = &serial0;
28 serial1 = &serial1;
29 pci0 = &pci0;
30 };
31
32 cpus {
33 #address-cells = <1>;
34 #size-cells = <0>;
35
36 PowerPC,8349@0 {
37 device_type = "cpu";
38 reg = <0x0>;
39 d-cache-line-size = <32>;
40 i-cache-line-size = <32>;
41 d-cache-size = <32768>;
42 i-cache-size = <32768>;
43 timebase-frequency = <0>; // from bootloader
44 bus-frequency = <0>; // from bootloader
45 clock-frequency = <0>; // from bootloader
46 };
47 };
48
49 memory {
50 device_type = "memory";
51 reg = <0x00000000 0x10000000>; // 256MB at 0
52 };
53
54 soc8349@e0000000 {
55 #address-cells = <1>;
56 #size-cells = <1>;
57 device_type = "soc";
58 ranges = <0x0 0xe0000000 0x00100000>;
59 reg = <0xe0000000 0x00000200>;
60 bus-frequency = <0>;
61
62 wdt@200 {
63 compatible = "mpc83xx_wdt";
64 reg = <0x200 0x100>;
65 };
66
67 i2c@3000 {
68 #address-cells = <1>;
69 #size-cells = <0>;
70 cell-index = <0>;
71 compatible = "fsl-i2c";
72 reg = <0x3000 0x100>;
73 interrupts = <14 0x8>;
74 interrupt-parent = <&ipic>;
75 dfsrr;
76 };
77
78 i2c@3100 {
79 #address-cells = <1>;
80 #size-cells = <0>;
81 cell-index = <1>;
82 compatible = "fsl-i2c";
83 reg = <0x3100 0x100>;
84 interrupts = <15 0x8>;
85 interrupt-parent = <&ipic>;
86 dfsrr;
87 };
88
89 spi@7000 {
90 cell-index = <0>;
91 compatible = "fsl,spi";
92 reg = <0x7000 0x1000>;
93 interrupts = <16 0x8>;
94 interrupt-parent = <&ipic>;
95 mode = "cpu";
96 };
97
98 /* phy type (ULPI or SERIAL) are only types supported for MPH */
99 /* port = 0 or 1 */
100 usb@22000 {
101 compatible = "fsl-usb2-mph";
102 reg = <0x22000 0x1000>;
103 #address-cells = <1>;
104 #size-cells = <0>;
105 interrupt-parent = <&ipic>;
106 interrupts = <39 0x8>;
107 phy_type = "ulpi";
108 port1;
109 };
110 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
111 usb@23000 {
112 device_type = "usb";
113 compatible = "fsl-usb2-dr";
114 reg = <0x23000 0x1000>;
115 #address-cells = <1>;
116 #size-cells = <0>;
117 interrupt-parent = <&ipic>;
118 interrupts = <38 0x8>;
119 dr_mode = "otg";
120 phy_type = "ulpi";
121 };
122
123 mdio@24520 {
124 #address-cells = <1>;
125 #size-cells = <0>;
126 compatible = "fsl,gianfar-mdio";
127 reg = <0x24520 0x20>;
128
129 phy0: ethernet-phy@19 {
130 interrupt-parent = <&ipic>;
131 interrupts = <20 0x8>;
132 reg = <0x19>;
133 device_type = "ethernet-phy";
134 };
135 phy1: ethernet-phy@1a {
136 interrupt-parent = <&ipic>;
137 interrupts = <21 0x8>;
138 reg = <0x1a>;
139 device_type = "ethernet-phy";
140 };
141 };
142
143 enet0: ethernet@24000 {
144 cell-index = <0>;
145 device_type = "network";
146 model = "TSEC";
147 compatible = "gianfar";
148 reg = <0x24000 0x1000>;
149 local-mac-address = [ 00 00 00 00 00 00 ];
150 interrupts = <32 0x8 33 0x8 34 0x8>;
151 interrupt-parent = <&ipic>;
152 phy-handle = <&phy0>;
153 linux,network-index = <0>;
154 };
155
156 enet1: ethernet@25000 {
157 cell-index = <1>;
158 device_type = "network";
159 model = "TSEC";
160 compatible = "gianfar";
161 reg = <0x25000 0x1000>;
162 local-mac-address = [ 00 00 00 00 00 00 ];
163 interrupts = <35 0x8 36 0x8 37 0x8>;
164 interrupt-parent = <&ipic>;
165 phy-handle = <&phy1>;
166 linux,network-index = <1>;
167 };
168
169 serial0: serial@4500 {
170 cell-index = <0>;
171 device_type = "serial";
172 compatible = "ns16550";
173 reg = <0x4500 0x100>;
174 clock-frequency = <0>;
175 interrupts = <9 0x8>;
176 interrupt-parent = <&ipic>;
177 };
178
179 serial1: serial@4600 {
180 cell-index = <1>;
181 device_type = "serial";
182 compatible = "ns16550";
183 reg = <0x4600 0x100>;
184 clock-frequency = <0>;
185 interrupts = <10 0x8>;
186 interrupt-parent = <&ipic>;
187 };
188
189 /* May need to remove if on a part without crypto engine */
190 crypto@30000 {
191 model = "SEC2";
192 compatible = "talitos";
193 reg = <0x30000 0x10000>;
194 interrupts = <11 0x8>;
195 interrupt-parent = <&ipic>;
196 num-channels = <4>;
197 channel-fifo-len = <24>;
198 exec-units-mask = <0x0000007e>;
199 /* desc mask is for rev2.0,
200 * we need runtime fixup for >2.0 */
201 descriptor-types-mask = <0x01010ebf>;
202 };
203
204 /* IPIC
205 * interrupts cell = <intr #, sense>
206 * sense values match linux IORESOURCE_IRQ_* defines:
207 * sense == 8: Level, low assertion
208 * sense == 2: Edge, high-to-low change
209 */
210 ipic: pic@700 {
211 interrupt-controller;
212 #address-cells = <0>;
213 #interrupt-cells = <2>;
214 reg = <0x700 0x100>;
215 device_type = "ipic";
216 };
217 };
218
219 pci0: pci@e0008500 {
220 cell-index = <1>;
221 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
222 interrupt-map = <
223
224 /* IDSEL 0x11 */
225 0x8800 0x0 0x0 0x1 &ipic 20 0x8
226 0x8800 0x0 0x0 0x2 &ipic 21 0x8
227 0x8800 0x0 0x0 0x3 &ipic 22 0x8
228 0x8800 0x0 0x0 0x4 &ipic 23 0x8>;
229
230 interrupt-parent = <&ipic>;
231 interrupts = <0x42 0x8>;
232 bus-range = <0 0>;
233 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
234 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
235 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
236 clock-frequency = <66666666>;
237 #interrupt-cells = <1>;
238 #size-cells = <2>;
239 #address-cells = <3>;
240 reg = <0xe0008500 0x100>;
241 compatible = "fsl,mpc8349-pci";
242 device_type = "pci";
243 };
244};